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1. 发明授权

US06542398B2 Magnetic random access memory 有权
公开(公告)号：US06542398B2
公开(公告)日：2003-04-01
申请号：US10033320
申请日：2001-12-27
申请人： Chang Yong Kang , Chang-Shuk Kim
发明人： Chang Yong Kang , Chang-Shuk Kim
IPC分类号： G11C1702
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/16
摘要： A magnetic random access memory (MRAM) is disclosed. In order to achieve high integration, the MRAM includes a word line formed in an active region of a semiconductor substrate, and used as a read line and a write line; a ground line and a lower read layer positioned on opposite sides of the active region of the semiconductor substrate; a seed layer contacting the lower read layer, and being overlapped with the upper portion of the word line; an MTJ cell contacting the upper portion of the seed layer at the upper portion of the word line; and a bit line contacting the MTJ cell, and crossing the word line in a vertical direction.

2. 发明授权

US06549446B2 Data balancing scheme in solid state storage devices 有权
公开(公告)号：US06549446B2
公开(公告)日：2003-04-15
申请号：US09959591
申请日：2002-01-25
申请人： Stephen Morley , Kevin Lloyd-Jones , Dominic P. McCarthy , Peter Joseph Bramhall
发明人： Stephen Morley , Kevin Lloyd-Jones , Dominic P. McCarthy , Peter Joseph Bramhall
IPC分类号： G11C1702
CPC分类号： G11C7/1006 , G11C11/16
摘要： A data storage device comprises at least one array of memory elements arranged in a plurality of rows and columns; coding means for coding an input data into a form having a balanced proportion of ‘1’s and ‘0’s, said coding means comprising means for applying an output of a pseudo random bit sequence generator to said incoming data, wherein the coded data is stored in the array of memory elements such that the ‘1’s and ‘0’s are spatially distributed relatively evenly across the plurality of memory elements; and decoding means for decoding the coded data read from the plurality of memory elements, into the original data.

3. 发明授权

US06532164B2 Magnetic spin polarization and magnetization rotation device with memory and writing process, using such a device 有权
标题翻译：磁自旋极化和磁化旋转装置具有记忆和写入过程，采用这种器件
公开(公告)号：US06532164B2
公开(公告)日：2003-03-11
申请号：US09990321
申请日：2001-11-23
申请人： Olivier Redon , Bernard Dieny , Bernard Rodmacq
发明人： Olivier Redon , Bernard Dieny , Bernard Rodmacq
IPC分类号： G11C1702
CPC分类号： H01L27/226 , B82Y10/00 , B82Y25/00 , G11C11/161 , G11C11/1659 , G11C11/1675 , H01F10/3254 , H01F10/3268 , H01F10/3286 , H01L43/08
摘要： A magnetic spin polarizing a magnetization rotation device with a memory and a writing process using such a device. The device is configured to include an apparatus for polarizing the spin of electrons, including a magnetic layer having magnetization perpendicular to the plane of magnetization of respective first and second magnetic layers. The magnetization of the second magnetic layer rotates within a plane, which is either the plane of the layer or a perpendicular plane.
摘要翻译：使用这种装置的具有存储器和写入处理的磁旋转装置的磁旋转偏振。该器件被配置为包括用于偏振电子自旋的装置，包括具有垂直于相应的第一和第二磁性层的磁化平面的磁化的磁性层。第二磁性层的磁化在作为层的平面或垂直平面的平面内旋转。

4. 发明授权

US06272036B1 Control of magnetic direction in multi-layer ferromagnetic devices by bias voltage 失效
标题翻译：通过偏置电压控制多层铁磁器件的磁方向
公开(公告)号：US06272036B1
公开(公告)日：2001-08-07
申请号：US09467808
申请日：1999-12-20
申请人： Chun-Yeol You , Samuel D. Bader
发明人： Chun-Yeol You , Samuel D. Bader
IPC分类号： G11C1702
CPC分类号： H01F10/3268 , B82Y10/00 , B82Y25/00 , G11B5/3903 , G11C11/16 , H01F10/3254 , H01F10/329 , H01L43/08
摘要： A system for controlling the direction of magnetization of materials comprising a ferromagnetic device with first and second ferromagnetic layers. The ferromagnetic layers are disposed such that they combine to form an interlayer with exchange coupling. An insulating layer and a spacer layer are located between the first and second ferromagnetic layers. A direct bias voltage is applied to the interlayer exchange coupling, causing the direction of magnetization of the second ferromagnetic layer to change. This change of magnetization direction occurs in the absence of any applied external magnetic field.
摘要翻译：一种用于控制材料的磁化方向的系统，其包括具有第一和第二铁磁层的铁磁装置。铁磁层被布置成使得它们结合以形成具有交换耦合的中间层。绝缘层和间隔层位于第一和第二铁磁层之间。直接偏置电压施加到层间交换耦合，导致第二铁磁层的磁化方向改变。磁化方向的这种变化发生在没有任何施加的外部磁场的情况下。

5. 发明授权

US06584006B2 MRAM bit line word line architecture 有权
公开(公告)号：US06584006B2
公开(公告)日：2003-06-24
申请号：US09965086
申请日：2001-09-27
申请人： Hans-Heinrich Viehmann
发明人： Hans-Heinrich Viehmann
IPC分类号： G11C1702
CPC分类号： G11C7/12 , G11C7/18 , G11C8/08 , G11C8/14 , G11C11/16
摘要： A memory device comprising a plurality of bit lines and a plurality of word lines forming a cross-point array. A memory cell is located at each of the cross-points in the array. A bit decoder and word decoder are coupled to the bit lines and word lines, respectively. A first series of switch circuits are coupled to and located along the adjacent bit lines resulting in the array being divided into segments along the adjacent bit lines such that a shortened programming current path is provided which results in decreased resistance across the device.

6. 发明授权

US06560135B2 Magnetic semiconductor memory apparatus and method of manufacturing the same 失效
公开(公告)号：US06560135B2
公开(公告)日：2003-05-06
申请号：US09934602
申请日：2001-08-23
申请人： Hideyuki Matsuoka , Takeshi Sakata , Katsuro Watanabe , Kiyoo Itoh
发明人： Hideyuki Matsuoka , Takeshi Sakata , Katsuro Watanabe , Kiyoo Itoh
IPC分类号： G11C1702
CPC分类号： H01L27/228 , H01L27/224
摘要： Since a memory cell of a so-called MRAM utilizing a conventional tunnel magnetic resistance forms writing word lines below data lines, there are the following problems. A process becomes hard because it is necessary to execute a self-aligned contact opening process with passing through portions between the writing word lines, or since it is hard that the writing word lines sufficiently overlap with a magnetic resistance device in a planner manner due to a restriction of layout, the data writing becomes unstable. In order to solve the problems mentioned above, the present invention provides a structure of MRAM memory cell in which the writing word lines are formed above the bit lines, and a method of manufacturing the same. In accordance with the present invention, a process at a time of forming a memory cell plug becomes easy in comparison with a conventional one, there can be obtained a layout so that a magnetic field from the writing word line effectively acts on a magnetic resistance device due to the writing word line formed in an upper portion, and a stable writing can be executed.

7. 发明授权

US06483734B1 Memory device having memory cells capable of four states 有权
标题翻译：具有能够具有四种状态的存储单元的存储器件
公开(公告)号：US06483734B1
公开(公告)日：2002-11-19
申请号：US09992426
申请日：2001-11-26
申请人： Manish Sharma , Lung T. Tran
发明人： Manish Sharma , Lung T. Tran
IPC分类号： G11C1702
CPC分类号： H01L27/224 , G11C11/005 , G11C11/16 , G11C11/56 , G11C11/5607 , G11C11/5671 , G11C17/16 , G11C2216/26
摘要： A memory device includes memory cells having a re-writeable element and a write-once element in series with the re-writeable element. The re-writeable element is programmable between a high resistance state and a low resistance state. The write-once element can be an anti-fuse element that is programmable from a high resistance state to a low resistance state, or a fuse element that is programmable from a low resistance state to a high resistance state. The two possible states for the re-writeable element and the two possible states for the write-once element allow the memory cells to store four different bits.
摘要翻译：存储器件包括具有可重写元件和与可重写元件串联的一次写入元件的存储器单元。可重写元件可在高电阻状态和低电阻状态之间编程。一次写入元件可以是可从高电阻状态到低电阻状态的可编程熔丝元件，或可从低电阻状态到高电阻状态的可编程熔丝元件。可重写元件的两种可能状态和一次写入元件的两种可能状态允许存储单元存储四个不同的位。

8. 发明授权

US06650562B2 System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device 有权
标题翻译：用于确定磁性隧道结存储器件中存储单元的逻辑状态的系统和方法
公开(公告)号：US06650562B2
公开(公告)日：2003-11-18
申请号：US10055299
申请日：2002-01-23
申请人： Anthony Holden , Frederick A. Perner
发明人： Anthony Holden , Frederick A. Perner
IPC分类号： G11C1702
CPC分类号： G11C11/15
摘要： A system and method for determining the logic state of a memory cell in a magnetic tunnel junction (MTJ) memory device based on the ratio of the current through the cell at different bias points are disclosed. A memory cell in an MJT memory device is sequentially subjected to at least two different bias voltages. The current through the cell at each of the bias voltages is measured, and a ratio of the different currents is determined. The ratio is then compared with a predetermined value to determine the logic state of the cell. The predetermined value can be a known value. Alternatively, the predetermined value can be determined by application of the system and method to a reference cell having a known logic state.
摘要翻译：公开了一种用于基于在不同偏置点处通过单元的电流的比率来确定磁性隧道结（MTJ）存储器件中的存储器单元的逻辑状态的系统和方法。 MJT存储器件中的存储器单元依次经受至少两个不同的偏置电压。测量在每个偏置电压下通过电池的电流，并确定不同电流的比率。然后将比率与预定值进行比较，以确定单元的逻辑状态。预定值可以是已知值。或者，可以通过将系统和方法应用于具有已知逻辑状态的参考小区来确定预定值。

9. 发明授权

US06545900B2 MRAM module configuration 有权
公开(公告)号：US06545900B2
公开(公告)日：2003-04-08
申请号：US09951242
申请日：2001-09-12
申请人： Thomas Böhm , Dietmar Gogl , Martin Freitag , Stefan Lammers
发明人： Thomas Böhm , Dietmar Gogl , Martin Freitag , Stefan Lammers
IPC分类号： G11C1702
CPC分类号： G11C11/16 , G11C5/025 , H01L27/222
摘要： An MRAM module configuration in which, in order to increase the packing density, memory cell zones containing memory arrays and peripheral circuits are nested in one another. In this manner, an increased packing density of the memory cell is achieved which results in lowered production costs and a smaller chip space for a more compact configuration.

10. 发明授权

US06324112B1 Reading device and method for integrated circuit memory 有权
标题翻译：集成电路存储器的读取装置和方法
公开(公告)号：US06324112B1
公开(公告)日：2001-11-27
申请号：US09716173
申请日：2000-11-17
申请人： Richard Fournel
发明人： Richard Fournel
IPC分类号： G11C1702
CPC分类号： G11C7/12 , G11C16/24
摘要： In a reading device for a memory, a circuit for the asymmetrical precharging of the differential amplifier is provided so that an output of the reading device switches over to a determined state. In the following evaluation phase, if the memory cell is programmed, the output remains unchanged. If the memory cell is blank or erased, the output of the reading device switches over to another state. A detection circuit detects a sufficient difference between the inputs of the differential amplifier for stopping the asymmetrical precharging and for making the reading device go automatically to the evaluation phase.
摘要翻译：在用于存储器的读取装置中，提供用于差分放大器的非对称预充电的电路，使得读取装置的输出切换到确定的状态。在以下评估阶段，如果存储单元被编程，则输出保持不变。如果存储单元为空白或擦除，则读取装置的输出切换到另一状态。检测电路检测用于停止非对称预充电的差分放大器的输入之间的充分差异，并使读取装置自动进入评估阶段。

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