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1. 发明授权

US07439577B2 Semiconductor memory and method for manufacturing the same 有权
标题翻译：半导体存储器及其制造方法
公开(公告)号：US07439577B2
公开(公告)日：2008-10-21
申请号：US11495780
申请日：2006-07-31
申请人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
发明人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11568
摘要： A semiconductor memory is provided with memory cells including bit lines made of a diffusion layer formed in a semiconductor substrate, charge-trapping gate insulating films formed between the bit lines and word lines formed on the gate insulating films. An interlayer insulating film is formed over the memory cells and bit line contact plugs are formed in the interlayer insulating film to be connected to the bit lines. Further, a light blocking film is formed on at least part of the interlayer insulating film covering the memory cells and part of the light blocking film formed on the interlayer insulating film extends from the surface to the inside of the interlayer insulating film in the neighborhood of the bit line contact plugs.
摘要翻译：半导体存储器设置有存储单元，存储单元包括由在半导体衬底中形成的扩散层构成的位线，形成在位线和形成在栅极绝缘膜上的字线之间的电荷俘获栅极绝缘膜。在存储单元之上形成层间绝缘膜，并且在层间绝缘膜中形成位线接触插塞以连接到位线。此外，在覆盖存储单元的层间绝缘膜的至少一部分上形成遮光膜，并且形成在层间绝缘膜上的遮光膜的一部分从层间绝缘膜的表面延伸到附近的层间绝缘膜的内部位线接触插头。

2. 发明申请

US20070108509A1 Semiconductor memory and method for manufacturing the same 有权
标题翻译：半导体存储器及其制造方法
公开(公告)号：US20070108509A1
公开(公告)日：2007-05-17
申请号：US11495780
申请日：2006-07-31
申请人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
发明人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11568
摘要： A semiconductor memory is provided with memory cells including bit lines made of a diffusion layer formed in a semiconductor substrate, charge-trapping gate insulating films formed between the bit lines and word lines formed on the gate insulating films. An interlayer insulating film is formed over the memory cells and bit line contact plugs are formed in the interlayer insulating film to be connected to the bit lines. Further, a light blocking film is formed on at least part of the interlayer insulating film covering the memory cells and part of the light blocking film formed on the interlayer insulating film extends from the surface to the inside of the interlayer insulating film in the neighborhood of the bit line contact plugs.
摘要翻译：半导体存储器设置有存储单元，存储单元包括由在半导体衬底中形成的扩散层构成的位线，形成在位线和形成在栅极绝缘膜上的字线之间的电荷俘获栅极绝缘膜。在存储单元之上形成层间绝缘膜，并且在层间绝缘膜中形成位线接触插塞以连接到位线。此外，在覆盖存储单元的层间绝缘膜的至少一部分上形成遮光膜，并且形成在层间绝缘膜上的遮光膜的一部分从层间绝缘膜的表面延伸到附近的层间绝缘膜的内部位线接触插头。

3. 发明申请

US20060035418A1 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20060035418A1
公开(公告)日：2006-02-16
申请号：US11187958
申请日：2005-07-25
申请人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
发明人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L27/115 , H01L27/11568
摘要： First, on a semiconductor region of a first conductivity type, a trapping film is formed which stores information by accumulating charges. Then, the trapping film is formed with a plurality of openings, and impurity ions of a second conductivity type are implanted into the semiconductor region from the formed openings, thereby forming a plurality of diffused layers of the second conductivity type in portions of the semiconductor region located below the openings, respectively. An insulating film is formed to cover edges of the trapping film located toward the openings, and then the semiconductor region is subjected to a thermal process in an atmosphere containing oxygen to oxidize upper portions of the diffused layers. Thereby, insulating oxide films are formed in the upper portions of the diffused layers, respectively. Subsequently, a conductive film is formed over the trapping film including the edges thereof to form an electrode.
摘要翻译：首先，在第一导电类型的半导体区域上，形成通过累积电荷来存储信息的捕获膜。然后，捕获膜形成有多个开口，并且第二导电类型的杂质离子从形成的开口注入到半导体区域中，从而在半导体区域的部分中形成多个第二导电类型的扩散层分别位于开口下方。形成绝缘膜以覆盖位于开口的捕获膜的边缘，然后在含氧气氛中对半导体区域进行热处理，以氧化扩散层的上部。因此，绝缘氧化膜分别形成在扩散层的上部。随后，在包括其边缘的捕获膜上形成导电膜以形成电极。

4. 发明授权

US07951679B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07951679B2
公开(公告)日：2011-05-31
申请号：US11187958
申请日：2005-07-25
申请人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
发明人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11568
摘要： First, on a semiconductor region of a first conductivity type, a trapping film is formed which stores information by accumulating charges. Then, the trapping film is formed with a plurality of openings, and impurity ions of a second conductivity type are implanted into the semiconductor region from the formed openings, thereby forming a plurality of diffused layers of the second conductivity type in portions of the semiconductor region located below the openings, respectively. An insulating film is formed to cover edges of the trapping film located toward the openings, and then the semiconductor region is subjected to a thermal process in an atmosphere containing oxygen to oxidize upper portions of the diffused layers. Thereby, insulating oxide films are formed in the upper portions of the diffused layers, respectively. Subsequently, a conductive film is formed over the trapping film including the edges thereof to form an electrode.
摘要翻译：首先，在第一导电类型的半导体区域上，形成通过累积电荷来存储信息的捕获膜。然后，捕获膜形成有多个开口，并且第二导电类型的杂质离子从形成的开口注入到半导体区域中，从而在半导体区域的部分中形成多个第二导电类型的扩散层分别位于开口下方。形成绝缘膜以覆盖位于开口的捕获膜的边缘，然后在含氧气氛中对半导体区域进行热处理，以氧化扩散层的上部。因此，绝缘氧化膜分别形成在扩散层的上部。随后，在包括其边缘的捕获膜上形成导电膜以形成电极。

5. 发明授权

US07446381B2 Semiconductor memory device and method for fabricating the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07446381B2
公开(公告)日：2008-11-04
申请号：US11151542
申请日：2005-06-14
申请人： Takahiko Hashidzume , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Takahiko Hashidzume , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L29/72
CPC分类号： H01L27/115 , H01L27/11519 , H01L27/11568
摘要： A semiconductor memory device has a memory region which is formed on a semiconductor substrate and in which a plurality of memory cells each including a memory transistor are arranged as a matrix using a plurality of impurity diffusion layers (bit lines) and a plurality of gate electrodes (word lines) intersecting each other. The gate electrode of each of the memory transistors has an upper surface thereof formed into a protruding portion which is higher in level at the middle portion than at the edge portions. A silicide layer is formed on the upper surface of the protruding portion of the gate electrode of each of the memory transistors.
摘要翻译：半导体存储器件具有形成在半导体衬底上的存储区域，其中使用多个杂质扩散层（位线）和多个栅极电极将包括存储晶体管的多个存储单元布置为矩阵（字线）相交。每个存储晶体管的栅极电极的上表面形成为在中间部分高于边缘部分的高度的突出部分。在每个存储晶体管的栅电极的突出部分的上表面上形成硅化物层。

6. 发明申请

US20060022243A1 Semiconductor memory device and method for fabricating the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20060022243A1
公开(公告)日：2006-02-02
申请号：US11151542
申请日：2005-06-14
申请人： Takahiko Hashidzume , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Takahiko Hashidzume , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L29/94
CPC分类号： H01L27/115 , H01L27/11519 , H01L27/11568
摘要： A semiconductor memory device has a memory region which is formed on a semiconductor substrate and in which a plurality of memory cells each including a memory transistor are arranged as a matrix using a plurality of impurity diffusion layers (bit lines) and a plurality of gate electrodes (word lines) intersecting each other. The gate electrode of each of the memory transistors has an upper surface thereof formed into a protruding portion which is higher in level at the middle portion than at the edge portions. A silicide layer is formed on the upper surface of the protruding portion of the gate electrode of each of the memory transistors.
摘要翻译：半导体存储器件具有形成在半导体衬底上的存储区域，其中使用多个杂质扩散层（位线）和多个栅电极将包括存储晶体管的多个存储单元布置为矩阵（字线）相交。每个存储晶体管的栅极电极的上表面形成为在中间部分高于边缘部分的高度的突出部分。在每个存储晶体管的栅电极的突出部分的上表面上形成硅化物层。

7. 发明申请

US20090057767A1 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR DRIVING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法及其驱动方法
公开(公告)号：US20090057767A1
公开(公告)日：2009-03-05
申请号：US12197541
申请日：2008-08-25
申请人： Nobuyoshi Takahashi , Keita Takahashi
发明人： Nobuyoshi Takahashi , Keita Takahashi
IPC分类号： H01L27/092 , H01L21/8238 , H03K3/353
CPC分类号： H01L27/105 , H01L27/0251
摘要： A semiconductor device includes a protected device formed on a semiconductor substrate, a first protection transistor formed in a second well of a second conductivity type, and a second protection transistor formed in a first well of a first conductivity type. A fourth source/drain diffusion layer of the second protection transistor is in contact with a second diffusion layer, and a third source/drain diffusion layer is in contact with a second source/drain diffusion layer of the first protection transistor in the second well. A first source/drain diffusion layer of the first protection transistor is in contact with a first diffusion layer, which is in contact with a protected device electrode.
摘要翻译：半导体器件包括形成在半导体衬底上的受保护器件，形成在第二导电类型的第二阱中的第一保护晶体管和形成在第一导电类型的第一阱中的第二保护晶体管。第二保护晶体管的第四源极/漏极扩散层与第二扩散层接触，并且第三源极/漏极扩散层与第二阱中的第一保护晶体管的第二源极/漏极扩散层接触。第一保护晶体管的第一源极/漏极扩散层与与被保护器件电极接触的第一扩散层接触。

8. 发明申请

US20100213987A1 SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD FOR THE SAME 审中-公开
标题翻译：半导体存储器件及其驱动方法
公开(公告)号：US20100213987A1
公开(公告)日：2010-08-26
申请号：US12632335
申请日：2009-12-07
申请人： Keita TAKAHASHI , Nobuyoshi Takahashi
发明人： Keita TAKAHASHI , Nobuyoshi Takahashi
IPC分类号： H03K17/687 , H01L29/78
CPC分类号： H01L27/105 , H01L27/0207 , H01L27/0266 , H01L27/11519 , H01L27/11526 , H01L27/11565 , H01L27/11573
摘要： A semiconductor device includes an element to be protected formed on a semiconductor substrate, a first protection transistor, and a second protection transistor. The first protection transistor is formed on a first well of a first conductivity type formed in an upper portion of a deep well of a second conductivity type. The second protection transistor is formed on a second well of the second conductivity type. A second source/drain diffusion layer is electrically connected with a third source/drain diffusion layer and at the same potential as the first well. A fourth source/drain diffusion layer is electrically connected with a second diffusion layer and at the same potential as the second well and the second diffusion layer.
摘要翻译：半导体器件包括形成在半导体衬底上的待保护元件，第一保护晶体管和第二保护晶体管。第一保护晶体管形成在形成在第二导电类型的深阱的上部中的第一导电类型的第一阱上。第二保护晶体管形成在第二导电类型的第二阱上。第二源极/漏极扩散层与第三源极/漏极扩散层电连接并且具有与第一阱相同的电位。第四源极/漏极扩散层与第二扩散层电连接，并且与第二阱和第二扩散层具有相同的电位。

9. 发明申请

US20080048247A1 Semiconductor device and semiconductor device fabrication method 有权
标题翻译：半导体器件和半导体器件制造方法
公开(公告)号：US20080048247A1
公开(公告)日：2008-02-28
申请号：US11806887
申请日：2007-06-05
申请人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L29/792 , H01L21/336 , H01L21/4763
CPC分类号： H01L29/792 , H01L21/0217 , H01L21/02211 , H01L21/02222 , H01L21/02271 , H01L21/02337 , H01L21/28282 , H01L21/3125 , H01L21/3185 , H01L21/76834 , H01L27/115 , H01L27/11568 , H01L29/4234 , H01L29/511 , H01L29/7923
摘要： A semiconductor device includes: source/drain regions formed in a semiconductor substrate; a trapping film for storing information by accumulating charges, the trapping film being formed in a region on the semiconductor substrate which includes a region on a channel region between the source/drain regions; and gate electrodes formed on the trapping film. A silicon nitride film containing carbon is formed by low pressure CVD using an organic material so as to cover the gate electrodes and a part of the trapping film which is located between adjacent gate electrodes.
摘要翻译：半导体器件包括：形成在半导体衬底中的源/漏区; 用于通过累积电荷来存储信息的捕集膜，所述捕获膜形成在所述半导体衬底上的包括所述源极/漏极区之间的沟道区域上的区域的区域中; 以及形成在捕获膜上的栅电极。通过使用有机材料的低压CVD形成含有碳的氮化硅膜，以覆盖位于相邻栅电极之间的栅电极和捕获膜的一部分。

10. 发明授权

US07807557B2 Method of forming a semiconductor device having a trapping film for charge accumulation 有权
标题翻译：形成具有用于电荷累积的捕获膜的半导体器件的方法
公开(公告)号：US07807557B2
公开(公告)日：2010-10-05
申请号：US11806887
申请日：2007-06-05
申请人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L21/76
CPC分类号： H01L29/792 , H01L21/0217 , H01L21/02211 , H01L21/02222 , H01L21/02271 , H01L21/02337 , H01L21/28282 , H01L21/3125 , H01L21/3185 , H01L21/76834 , H01L27/115 , H01L27/11568 , H01L29/4234 , H01L29/511 , H01L29/7923
摘要： A semiconductor device includes: source/drain regions formed in a semiconductor substrate; a trapping film for storing information by accumulating charges, the trapping film being formed in a region on the semiconductor substrate which includes a region on a channel region between the source/drain regions; and gate electrodes formed on the trapping film. A silicon nitride film containing carbon is formed by low pressure CVD using an organic material so as to cover the gate electrodes and a part of the trapping film which is located between adjacent gate electrodes.
摘要翻译：半导体器件包括：形成在半导体衬底中的源/漏区; 用于通过累积电荷来存储信息的捕集膜，所述捕获膜形成在所述半导体衬底上的包括所述源极/漏极区之间的沟道区域上的区域的区域中; 以及形成在捕获膜上的栅电极。通过使用有机材料的低压CVD形成含有碳的氮化硅膜，以覆盖位于相邻栅电极之间的栅电极和捕获膜的一部分。

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