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1. 发明申请

US20110275206A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20110275206A1
公开(公告)日：2011-11-10
申请号：US13102542
申请日：2011-05-06
申请人： Masataka KUSUMI
发明人： Masataka KUSUMI
IPC分类号： H01L21/3205
CPC分类号： H01L27/105 , H01L21/823462 , H01L27/0629 , H01L27/11573
摘要： In a method for fabricating a semiconductor device, a first insulating film which is to serve as a gate insulating film of a protected element is formed on a semiconductor substrate. At least a portion of the first insulating film is removed in a protective element portion. Thereafter, a surface of the first insulating film is nitrided in a protected element portion. A conductive film is selectively formed, extending over the protected element portion and the protective element portion, to form a gate electrode of the protected element and an electrode of a protective element, which are connected together.
摘要翻译：在制造半导体器件的方法中，在半导体衬底上形成用作受保护元件的栅极绝缘膜的第一绝缘膜。在保护元件部分中去除第一绝缘膜的至少一部分。此后，第一绝缘膜的表面在被保护元件部分中被氮化。选择性地形成导电膜，在受保护的元件部分和保护元件部分上延伸，以形成被保护元件的栅极电极和保护元件的电极，它们连接在一起。

2. 发明申请

US20050051837A1 Nonvolatile semiconductor memory device and method of manufacturing the same 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20050051837A1
公开(公告)日：2005-03-10
申请号：US10965955
申请日：2004-10-18
申请人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
发明人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
IPC分类号： H01L21/8247 , H01L21/28 , H01L21/316 , H01L21/336 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792
CPC分类号： H01L29/66825 , H01L29/40114 , H01L29/42324
摘要： Using a rapid thermal oxidation device, the top and side surfaces of a floating gate electrode are oxidized by In Situ Steam Generation (ISSG), wherein oxygen to which about 0.5 to 33% hydrogen has been added is introduced directly into a chamber with a temperature of approximately 900 to 1100° C. and a pressure of approximately 1,000 to 2,000 Pa, in order to generate water vapor from the introduced hydrogen and oxygen on a heated semiconductor substrate. Thus, an insulating film made of silicon oxide is formed on the surface of the floating gate electrode.
摘要翻译：使用快速热氧化装置，浮栅电极的顶表面和侧表面被原位蒸汽发生（ISSG）氧化，其中加入约0.5％至33％氢的氧气直接引入具有温度约900至1100℃，压力为约1,000至2,000Pa，以便在加热的半导体衬底上从引入的氢气和氧气产生水蒸汽。因此，在浮栅电极的表面上形成由氧化硅制成的绝缘膜。

3. 发明授权

US06677203B2 Method of manufacturing a semiconductor memory device which reduces the minimum area requirements of the device 失效
标题翻译：制造半导体存储器件的方法，其减小了器件的最小面积要求
公开(公告)号：US06677203B2
公开(公告)日：2004-01-13
申请号：US09964521
申请日：2001-09-28
申请人： Masataka Kusumi , Seiki Ogura
发明人： Masataka Kusumi , Seiki Ogura
IPC分类号： H01L21336
CPC分类号： H01L27/11521 , H01L27/115
摘要： A semiconductor memory device according to the present invention includes isolations, active regions, control gate electrodes and floating gate electrodes. The isolations are formed on a semiconductor substrate. The active regions are defined on the semiconductor substrate and isolated from each other by the isolations. The control gate electrodes are formed over the semiconductor substrate. Each of the control gate electrodes crosses all of the isolations and all of the active regions with a first insulating film interposed between the control gate electrode and the semiconductor substrate. Each of the floating gate electrodes is formed for associated one of the active regions so as to cover a side face of associated one of the control gate electrodes with a second insulating film interposed between the floating gate electrode and the control gate electrodes. In this device, the isolations are spaced apart from each other along the width of the control gate electrodes and each of the isolations crosses all of the control gate electrodes and extends continuously along the length of the control gate electrodes.
摘要翻译：根据本发明的半导体存储器件包括隔离，有源区，控制栅电极和浮栅电极。隔离物形成在半导体衬底上。有源区限定在半导体衬底上，并通过隔离彼此隔离。控制栅电极形成在半导体衬底上。每个控制栅极电极与介于控制栅极电极和半导体衬底之间的第一绝缘膜与所有的隔离层和所有有源区域交叉。每个浮栅电极被形成为用于相关联的一个有源区域，以便覆盖相关联的一个控制栅电极的侧面，其中第二绝缘膜置于浮置栅电极和控制栅电极之间。在该装置中，隔离件沿着控制栅电极的宽度彼此间隔开，并且每个隔离件跨越所有控制栅电极并沿着控制栅电极的长度连续地延伸。

4. 发明授权

US07897457B2 Method for manufacturing a nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件的制造方法
公开(公告)号：US07897457B2
公开(公告)日：2011-03-01
申请号：US12727711
申请日：2010-03-19
申请人： Masataka Kusumi
发明人： Masataka Kusumi
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/112 , H01L27/11517 , H01L27/11526 , H01L27/11529 , H01L27/11573 , H01L29/665
摘要： Bit line diffusion layers are formed in an upper part of a semiconductor substrate with a bit line contact region being interposed between the bit line diffusion layers. A conductive film is formed over the semiconductor substrate, the bit line diffusion layers, and first gate insulating films. Then, control gate electrodes are formed from the conductive film. Thereafter, at least the first gate insulating film in the bit line contact region is removed, and a connection diffusion layer is formed in the bit line contact region so as to connect the bit line diffusion layers located on both sides of the bit line contact region. When forming the control gate electrodes, the conductive film is left so as to extend over the bit line contact region and over the bit line diffusion layers located on both sides of the bit line contact region.
摘要翻译：位线扩散层形成在半导体衬底的上部，位线接触区域位于位线扩散层之间。在半导体衬底，位线扩散层和第一栅极绝缘膜上形成导电膜。然后，由导电膜形成控制栅电极。此后，除去位线接触区域中的至少第一栅极绝缘膜，并且在位线接触区域中形成连接扩散层，以连接位线位置接触区域两侧的位线扩散层。当形成控制栅电极时，导电膜被留下以便在位线接触区域和位于位线接触区域两侧的位线扩散层之上延伸。

5. 发明授权

US06828621B2 Nonvolatile semiconductor memory device and method for fabricating the same 失效
公开(公告)号：US06828621B2
公开(公告)日：2004-12-07
申请号：US10679431
申请日：2003-10-07
申请人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
发明人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the formation of a floating gate electrode, the floating gate electrode opposed to one of the side surfaces of the control gate electrode with the protective insulating film interposed therebetween so as to be capacitively coupled to the control gate electrode, a tunnel insulating film formed between the floating gate electrode and the semiconductor substrate, a drain region formed in a region of the semiconductor substrate containing a portion underlying the floating gate electrode, and a source region formed in a region of the semiconductor substrate opposite to the drain region relative to the control gate electrode.

6. 发明授权

US06642572B2 Nonvolatile semiconductor memory device and method for fabricating the same 失效
公开(公告)号：US06642572B2
公开(公告)日：2003-11-04
申请号：US10382520
申请日：2003-03-07
申请人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
发明人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the formation of a floating gate electrode, the floating gate electrode opposed to one of the side surfaces of the control gate electrode with the protective insulating film interposed therebetween so as to be capacitively coupled to the control gate electrode, a tunnel insulating film formed between the floating gate electrode and the semiconductor substrate, a drain region formed in a region of the semiconductor substrate containing a portion underlying the floating gate electrode, and a source region formed in a region of the semiconductor substrate opposite to the drain region relative to the control gate electrode.

7. 发明授权

US07807557B2 Method of forming a semiconductor device having a trapping film for charge accumulation 有权
标题翻译：形成具有用于电荷累积的捕获膜的半导体器件的方法
公开(公告)号：US07807557B2
公开(公告)日：2010-10-05
申请号：US11806887
申请日：2007-06-05
申请人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L21/76
CPC分类号： H01L29/792 , H01L21/0217 , H01L21/02211 , H01L21/02222 , H01L21/02271 , H01L21/02337 , H01L21/28282 , H01L21/3125 , H01L21/3185 , H01L21/76834 , H01L27/115 , H01L27/11568 , H01L29/4234 , H01L29/511 , H01L29/7923
摘要： A semiconductor device includes: source/drain regions formed in a semiconductor substrate; a trapping film for storing information by accumulating charges, the trapping film being formed in a region on the semiconductor substrate which includes a region on a channel region between the source/drain regions; and gate electrodes formed on the trapping film. A silicon nitride film containing carbon is formed by low pressure CVD using an organic material so as to cover the gate electrodes and a part of the trapping film which is located between adjacent gate electrodes.
摘要翻译：半导体器件包括：形成在半导体衬底中的源/漏区; 用于通过累积电荷来存储信息的捕集膜，所述捕获膜形成在所述半导体衬底上的包括所述源极/漏极区之间的沟道区域上的区域的区域中; 以及形成在捕获膜上的栅电极。通过使用有机材料的低压CVD形成含有碳的氮化硅膜，以覆盖位于相邻栅电极之间的栅电极和捕获膜的一部分。

8. 发明授权

US06830973B2 Nonvolatile semiconductor memory device and method of manufacturing the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US06830973B2
公开(公告)日：2004-12-14
申请号：US10238636
申请日：2002-09-11
申请人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
发明人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
IPC分类号： H01L218247
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324
摘要： Using a rapid thermal oxidation device, the top and side surfaces of a floating gate electrode are oxidized by In Situ Steam Generation (ISSG), wherein oxygen to which about 0.5 to 33% hydrogen has been added is introduced directly into a chamber with a temperature of approximately 900 to 1100° C. and a pressure of approximately 1,000 to 2,000 Pa, in order to generate water vapor from the introduced hydrogen and oxygen on a heated semiconductor substrate. Thus, an insulating film made of silicon oxide is formed on the surface of the floating gate electrode.
摘要翻译：使用快速热氧化装置，浮栅电极的顶表面和侧表面被原位蒸汽发生（ISSG）氧化，其中加入约0.5％至33％氢的氧气直接引入具有温度约900至1100℃，压力为约1,000至2,000Pa，以便在加热的半导体衬底上从引入的氢气和氧气产生水蒸汽。因此，在浮栅电极的表面上形成由氧化硅制成的绝缘膜。

9. 发明授权

US06784040B2 Nonvolatile semiconductor memory device and method for fabricating the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US06784040B2
公开(公告)日：2004-08-31
申请号：US10382508
申请日：2003-03-07
申请人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
发明人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the formation of a floating gate electrode, the floating gate electrode opposed to one of the side surfaces of the control gate electrode with the protective insulating film interposed therebetween so as to be capacitively coupled to the control gate electrode, a tunnel insulating film formed between the floating gate electrode and the semiconductor substrate, a drain region formed in a region of the semiconductor substrate containing a portion underlying the floating gate electrode, and a source region formed in a region of the semiconductor substrate opposite to the drain region relative to the control gate electrode.
摘要翻译：非易失性半导体存储器件具有沉积在控制栅电极的每个侧表面上的保护绝缘膜，以在形成浮栅电极期间保护控制栅电极，浮置栅极与其中一个侧表面相对控制栅电极，其间插入有保护绝缘膜，以便电容耦合到控制栅电极，形成在浮置栅电极和半导体衬底之间的隧道绝缘膜，形成在半导体衬底的包含并且形成在半导体衬底的与漏极区相对的控制栅电极相对的区域中的源极区。

10. 发明申请

US20100291745A1 METHOD FOR MANUFACTURING A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：制造非易失性半导体存储器件的方法
公开(公告)号：US20100291745A1
公开(公告)日：2010-11-18
申请号：US12727711
申请日：2010-03-19
申请人： Masataka KUSUMI
发明人： Masataka KUSUMI
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/112 , H01L27/11517 , H01L27/11526 , H01L27/11529 , H01L27/11573 , H01L29/665
摘要： Bit line diffusion layers are formed in an upper part of a semiconductor substrate with a bit line contact region being interposed between the bit line diffusion layers. A conductive film is formed over the semiconductor substrate, the bit line diffusion layers, and first gate insulating films. Then, control gate electrodes are formed from the conductive film. Thereafter, at least the first gate insulating film in the bit line contact region is removed, and a connection diffusion layer is formed in the bit line contact region so as to connect the bit line diffusion layers located on both sides of the bit line contact region. When forming the control gate electrodes, the conductive film is left so as to extend over the bit line contact region and over the bit line diffusion layers located on both sides of the bit line contact region.
摘要翻译：位线扩散层形成在半导体衬底的上部，位线接触区域位于位线扩散层之间。在半导体衬底，位线扩散层和第一栅极绝缘膜上形成导电膜。然后，由导电膜形成控制栅电极。此后，除去位线接触区域中的至少第一栅极绝缘膜，并且在位线接触区域中形成连接扩散层，以连接位线位置接触区域两侧的位线扩散层。当形成控制栅电极时，导电膜被留下以便在位线接触区域和位于位线接触区域两侧的位线扩散层之上延伸。

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