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1. 发明授权

US07439577B2 Semiconductor memory and method for manufacturing the same 有权
标题翻译：半导体存储器及其制造方法
公开(公告)号：US07439577B2
公开(公告)日：2008-10-21
申请号：US11495780
申请日：2006-07-31
申请人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
发明人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11568
摘要： A semiconductor memory is provided with memory cells including bit lines made of a diffusion layer formed in a semiconductor substrate, charge-trapping gate insulating films formed between the bit lines and word lines formed on the gate insulating films. An interlayer insulating film is formed over the memory cells and bit line contact plugs are formed in the interlayer insulating film to be connected to the bit lines. Further, a light blocking film is formed on at least part of the interlayer insulating film covering the memory cells and part of the light blocking film formed on the interlayer insulating film extends from the surface to the inside of the interlayer insulating film in the neighborhood of the bit line contact plugs.
摘要翻译：半导体存储器设置有存储单元，存储单元包括由在半导体衬底中形成的扩散层构成的位线，形成在位线和形成在栅极绝缘膜上的字线之间的电荷俘获栅极绝缘膜。在存储单元之上形成层间绝缘膜，并且在层间绝缘膜中形成位线接触插塞以连接到位线。此外，在覆盖存储单元的层间绝缘膜的至少一部分上形成遮光膜，并且形成在层间绝缘膜上的遮光膜的一部分从层间绝缘膜的表面延伸到附近的层间绝缘膜的内部位线接触插头。

2. 发明申请

US20070108509A1 Semiconductor memory and method for manufacturing the same 有权
标题翻译：半导体存储器及其制造方法
公开(公告)号：US20070108509A1
公开(公告)日：2007-05-17
申请号：US11495780
申请日：2006-07-31
申请人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
发明人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11568
摘要： A semiconductor memory is provided with memory cells including bit lines made of a diffusion layer formed in a semiconductor substrate, charge-trapping gate insulating films formed between the bit lines and word lines formed on the gate insulating films. An interlayer insulating film is formed over the memory cells and bit line contact plugs are formed in the interlayer insulating film to be connected to the bit lines. Further, a light blocking film is formed on at least part of the interlayer insulating film covering the memory cells and part of the light blocking film formed on the interlayer insulating film extends from the surface to the inside of the interlayer insulating film in the neighborhood of the bit line contact plugs.
摘要翻译：半导体存储器设置有存储单元，存储单元包括由在半导体衬底中形成的扩散层构成的位线，形成在位线和形成在栅极绝缘膜上的字线之间的电荷俘获栅极绝缘膜。在存储单元之上形成层间绝缘膜，并且在层间绝缘膜中形成位线接触插塞以连接到位线。此外，在覆盖存储单元的层间绝缘膜的至少一部分上形成遮光膜，并且形成在层间绝缘膜上的遮光膜的一部分从层间绝缘膜的表面延伸到附近的层间绝缘膜的内部位线接触插头。

3. 发明申请

US20060035418A1 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20060035418A1
公开(公告)日：2006-02-16
申请号：US11187958
申请日：2005-07-25
申请人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
发明人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L27/115 , H01L27/11568
摘要： First, on a semiconductor region of a first conductivity type, a trapping film is formed which stores information by accumulating charges. Then, the trapping film is formed with a plurality of openings, and impurity ions of a second conductivity type are implanted into the semiconductor region from the formed openings, thereby forming a plurality of diffused layers of the second conductivity type in portions of the semiconductor region located below the openings, respectively. An insulating film is formed to cover edges of the trapping film located toward the openings, and then the semiconductor region is subjected to a thermal process in an atmosphere containing oxygen to oxidize upper portions of the diffused layers. Thereby, insulating oxide films are formed in the upper portions of the diffused layers, respectively. Subsequently, a conductive film is formed over the trapping film including the edges thereof to form an electrode.
摘要翻译：首先，在第一导电类型的半导体区域上，形成通过累积电荷来存储信息的捕获膜。然后，捕获膜形成有多个开口，并且第二导电类型的杂质离子从形成的开口注入到半导体区域中，从而在半导体区域的部分中形成多个第二导电类型的扩散层分别位于开口下方。形成绝缘膜以覆盖位于开口的捕获膜的边缘，然后在含氧气氛中对半导体区域进行热处理，以氧化扩散层的上部。因此，绝缘氧化膜分别形成在扩散层的上部。随后，在包括其边缘的捕获膜上形成导电膜以形成电极。

4. 发明授权

US07951679B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07951679B2
公开(公告)日：2011-05-31
申请号：US11187958
申请日：2005-07-25
申请人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
发明人： Koji Yoshida , Keita Takahashi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11568
摘要： First, on a semiconductor region of a first conductivity type, a trapping film is formed which stores information by accumulating charges. Then, the trapping film is formed with a plurality of openings, and impurity ions of a second conductivity type are implanted into the semiconductor region from the formed openings, thereby forming a plurality of diffused layers of the second conductivity type in portions of the semiconductor region located below the openings, respectively. An insulating film is formed to cover edges of the trapping film located toward the openings, and then the semiconductor region is subjected to a thermal process in an atmosphere containing oxygen to oxidize upper portions of the diffused layers. Thereby, insulating oxide films are formed in the upper portions of the diffused layers, respectively. Subsequently, a conductive film is formed over the trapping film including the edges thereof to form an electrode.
摘要翻译：首先，在第一导电类型的半导体区域上，形成通过累积电荷来存储信息的捕获膜。然后，捕获膜形成有多个开口，并且第二导电类型的杂质离子从形成的开口注入到半导体区域中，从而在半导体区域的部分中形成多个第二导电类型的扩散层分别位于开口下方。形成绝缘膜以覆盖位于开口的捕获膜的边缘，然后在含氧气氛中对半导体区域进行热处理，以氧化扩散层的上部。因此，绝缘氧化膜分别形成在扩散层的上部。随后，在包括其边缘的捕获膜上形成导电膜以形成电极。

5. 发明申请

US20070152265A1 Semiconductor memory device and method for manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20070152265A1
公开(公告)日：2007-07-05
申请号：US11637939
申请日：2006-12-13
申请人： Yoshiya Moriyama , Yuji Harada , Keita Takahashi
发明人： Yoshiya Moriyama , Yuji Harada , Keita Takahashi
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11568
摘要： A semiconductor memory device includes: a memory cell array region formed in a semiconductor region of a first conductivity type and having a plurality of memory cells arranged in rows and columns; a plurality of word lines each of which collectively connects ones of the plurality of memory cells aligned in the same row; and a protective diode region formed in the semiconductor region to be separated from the memory cell array region. In the protective diode region, a protective diode element is constructed by making a junction between a first diffusion layer of a second conductivity type formed in the upper portion of the semiconductor region and the semiconductor region. Each of the word lines extends to the protective diode region and is brought into direct connection to the first diffusion layer of the second conductivity type, thereby making electrical connection to the protective diode element.
摘要翻译：半导体存储器件包括：存储单元阵列区域，形成在第一导电类型的半导体区域中，并具有以行和列排列的多个存储单元; 多个字线，其各自共同连接在同一行中排列的多个存储单元中的一个; 以及形成在半导体区域中以与存储单元阵列区域分离的保护二极管区域。在保护二极管区域中，通过在半导体区域的上部形成的第二导电类型的第一扩散层与半导体区域之间形成接合来构成保护二极管元件。每条字线延伸到保护二极管区，并与第二导电类型的第一扩散层直接连接，从而与保护二极管元件电连接。

6. 发明授权

US07474548B2 Semiconductor memory device and method for manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07474548B2
公开(公告)日：2009-01-06
申请号：US11637939
申请日：2006-12-13
申请人： Yoshiya Moriyama , Yuji Harada , Keita Takahashi
发明人： Yoshiya Moriyama , Yuji Harada , Keita Takahashi
IPC分类号： G11C5/06
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11568
摘要： A semiconductor memory device includes: a memory cell array region formed in a semiconductor region of a first conductivity type and having a plurality of memory cells arranged in rows and columns; a plurality of word lines each of which collectively connects ones of the plurality of memory cells aligned in the same row; and a protective diode region formed in the semiconductor region to be separated from the memory cell array region. In the protective diode region, a protective diode element is constructed by making a junction between a first diffusion layer of a second conductivity type formed in the upper portion of the semiconductor region and the semiconductor region. Each of the word lines extends to the protective diode region and is brought into direct connection to the first diffusion layer of the second conductivity type, thereby making electrical connection to the protective diode element.
摘要翻译：半导体存储器件包括：存储单元阵列区域，形成在第一导电类型的半导体区域中，并具有以行和列排列的多个存储单元; 多个字线，其各自共同连接在同一行中排列的多个存储单元中的一个; 以及形成在半导体区域中以与存储单元阵列区域分离的保护二极管区域。在保护二极管区域中，通过在半导体区域的上部形成的第二导电类型的第一扩散层与半导体区域之间形成接合来构成保护二极管元件。每条字线延伸到保护二极管区，并与第二导电类型的第一扩散层直接连接，从而与保护二极管元件电连接。

7. 发明申请

US20090057767A1 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR DRIVING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法及其驱动方法
公开(公告)号：US20090057767A1
公开(公告)日：2009-03-05
申请号：US12197541
申请日：2008-08-25
申请人： Nobuyoshi Takahashi , Keita Takahashi
发明人： Nobuyoshi Takahashi , Keita Takahashi
IPC分类号： H01L27/092 , H01L21/8238 , H03K3/353
CPC分类号： H01L27/105 , H01L27/0251
摘要： A semiconductor device includes a protected device formed on a semiconductor substrate, a first protection transistor formed in a second well of a second conductivity type, and a second protection transistor formed in a first well of a first conductivity type. A fourth source/drain diffusion layer of the second protection transistor is in contact with a second diffusion layer, and a third source/drain diffusion layer is in contact with a second source/drain diffusion layer of the first protection transistor in the second well. A first source/drain diffusion layer of the first protection transistor is in contact with a first diffusion layer, which is in contact with a protected device electrode.
摘要翻译：半导体器件包括形成在半导体衬底上的受保护器件，形成在第二导电类型的第二阱中的第一保护晶体管和形成在第一导电类型的第一阱中的第二保护晶体管。第二保护晶体管的第四源极/漏极扩散层与第二扩散层接触，并且第三源极/漏极扩散层与第二阱中的第一保护晶体管的第二源极/漏极扩散层接触。第一保护晶体管的第一源极/漏极扩散层与与被保护器件电极接触的第一扩散层接触。

8. 发明申请

US20100317183A1 METHOD FOR FABRICATING SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：制造半导体存储器件的方法
公开(公告)号：US20100317183A1
公开(公告)日：2010-12-16
申请号：US12752740
申请日：2010-04-01
申请人： Koji YOSHIDA , Keita Takahashi
发明人： Koji YOSHIDA , Keita Takahashi
IPC分类号： H01L21/28
CPC分类号： H01L27/11568
摘要： By removing an interlayer insulating film from a memory cell region in which a plurality of bit line diffusion layers and a plurality of word lines are formed, a trench which exposes the plurality of word lines and the sidewall insulating film is formed on the memory cell region. Thereafter, an ultraviolet light blocking film is formed on the exposed word lines and sidewall insulating film to fill the trench. Here, in the step of forming the trench, the trench is formed so that an end of the trench in a direction in which the bit line diffusion layers are extended is located on a word line located at an outermost portion of the memory cell region.
摘要翻译：通过从形成多个位线扩散层和多个字线的存储单元区域去除层间绝缘膜，在存储单元区域上形成露出多个字线和侧壁绝缘膜的沟槽。此后，在暴露的字线和侧壁绝缘膜上形成紫外线阻挡膜以填充沟槽。这里，在形成沟槽的步骤中，形成沟槽，使得沟槽的沿着位线扩散层延伸的方向的端部位于位于存储单元区域的最外部的字线上。

9. 发明授权

US09090802B2 Polarizing plate, image display apparatus including the same, and adhesive composition 有权
标题翻译：偏光板，包括其的图像显示装置和粘合剂组合物
公开(公告)号：US09090802B2
公开(公告)日：2015-07-28
申请号：US13600030
申请日：2012-08-30
申请人： Keita Takahashi
发明人： Keita Takahashi
IPC分类号： G02B5/30 , C09J103/02 , C09J105/16 , C09J139/06 , C09J139/08 , C08G18/64 , C08G18/79 , C08G18/28 , C09J175/04 , C08L39/04 , C08K5/29 , C08L5/16
CPC分类号： C09J103/02 , C08G18/283 , C08G18/6484 , C08G18/792 , C08K5/29 , C08L5/16 , C08L39/04 , C09J105/16 , C09J139/06 , C09J139/08 , C09J175/04 , G02B5/3016
摘要： To reduce blister defects of a polarizing plate comprising a cured layer of a curable composition. A polarizing plate comprising: a polarizer; a cured layer of a curable composition; and at least one layer containing an iodine scavenger disposed between the polarizer and the cured layer. the iodine scavenger is at least one selected from the group consisting of starches, cyclodextrins, polyvinylpyridines, and polyvinylpyrrolidones.
摘要翻译：为了减少包含可固化组合物的固化层的偏振片的泡罩缺陷。一种偏振片，包括：偏振器; 可固化组合物的固化层; 以及至少一层含有碘清除剂的层，其设置在偏光镜和固化层之间。碘清除剂是选自淀粉，环糊精，聚乙烯基吡啶和聚乙烯吡咯烷酮中的至少一种。

10. 发明授权

US08576427B2 Image forming apparatus implemented by a distributed control system 有权
标题翻译：由分布式控制系统实现的图像形成装置
公开(公告)号：US08576427B2
公开(公告)日：2013-11-05
申请号：US12713129
申请日：2010-02-25
申请人： Akihiko Sakai , Atsushi Otani , Shigeo Hata , Shoji Takeda , Satoru Yamamoto , Keita Takahashi , Hirotaka Seki
发明人： Akihiko Sakai , Atsushi Otani , Shigeo Hata , Shoji Takeda , Satoru Yamamoto , Keita Takahashi , Hirotaka Seki
IPC分类号： G06F3/12
CPC分类号： G03G15/50
摘要： There are provided an image forming apparatus which implements divisional control using a plurality of control units without an increase in cost and a control method for the apparatus. To accomplish this, this image forming apparatus includes a master control unit that controls the overall image forming apparatus, a plurality of sub-master control units that control a plurality of functions for performing image formation, and a plurality of salve control units that control loads for implementing a plurality of functions. The master control unit is connected to the plurality of sub-master control units via first signal lines. The plurality of sub-master control units are connected to the plurality of slave control units via second signal lines higher in data transfer timing accuracy than the first signal lines.
摘要翻译：提供了一种图像形成装置，其使用多个控制单元实现分割控制，而不增加成本，并且该装置的控制方法。为了实现这一点，该图像形成装置包括控制整个图像形成装置的主控制单元，控制用于执行图像形成的多个功能的多个子主控制单元和控制负载的多个控制单元用于实现多个功能。主控单元经由第一信号线与多个子主控单元连接。多个子主控制单元经由比数据传送定时精度高于第一信号线的第二信号线连接到多个从属控制单元。

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