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1. 发明授权

US06323141B1 Method for forming anti-reflective coating layer with enhanced film thickness uniformity 有权
标题翻译：用于形成具有增强的膜厚均匀性的抗反射涂层的方法
公开(公告)号：US06323141B1
公开(公告)日：2001-11-27
申请号：US09541485
申请日：2000-04-03
申请人： Szu-Au Wu , Chun-Ching Tsan , Wen-Kung Cheng , Ying-Lang Wang
发明人： Szu-Au Wu , Chun-Ching Tsan , Wen-Kung Cheng , Ying-Lang Wang
IPC分类号： H01L2131
CPC分类号： H01L21/3145 , C23C16/24 , C23C16/402 , H01L21/02164 , H01L21/02211 , H01L21/02274 , H01L21/0276 , H01L21/28123 , H01L21/31612 , H01L21/32137 , H01L21/32139
摘要： A method for forming a patterned reflective layer first employs a substrate. There is then formed over the substrate a blanket reflective layer. There is then formed upon the blanket reflective layer an anti-reflective coating (ARC) layer formed employing a plasma enhanced chemical vapor deposition (PECVD) method employing a deposition gas composition comprising silane, nitrous oxide and argon. There is then formed upon the blanket anti-reflective coating (ARC) layer a blanket photoresist layer. There is then photoexposed and developed the blanket photoresist layer to form a patterned photoresist layer. There is then etched, while employing a first etch method, the blanket anti-reflective coating (ARC) layer to form a patterned anti-reflective coating (ARC) layer while employing the patterned photoresist layer as a first etch mask layer. Finally, there is then etched, while employing a second etch method, the blanket reflective layer to form the patterned reflective layer while employing at least the patterned anti-reflective coating (ARC) layer as a second etch mask layer.
摘要翻译：用于形成图案化反射层的方法首先采用基板。然后在衬底上形成覆盖层反射层。然后在毯反射层上形成使用采用包含硅烷，一氧化二氮和氩的沉积气体组合物的等离子体增强化学气相沉积（PECVD）方法形成的抗反射涂层（ARC）层。然后在橡皮布抗反射涂层（ARC）层上形成覆盖光致抗蚀剂层。然后，将曝光的光刻胶照射并显影，以形成图案化的光致抗蚀剂层。然后，在采用第一蚀刻方法的情况下，使用覆盖层抗反射涂层（ARC）层，同时使用图案化的光致抗蚀剂层作为第一蚀刻掩模层，来形成图案化的抗反射涂层（ARC）层。最后，在采用第二蚀刻方法的同时，使用至少图案化的抗反射涂层（ARC）层作为第二蚀刻掩模层，同时使用第二蚀刻方法来蚀刻，以形成图案化的反射层。

2. 发明授权

US6136680A Methods to improve copper-fluorinated silica glass interconnects 有权
标题翻译：改善铜氟化石英玻璃互连的方法
公开(公告)号：US6136680A
公开(公告)日：2000-10-24
申请号：US489498
申请日：2000-01-21
申请人： Jane-Bai Lai , Chung-Shi Liu , Tien-I Bao , Syun-Ming Jang , Chung-Long Chang , Hui-Ling Wang , Szu-An Wu , Wen-Kung Cheng , Chun-Ching Tsan , Ying-Lang Wang
发明人： Jane-Bai Lai , Chung-Shi Liu , Tien-I Bao , Syun-Ming Jang , Chung-Long Chang , Hui-Ling Wang , Szu-An Wu , Wen-Kung Cheng , Chun-Ching Tsan , Ying-Lang Wang
IPC分类号： H01L21/02 , H01L21/3105 , H01L21/321 , H01L21/768 , H01L21/44 , H01L21/4763
CPC分类号： H01L21/76825 , H01L21/02074 , H01L21/3105 , H01L21/3212 , H01L21/76826 , H01L21/76834 , H01L21/7684 , H01L21/76883
摘要： A method of forming an interconnect, comprising the following steps. A semiconductor structure is provided that has an exposed first metal contact and a dielectric layer formed thereover. An FSG layer having a predetermined thickness is then formed over the dielectric layer. A trench, having a predetermined width, is formed within the FSG layer and the dielectric layer exposing the first metal contact. A barrier layer, having a predetermined thickness, may be formed over the FSG layer and lining the trench side walls and bottom. A metal, preferably copper, is then deposited on the barrier layer to form a copper layer, having a predetermined thickness, over said barrier layer covered FSG layer, filling the lined trench and blanket filling the barrier layer covered FSG layer. The copper layer, and the barrier layer on said upper surface of said FSG layer, are planarized, exposing the upper surface of the FSG layer and forming a planarized copper filled trench. The FSG layer and planarized copper filled trench are then processed by either: (1) annealing from about 400 to 450.degree. C. for about one hour, then either NH.sub.3 or H.sub.2 plasma treating; or (2) Ar.sup.+ sputtering to ion implant Ar.sup.+ to a depth of less than about 300 .ANG. in the fluorinated silica glass layer, whereby any formed Si--OH bonds and copper oxide (metal oxide) are removed. A dielectric cap layer, having a predetermined thickness, is then formed over the processed FSG layer and the planarized copper filled trench.
摘要翻译：一种形成互连的方法，包括以下步骤。提供一种半导体结构，其具有暴露的第一金属触点和形成在其上的电介质层。然后在电介质层上形成具有预定厚度的FSG层。具有预定宽度的沟槽形成在FSG层内，并且介电层露出第一金属接触。具有预定厚度的阻挡层可以形成在FSG层之上并且衬在沟槽侧壁和底部。然后将一种金属，优选铜沉积在阻挡层上，以形成具有预定厚度的铜层，超过所述阻挡层覆盖的FSG层，填充衬里的沟槽和覆盖填充阻挡层覆盖的FSG层的毯子。所述FSG层的所述上表面上的铜层和阻挡层被平坦化，暴露出FSG层的上表面并形成平坦化的铜填充沟槽。然后通过以下步骤之一处理FSG层和平坦化的铜填充沟槽：（1）从约400至450℃的退火约1小时，然后进行NH 3或H 2等离子体处理; 或者（2）在氟化石英玻璃层中，离子注入Ar +溅射至小于约300的深度，由此除去任何形成的Si-OH键和氧化铜（金属氧化物）。然后在经处理的FSG层和平坦化的铜填充沟槽上形成具有预定厚度的电介质盖层。

3. 发明授权

US06584987B1 Method for improved cleaning in HDP-CVD process with reduced NF3 usage 有权
标题翻译：改善HDP-CVD工艺清洗方法，减少NF3使用的方法
公开(公告)号：US06584987B1
公开(公告)日：2003-07-01
申请号：US09808929
申请日：2001-03-16
申请人： Yi-Lung Cheng , Chun-Ching Tsan , Wen-Kung Cheng , Yin-Lang Wang
发明人： Yi-Lung Cheng , Chun-Ching Tsan , Wen-Kung Cheng , Yin-Lang Wang
IPC分类号： B08B704
CPC分类号： H01J37/32862 , B08B7/0035 , C23C16/4405 , Y10S438/905
摘要： A method for cleaning residual material from a chemical vapor deposition (CVD) apparatus in situ employing dry etching. There is first employed a high density plasma chemical vapor deposition (HDP-CVD) method to deposit layers of silicon oxide material upon substrates within a chemical vapor deposition reactor apparatus. After removal of substrates, the reactor chamber is closed off. The interior of the reactor is then filled with a gas and a plasma formed therewithin, to which oxygen is added and the reactor allowed to come to an increased temperature and bake for a period of time. The reactor power is then turned off and the reactor evacuated. There is then carried out a normal cleaning step within the reactor chamber employing a reactive gas such as NF3, with greater cleaning efficiency due to the increased temperature caused by the baking step.
摘要翻译：一种从化学气相沉积（CVD）装置中原位采用干法蚀刻来清除残余物质的方法。首先采用高密度等离子体化学气相沉积（HDP-CVD）方法在化学气相沉积反应器装置中的衬底上沉积氧化硅材料层。在移除基板之后，关闭反应室。然后将反应器的内部填充有在其中形成的气体和等离子体，向其中加入氧并使反应器升温并烘烤一段时间。然后关闭反应堆功率，反应器排空。然后，使用反应气体如NF3在反应器室内进行正常的清洗步骤，由于烘烤步骤引起的温度升高，清洗效率更高。

4. 发明授权

US06660638B1 CMP process leaving no residual oxide layer or slurry particles 有权
标题翻译： CMP工艺不留下残留的氧化物层或浆料颗粒
公开(公告)号：US06660638B1
公开(公告)日：2003-12-09
申请号：US10038389
申请日：2002-01-03
申请人： Ying-Lang Wang , Shih-Chi Lin , Yi-Lung Cheng , Chi-Wen Liu , Ming-Hua Yoo , Wen-Kung Cheng , Jiann-Kwang Wang
发明人： Ying-Lang Wang , Shih-Chi Lin , Yi-Lung Cheng , Chi-Wen Liu , Ming-Hua Yoo , Wen-Kung Cheng , Jiann-Kwang Wang
IPC分类号： H01L21461
CPC分类号： C09G1/02 , H01L21/3212 , H01L21/7684
摘要： Two problems seen in CMP as currently executed are a tendency for slurry particles to remain on the surface and the formation of a final layer of oxide. These problems have been solved by adding to the slurry a quantity of TMAH or TBAH. This has the effect of rendering the surface being polished hydrophobic. In that state a residual layer of oxide will not be left on the surface at the conclusion of CMP. Nor will many slurry abrasive particles remain cling to the freshly polished surface. Those that do are readily removed by a simple rinse or buffing. As an alternative, the CMP process may be performed in three stages—first convention CMP, then polishing in a solution of TMAH or TBAH, and finally a gentle rinse or buffing.
摘要翻译：当前执行的CMP中看到的两个问题是浆料颗粒保留在表面上并形成最后一层氧化物的倾向。这些问题已经通过向浆料中加入一定量的TMAH或TBAH来解决。这具有使表面被抛光的疏水性的效果。在该状态下，在CMP结束时，残留的氧化层不会残留在表面上。许多浆料磨料颗粒也不会保持粘附到新鲜抛光的表面。那些可以通过简单的冲洗或抛光容易地去除。作为替代方案，CMP工艺可以分三个阶段执行 - 第一个惯例CMP，然后在TMAH或TBAH的溶液中抛光，最后进行柔和的冲洗或抛光。

5. 发明授权

US07125802B2 CMP process leaving no residual oxide layer or slurry particles 有权
公开(公告)号：US07125802B2
公开(公告)日：2006-10-24
申请号：US10696432
申请日：2003-10-29
申请人： Ying-Lang Wang , Shih-Chi Lin , Yi-Lung Cheng , Chi-Wen Liu , Ming-Hua Yoo , Wen-Kung Cheng , Jiann-Kwang Wang
发明人： Ying-Lang Wang , Shih-Chi Lin , Yi-Lung Cheng , Chi-Wen Liu , Ming-Hua Yoo , Wen-Kung Cheng , Jiann-Kwang Wang
IPC分类号： H01L21/306
CPC分类号： C09G1/02 , H01L21/3212 , H01L21/7684
摘要： Two problems seen in CMP as currently executed are a tendency for slurry particles to remain on the surface and the formation of a final layer of oxide. These problems have been solved by adding to the slurry a quantity of TMAH or TBAH. This has the effect of rendering the surface being polished hydrophobic. In that state a residual layer of oxide will not be left on the surface at the conclusion of CMP. Nor will many slurry abrasive particles remain cling to the freshly polished surface. Those that do are readily removed by a simple rinse or buffing. As an alternative, the CMP process may be performed in three stages—first convention CMP, then polishing in a solution of TMAH or TBAH, and finally a gentle rinse or buffing.

6. 发明授权

US06558228B1 Method of unloading substrates in chemical-mechanical polishing apparatus 有权
标题翻译：在化学机械抛光装置中卸载基板的方法
公开(公告)号：US06558228B1
公开(公告)日：2003-05-06
申请号：US09439363
申请日：1999-11-15
申请人： Wen-Kung Cheng , Hung-Ju Chien , Jin-Chang Chen , Ying-Lang Wang
发明人： Wen-Kung Cheng , Hung-Ju Chien , Jin-Chang Chen , Ying-Lang Wang
IPC分类号： B24B4900
CPC分类号： B24B37/30 , H01L21/30625
摘要： An improved and new process for separating a substrate from a wetted polishing pad in a CMP apparatus has been developed. Following CMP the polishing pad is wetted with a low surface tension liquid and the substrate is moved across the surface of the polishing pad to cause the interface between the substrate and the polishing pad to be wetted with the low surface tension liquid. The force required to cause separation of the substrate from the polishing pad wetted with said low surface tension liquid is reduced by a factor of about 10 to 30% and the breakage of fragile semiconductor wafer substrates during the unloading operation is markedly reduced. Suitable low surface tension liquids are water at a temperature between about 50° C. and 80° C., or solutions of water with long chain surfactants, such as poly-acrylate, poly-vinyl alcohol, butanol, pantanol or isopropol alcohol.
摘要翻译：已经开发了一种用于在CMP设备中从衬底浸渍的抛光垫分离衬底的改进和新的方法。在CMP之后，抛光垫用低表面张力液体润湿，并且将衬底移动穿过抛光垫的表面，以使衬底和抛光垫之间的界面用低表面张力液体润湿。导致基板与被所述低表面张力液体润湿的抛光垫分离所需的力降低约10％至30％，并且在卸载操作期间脆性半导体晶片基板的断裂显着降低。合适的低表面张力液体是在约50℃至80℃之间的温度下的水，或水与长链表面活性剂如聚丙烯酸酯，聚乙烯醇，丁醇，金刚烷醇或异丙醇的溶液。

7. 发明授权

US06903019B2 CMP process leaving no residual oxide layer or slurry particles 失效
标题翻译： CMP工艺不留下残留的氧化物层或浆料颗粒
公开(公告)号：US06903019B2
公开(公告)日：2005-06-07
申请号：US10706495
申请日：2003-11-12
申请人： Ying-Lang Wang , Shih-Chi Lin , Yi-Lung Cheng , Chi-Wen Liu , Ming-Hua Yoo , Wen-Kung Cheng , Jiann-Kwang Wang
发明人： Ying-Lang Wang , Shih-Chi Lin , Yi-Lung Cheng , Chi-Wen Liu , Ming-Hua Yoo , Wen-Kung Cheng , Jiann-Kwang Wang
IPC分类号： C09G1/02 , H01L21/321 , H01L21/768 , H01L21/461
CPC分类号： C09G1/02 , H01L21/3212 , H01L21/7684
摘要： Two problems seen in CMP as currently executed are a tendency for slurry particles to remain on the surface and the formation of a final layer of oxide. These problems have been solved by adding to the slurry a quantity of TMAH or TBAH. This has the effect of rendering the surface being polished hydrophobic. In that state a residual layer of oxide will not be left on the surface at the conclusion of CMP. Nor will many slurry abrasive particles remain cling to the freshly polished surface. Those that do are readily removed by a simple rinse or buffing. As an alternative, the CMP process may be performed in three stages—first convention CMP, then polishing in a solution of TMAH or TBAH, and finally a gentle rinse or buffing.
摘要翻译：当前执行的CMP中看到的两个问题是浆料颗粒保留在表面上并形成最后一层氧化物的倾向。这些问题已经通过向浆料中加入一定量的TMAH或TBAH来解决。这具有使表面被抛光的疏水性的效果。在该状态下，在CMP结束时，残留的氧化层不会残留在表面上。许多浆料磨料颗粒也不会保持粘附到新鲜抛光的表面。那些可以通过简单的冲洗或抛光容易地去除。作为替代方案，CMP工艺可以在三个阶段进行 - 第一个惯例CMP，然后在TMAH或TBAH的溶液中抛光，最后进行温和的冲洗或抛光。

8. 发明授权

US06713407B1 Method of forming a metal nitride layer over exposed copper 失效
标题翻译：在暴露的铜上形成金属氮化物层的方法
公开(公告)号：US06713407B1
公开(公告)日：2004-03-30
申请号：US10284399
申请日：2002-10-29
申请人： Yi-Lung Cheng , Wen-Kung Cheng , Sez-An Wu , Yi-Lung Wang , Shin-Chi Lin
发明人： Yi-Lung Cheng , Wen-Kung Cheng , Sez-An Wu , Yi-Lung Wang , Shin-Chi Lin
IPC分类号： H01L2131
CPC分类号： H01L21/3185 , C23C16/0245 , H01L21/76807 , H01L21/76834 , H01L21/76838
摘要： A method of depositing a plasma enhanced CVD metal nitride layer over an exposed copper surface in a semiconductor wafer manufacturing process to improve the metal nitride layer adhesion and to reduce copper hillock formation including providing a process surface which is an exposed copper surface; preheating the process surface; plasma sputtering the exposed copper surface in-situ to remove copper oxides; and, depositing a metal nitride layer in-situ according to a plasma enhanced CVD process at a selected deposition pressure to reduce plasma ion bombardment energy transfer and to suppress-copper hillock formation.
摘要翻译：一种在半导体晶片制造工艺中在暴露的铜表面上沉积等离子体增强的CVD金属氮化物层的方法，以改善金属氮化物层的粘合性并减少铜的小丘形成，包括提供作为暴露的铜表面的工艺表面; 预热过程表面; 等离子体溅射暴露的铜表面以去除铜氧化物; 以及根据等离子体增强CVD工艺在选定的沉积压力下原位沉积金属氮化物层以减少等离子体离子轰击能量转移并抑制铜小丘形成。

9. 发明授权

US06499222B1 Template for measuring edge width and method of using 有权
标题翻译：用于测量边缘宽度的模板和使用方法
公开(公告)号：US06499222B1
公开(公告)日：2002-12-31
申请号：US09240414
申请日：1999-01-29
申请人： Hung-Ju Chien , Ying-Hsiang Chen , Wen-Kung Cheng , Yin-Lang Wang
发明人： Hung-Ju Chien , Ying-Hsiang Chen , Wen-Kung Cheng , Yin-Lang Wang
IPC分类号： G01B314
CPC分类号： G01B3/14
摘要： A template for measuring the edge width on a disk that is not covered by a coating layer on a top surface of the disk and a method for using such template are disclosed. The template is made of a substantially transparent sheet that has a contour substantially the same as the contour of the disk to be measured. A series of marks are provided on a top surface of the sheet along a peripheral edge of the sheet at numerous predetermined distances from the peripheral edge. The marks may be provided in scribed thin lines, or the marks may be provided in scribed thin lines that are color coded for easier identification purpose. The present invention novel template can be most suitably used on a silicon wafer of any size. However, it can also be used on a disk of any shape or contour to produce the same desirable result.
摘要翻译：公开了一种用于测量不被盘顶表面上的涂层覆盖的盘上的边缘宽度的模板以及使用该模板的方法。该模板由基本上透明的片材制成，其具有与要测量的盘的轮廓基本相同的轮廓。沿着片材的周边边缘以距离周边边缘多个预定距离的方式，在片材的顶表面上提供一系列标记。标记可以以划线的细线提供，或者标记可以以划线的细线提供，其颜色编码以便于识别目的。本发明的新型模板可以最适用于任何尺寸的硅晶片。然而，它也可以用于任何形状或轮廓的盘上以产生相同的期望结果。

10. 发明申请

US20080083938A1 IMAGE SENSORS AND METHODS OF FABRICATING IMAGE SENSORS 有权
标题翻译：图像传感器和图像传感器的制作方法
公开(公告)号：US20080083938A1
公开(公告)日：2008-04-10
申请号：US11548189
申请日：2006-10-10
申请人： Yao Hsiang Liang , Wen-Kung Cheng , Chen-Peng Fan , Ming-Hsien Chen , Richard Chen , Jung-Chen Yang , Wen-Yu Ho , Chao-Keng Li , Yong-Sin Chang , Labo Chang
发明人： Yao Hsiang Liang , Wen-Kung Cheng , Chen-Peng Fan , Ming-Hsien Chen , Richard Chen , Jung-Chen Yang , Wen-Yu Ho , Chao-Keng Li , Yong-Sin Chang , Labo Chang
IPC分类号： H01L31/06 , H01L21/00
CPC分类号： H01L27/14609 , H01L27/14643 , H01L27/14689
摘要： A semiconductor structure includes a transistor formed over a substrate. The transistor includes a transistor gate and at least one source/drain region. The semiconductor structure includes a pre-determined region coupled to the transistor. The semiconductor structure further includes a resist protection oxide (RPO) layer formed over the pre-determined region, wherein the RPO layer has a level of nitrogen of about 0.35 atomic % or less.
摘要翻译：半导体结构包括形成在衬底上的晶体管。晶体管包括晶体管栅极和至少一个源极/漏极区域。半导体结构包括耦合到晶体管的预定区域。半导体结构还包括形成在预定区域上的抗蚀剂保护氧化物（RPO）层，其中RPO层具有约0.35原子％或更低的氮含量。

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