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    • 3. 发明授权
    • Process for manufacturing a multi-layer circuit board
    • 制造多层电路板的工艺
    • US06391210B2
    • 2002-05-21
    • US09901848
    • 2001-07-09
    • Bernd K. AppeltJohn M. LaufferVoya R. MarkovichIrving MemisDavid J. Russell
    • Bernd K. AppeltJohn M. LaufferVoya R. MarkovichIrving MemisDavid J. Russell
    • H01B1300
    • H05K3/4652H05K3/0023H05K3/0035H05K2203/0508H05K2203/0554
    • A circuit board having a structure including a permanent photoimageable dielectric material suitable for fabrication of vias both by laser ablation, plasma ablation, or mechanical drilling techniques and by photoimaging techniques. A process is also disclosed for the manufacture of a multi-level circuit on a substrate having a first-level circuitry pattern on at least one side. The process comprises applying a permanent photoimageable dielectric over the first-level circuitry pattern; exposing the permanent photoimageable dielectric to radiation; laminating a conductive metal layer to the dielectric; making holes in the conductive metal layer and dielectric by mechanical drilling or by laser or plasma ablation; and making a second-level circuitry pattern and filling the holes with a conductive material to electrically connect the first and second layers of circuitry. A further process is claimed for designing a multi-level circuit board product comprising making a prototype having the above structure in which the holes are manufactured by mechanical drilling or by laser or plasma ablation, evaluating the prototype, and then manufacturing a commercial circuit board having essentially the same structure and materials of construction as the prototype, but wherein the holes are manufactured by photoimaging techniques.
    • 一种电路板,其结构包括适用于通过激光烧蚀,等离子体消融或机械钻孔技术制造通孔的永久可光成像介电材料,以及通过光成像技术。 还公开了一种用于在至少一侧具有第一级电路图案的衬底上制造多电平电路的工艺。 该过程包括在第一级电路图案上施加永久可光成像电介质; 将永久可光成像电介质暴露于辐射; 将导电金属层层叠到电介质上; 通过机械钻孔或通过激光或等离子体消融在导电金属层和电介质中形成孔; 以及制作二级电路图案,并用导电材料填充所述孔,以电连接所述第一和第二层电路。 要求设计多级电路板产品的另一方法包括制造具有上述结构的原型,其中通过机械钻孔或通过激光或等离子体烧蚀制造孔,评估原型,然后制造商业电路板,其具有 基本上与原型相同的结构和结构材料,但是其中孔通过光成像技术制造。
    • 4. 发明授权
    • Process for design and manufacture of fine line circuits on planarized thin film dielectrics and circuits manufactured thereby
    • 在平面化薄膜电介质和由此制造的电路上设计和制造细线电路的方法
    • US06290860B1
    • 2001-09-18
    • US09283679
    • 1999-04-01
    • Bernd K. AppeltJohn M. LaufferVoya R. MarkovichIrving MemisDavid J. Russell
    • Bernd K. AppeltJohn M. LaufferVoya R. MarkovichIrving MemisDavid J. Russell
    • H01B1300
    • H05K3/4652H05K3/0023H05K3/0035H05K2203/0508H05K2203/0554
    • A circuit board having a structure including a permanent photoimageable dielectric material suitable for fabrication of vias both by laser ablation, plasma ablation, or mechanical drilling techniques and by photoimaging techniques. A process is also disclosed for the manufacture of a multi-level circuit on a substrate having a first-level circuitry pattern on at least one side. The process comprises applying a permanent photoimageable dielectric over the first-level circuitry pattern; exposing the permanent photoimageable dielectric to radiation; laminating a conductive metal layer to the dielectric; making holes in the conductive metal layer and dielectric by mechanical drilling or by laser or plasma ablation; and making a second-level circuitry pattern and filling the holes with a conductive material to electrically connect the first and second layers of circuitry. A further process is claimed for designing a multi-level circuit board product comprising making a prototype having the above structure in which the holes are manufactured by mechanical drilling or by laser or plasma ablation, evaluating the prototype, and then manufacturing a commercial circuit board having essentially the same structure and materials of construction as the prototype, but wherein the holes are manufactured by photoimaging techniques.
    • 一种电路板,其结构包括适用于通过激光烧蚀,等离子体消融或机械钻孔技术制造通孔的永久可光成像介电材料,以及通过光成像技术。 还公开了一种用于在至少一侧具有第一级电路图案的衬底上制造多电平电路的工艺。 该过程包括在第一级电路图案上施加永久可光成像电介质; 将永久可光成像电介质暴露于辐射; 将导电金属层层叠到电介质上; 通过机械钻孔或通过激光或等离子体消融在导电金属层和电介质中形成孔; 以及制作二级电路图案,并用导电材料填充所述孔,以电连接所述第一和第二层电路。 要求设计多级电路板产品的另一方法包括制造具有上述结构的原型,其中通过机械钻孔或通过激光或等离子体烧蚀制造孔,评估原型,然后制造商业电路板,其具有 基本上与原型相同的结构和结构材料,但是其中孔通过光成像技术制造。
    • 9. 发明授权
    • Method of forming a chip carrier by joining a laminate layer and stiffener
    • 通过接合层压层和加强件形成芯片载体的方法
    • US06519843B2
    • 2003-02-18
    • US09772418
    • 2001-01-30
    • John M. LaufferHeike MarcelloDavid J. Russell
    • John M. LaufferHeike MarcelloDavid J. Russell
    • H05K334
    • H05K3/0061H01L21/4803H01L23/36H01L2924/0002H05K1/183H05K3/0023H05K3/386Y10T29/49126Y10T29/4913Y10T29/49131Y10T29/49144Y10T29/49155Y10T29/53178Y10T156/1798H01L2924/00
    • A cavity-type chip module. The module is formed with an adhesive joining layer of photoimageable material interposed between a metal stiffener and a laminate top layer with a central aperture defined in the top layer. The photoimageable material is exposed to actinic radiation, except for an area corresponding to the aperture in the top layer. The unexposed area of photoimageable material is developed away to form a window in the joining layer. The top layer, joining layer, and stiffener are laminated together with the window and aperture aligned, and with a portion of the stiffener spanning the aperture to define a cavity in the resulting substrate. The removal of the unexposed photoimageable material, and the selective exposure of the joining layer to actinic radiation, keep the cavity free of photoimageable material and inhibit bleeding of the photoimageable material into the cavity from its inner edge. As a result, a semiconductor component can be flush mounted in the cavity with optimal thermal conductivity to the metal stiffener.
    • 腔型芯片模块。 该模块形成有介于金属加强件和层压顶层之间的可光成像材料的粘合剂接合层,中间孔限定在顶层中。 可光成像材料暴露于光化辐射,除了与顶层中的孔相对应的区域之外。 可光成像材料的未曝光区域被开发出来以在接合层中形成窗口。 将顶层,接合层和加强件层压在一起,窗口和孔对齐,并且加强件的一部分跨越孔以在所得到的基底中限定空腔。 未曝光的可光成像材料的去除以及将接合层选择性地暴露于光化辐射,保持空腔不含可光成像的材料并且抑制可光成像材料从其内边缘渗入空腔。 结果,半导体部件可以齐平地安装在空腔中,对金属加强件具有最佳的导热性。