专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08001433B1 Scan testing architectures for power-shutoff aware systems 有权
标题翻译：扫描测试架构，用于断电感知系统
公开(公告)号：US08001433B1
公开(公告)日：2011-08-16
申请号：US12345950
申请日：2008-12-30
申请人： Sandeep Bhatia , Patrick Gallagher , Brian Foutz , Vivek Chickermane
发明人： Sandeep Bhatia , Patrick Gallagher , Brian Foutz , Vivek Chickermane
IPC分类号： G01R31/28 , G06F17/50
CPC分类号： G01R31/318575 , G01R31/318563
摘要： In a circuit adapted for scan testing, a first set of connections configures the circuit elements into power domains with separate power-level controls, and a second set of connections configures the circuit elements to form scan segments for loading values into circuit elements from input ends of the scan segments and unloading values from circuit elements at output ends of the scan segments. A decompressor circuit receives a decompressor input and is operatively connected to the scan-segment input ends, and a compressor circuit is operatively connected to the scan segment output ends and generates a compressor output. Isolation circuits at scan-segment exits set values for scan segments at scan-segment exits when a corresponding independent power domain is in a power-off state.
摘要翻译：在适于扫描测试的电路中，第一组连接将电路元件配置成具有单独的功率电平控制的电源域，并且第二组连接将电路元件配置为形成用于从输入端将值加载到电路元件中的扫描段的扫描段和从扫描段输出端的电路元件卸载值。解压缩器电路接收解压缩器输入并且可操作地连接到扫描段输入端，并且压缩机电路可操作地连接到扫描段输出端并产生压缩器输出。扫描段出口处的隔离电路在相应的独立电源域处于关机状态时，为扫描段出口处的扫描段设置值。

2. 再颁专利

USRE44479E1 Method and mechanism for implementing electronic designs having power information specifications background 有权
标题翻译：实现具有电力信息规格背景的电子设计的方法和机制
公开(公告)号：USRE44479E1
公开(公告)日：2013-09-03
申请号：US13494363
申请日：2012-06-12
申请人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghoa Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher , Mitchell W. Hines
发明人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghoa Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher , Mitchell W. Hines
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022 , G06F17/5081 , G06F2217/78
摘要： A method of adding power control circuitry to a circuit design at each of an RTL and a netlist level comprising: demarcating multiple power domains within the circuit design; specifying multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains; and defining isolation behavior relative to respective power domains.
摘要翻译：一种将功率控制电路添加到RTL和网表级别中的每一个处的电路设计的方法，包括：划分所述电路设计内的多个电源域; 指定多个功率模式，每个功率模式对应于多个划分的功率域的开/关状态的不同组合; 并定义相对于各自的功率域的隔离行为。

3. 发明授权

US08516422B1 Method and mechanism for implementing electronic designs having power information specifications background 有权
标题翻译：实现具有电力信息规格背景的电子设计的方法和机制
公开(公告)号：US08516422B1
公开(公告)日：2013-08-20
申请号：US12815239
申请日：2010-06-14
申请人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
发明人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022 , G06F17/5081 , G06F2217/78
摘要： A method for implementing a single file format for power-related information for an IC comprising: providing a circuit design in at least one design file in a non-transitory computer readable storage device; providing power-related design information in a file in the computer readable storage device that is separate from the at least one design file and that specifies multiple power domains within the circuit design, each power domain including one or more design object instances from within the circuit design and that specifies multiple power modes each power mode corresponding to a different combination of on/off states of the multiple specified power domains and that specifies isolation behavior relative to respective power domains; and using a computer to add power control circuitry to the circuit design that implements the power domains and power modes and isolation behavior specified in the power specification information.
摘要翻译：一种用于实现用于IC的功率相关信息的单个文件格式的方法，包括：在非暂时性计算机可读存储设备中的至少一个设计文件中提供电路设计; 在与所述至少一个设计文件分离的并且指定所述电路设计中的多个电力域的所述计算机可读存储设备中的文件中提供电力相关设计信息，每个电力域包括来自所述电路内的一个或多个设计对象实例并且指定多个功率模式，每个功率模式对应于多个指定功率域的开/关状态的不同组合，并且指定相对于相应功率域的隔离行为; 并且使用计算机将功率控制电路添加到实现功率规范信息中指定的功率域和功率模式以及隔离行为的电路设计。

4. 发明授权

US07739629B2 Method and mechanism for implementing electronic designs having power information specifications background 有权
标题翻译：实现具有电力信息规格背景的电子设计的方法和机制
公开(公告)号：US07739629B2
公开(公告)日：2010-06-15
申请号：US11590657
申请日：2006-10-30
申请人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
发明人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022 , G06F17/5081 , G06F2217/78
摘要： A method of adding power control circuitry to a circuit design at each of an RTL and a netlist level comprising: demarcating multiple power domains within the circuit design; specifying multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains; and defining isolation behavior relative to respective power domains.
摘要翻译：一种将功率控制电路添加到RTL和网表级别中的每一个处的电路设计的方法，包括：划分所述电路设计内的多个电源域; 指定多个功率模式，每个功率模式对应于多个划分的功率域的开/关状态的不同组合; 并定义相对于各自的功率域的隔离行为。

5. 发明申请

US20070245285A1 Method and mechanism for implementing electronic designs having power information specifications background 有权
标题翻译：实现具有电力信息规格背景的电子设计的方法和机制
公开(公告)号：US20070245285A1
公开(公告)日：2007-10-18
申请号：US11590657
申请日：2006-10-30
申请人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
发明人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022 , G06F17/5081 , G06F2217/78
摘要： A method of adding power control circuitry to a circuit design at each of an RTL and a netlist level comprising: demarcating multiple power domains within the circuit design; specifying multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains; and defining isolation behavior relative to respective power domains.
摘要翻译：一种将功率控制电路添加到RTL和网表级别中的每一个处的电路设计的方法，包括：划分所述电路设计内的多个电源域; 指定多个功率模式，每个功率模式对应于多个划分的功率域的开/关状态的不同组合; 并定义相对于各自的功率域的隔离行为。

6. 发明授权

US07693676B1 Low power scan test for integrated circuits 有权
标题翻译：集成电路的低功耗扫描测试
公开(公告)号：US07693676B1
公开(公告)日：2010-04-06
申请号：US11704443
申请日：2007-02-09
申请人： Brion L. Keller , Vivek Chickermane , Sandeep Bhatia
发明人： Brion L. Keller , Vivek Chickermane , Sandeep Bhatia
IPC分类号： G01R27/28
CPC分类号： G01R31/318575
摘要： Low power design is a critical concern and metric for integrated circuits. During scan based manufacturing test, electric power dissipation becomes even more critical as the chip may not have been designed to tolerate excessive switching during scan test. Excessive electric power dissipation during scan test can result in excessive voltage variations, reduced noise margins and other signal integrity issues which could invalidate the test or may lead to premature chip failure. Power dissipation during test is minimized by selecting particular values for the unused care-bits in values of the test vectors on a probabilistic basis to minimize switching, while preserving test vector quality.
摘要翻译：低功耗设计是集成电路的关键和指标。在基于扫描的制造测试中，由于芯片可能未被设计为在扫描测试期间容忍过度的切换，因此电功耗变得更加重要。扫描测试期间过大的电力消耗可能会导致过大的电压变化，降低的噪声容限和其他信号完整性问题，这可能使测试无效或可能导致芯片过早失效。通过在概率基础上选择测试向量值中未使用的关心位的特定值来最小化测试期间的功耗，同时保持测试矢量质量。

7. 发明授权

US09948977B2 System, method, and apparatus for determining presentation time for picture without presentation time stamp 有权
公开(公告)号：US09948977B2
公开(公告)日：2018-04-17
申请号：US11024561
申请日：2004-12-22
申请人： Srinivas Mpr , Sherman Chen , Sandeep Bhatia
发明人： Srinivas Mpr , Sherman Chen , Sandeep Bhatia
IPC分类号： H04N7/12 , H04N21/43
CPC分类号： H04N21/4307
摘要： Presented herein are system(s), method(s), and apparatus for determining the presentation time for a picture without a presentation time stamp. A first and second picture are decoded. The first picture is a reference picture for the second picture. The presentation time for the second pictures is computed as a function of a presentation time and a decode time for the first picture.

8. 发明授权

US09380337B2 Command packets for personal video recorder 有权
标题翻译：用于个人录像机的命令包
公开(公告)号：US09380337B2
公开(公告)日：2016-06-28
申请号：US12890427
申请日：2010-09-24
申请人： Jason Demas , Sandeep Bhatia , Marcus Kellerman , Girish R. Hulmani , Srinivasa Mogathala Prabhakara Reddy , Arun Gopalakrishna Rao , Xuemin Chen , Frederick George Walls
发明人： Jason Demas , Sandeep Bhatia , Marcus Kellerman , Girish R. Hulmani , Srinivasa Mogathala Prabhakara Reddy , Arun Gopalakrishna Rao , Xuemin Chen , Frederick George Walls
IPC分类号： H04N7/173 , H04N21/4385 , G06T9/00 , H04N21/4147 , H04N21/434 , H04N21/6587 , H04N21/845
CPC分类号： H04N21/4385 , G06T9/004 , H04N21/4147 , H04N21/4348 , H04N21/6587 , H04N21/8455
摘要： Command packets for a personal video recorder that provides for a transport stream (TS) that contains data and also includes a transport packet (TP)/TS formatted command packets. The TP/TS formatted command packet may be communicated between any number of devices, including multiple chips, multiple boards, and multiple processors. A decoder is able to decode the TP/TS formatted command packet and to perform the appropriate operation on data portions of the TS. When a TS is provided to a device not having the capability to perform the proper decoding of the TP/TS formatted command packet, that particular packet may be deemed as being unidentified (or unknown) adaptation field data. Alternatively, the packet may be identified as being corrupted data and/or irrelevant data.
摘要翻译：提供用于包含数据的传输流（TS）的个人视频记录器的命令分组，并且还包括传输分组（TP）/ TS格式的命令分组。可以在包括多个芯片，多个板和多个处理器的任意数量的设备之间传送TP / TS格式化的命令分组。解码器能够解码TP / TS格式的命令包，并对TS的数据部分执行适当的操作。当将TS提供给不具有对TP / TS格式化的命令分组进行适当解码的能力的设备时，该特定分组可被认为是未识别（或未知）适配场数据。或者，分组可以被识别为被破坏的数据和/或不相关的数据。

9. 发明授权

US08923688B2 Performing personal video recording (PVR) functions on digital video streams 有权
标题翻译：在数字视频流上执行个人视频录像（PVR）功能
公开(公告)号：US08923688B2
公开(公告)日：2014-12-30
申请号：US10318295
申请日：2002-12-11
申请人： Gaurav Aggarwal , Arun Gopalakrishna Rao , Marcus Kellerman , David Erickson , Jason Demas , Sandeep Bhatia , Girish Hulmani
发明人： Gaurav Aggarwal , Arun Gopalakrishna Rao , Marcus Kellerman , David Erickson , Jason Demas , Sandeep Bhatia , Girish Hulmani
IPC分类号： H04N5/783 , H04N21/4385 , H04N19/61 , H04N21/6587 , H04N21/2387 , H04N19/159 , H04N19/50 , H04N19/51 , G06T9/00 , H04N21/4147 , H04N21/433 , H04N21/44 , H04N21/845 , H04N5/917 , H04N11/02
CPC分类号： H04N21/4385 , G06T9/004 , H04N19/159 , H04N19/50 , H04N19/52 , H04N19/573 , H04N19/577 , H04N19/61 , H04N21/2387 , H04N21/4147 , H04N21/4331 , H04N21/44004 , H04N21/6587 , H04N21/8455
摘要： Presented herein are systems, methods, and apparatus for improving performance of video decoders during rewind and fast forward operation. Video decoder performance is improved by avoiding repetitive decoding of prediction pictures. When a decoded prediction picture is stored in a frame buffer, techniques are presented for decoding multiple pictures in the rewind order which are dependent thereon, displaying the picture directly from the frame buffer, and setting one type of prediction picture as another type of prediction picture.
摘要翻译：这里提出了用于在倒带和快进操作期间改善视频解码器的性能的系统，方法和装置。通过避免对预测图像的重复解码来改善视频解码器的性能。当解码的预测图像被存储在帧缓冲器中时，呈现用于解码依赖于其的倒带顺序的多个图像的技术，直接从帧缓冲器显示图像，并将一种类型的预测图像设置为另一种类型的预测图像。

10. 发明申请

US20120147974A1 Television Functionality on a Chip 有权
标题翻译：芯片上的电视功能
公开(公告)号：US20120147974A1
公开(公告)日：2012-06-14
申请号：US13160461
申请日：2011-06-14
申请人： David A. BAER , Jeff Tingley , Aleksandr Movshovich , Brad Grossman , Brian F. Schoner , Chengfuh Jeffrey Tang , Chuck Monahan , Darren D. Neuman , David Chao Hua Wu , Francis Cheung , Greg A. Kranawetter , Hoang Nhu , Hsien-Chih Jim Tseng , Iue-Shuenn Chen , James D. Sweet , Jeffrey S. Bauch , Keith LaRell Klingler , Patrick Law , Rajesh Mamidwar , Dan Simon , Sang Van Tran , Shawn V. Johnson , Steven T. Jaffe , Thu T. Nguyen , Ut Nguyen , Yao-Hua Steven Tseng , Brad Delanghe , Ben Giese , Jason Demas , Lakshman Ramakrishnan , Sandeep Bhatia , Guang-Ting Shih , Tracy C. Denk
发明人： David A. BAER , Jeff Tingley , Aleksandr Movshovich , Brad Grossman , Brian F. Schoner , Chengfuh Jeffrey Tang , Chuck Monahan , Darren D. Neuman , David Chao Hua Wu , Francis Cheung , Greg A. Kranawetter , Hoang Nhu , Hsien-Chih Jim Tseng , Iue-Shuenn Chen , James D. Sweet , Jeffrey S. Bauch , Keith LaRell Klingler , Patrick Law , Rajesh Mamidwar , Dan Simon , Sang Van Tran , Shawn V. Johnson , Steven T. Jaffe , Thu T. Nguyen , Ut Nguyen , Yao-Hua Steven Tseng , Brad Delanghe , Ben Giese , Jason Demas , Lakshman Ramakrishnan , Sandeep Bhatia , Guang-Ting Shih , Tracy C. Denk
IPC分类号： H04N7/26
CPC分类号： H04N21/426 , H04N5/4401 , H04N5/44504 , H04N5/46 , H04N7/035 , H04N21/4263 , H04N21/4305 , H04N2005/91364
摘要： A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.
摘要翻译：公开了一种提供用于在单个集成电路芯片上提供电视功能的成本有效方法的芯片上的电视（TVOC）系统。 TVOC包括以各种输入和输出格式接收和显示电视信号所必需的功能。 TVOC可用于有线和卫星电视的机顶盒，或直接在电视机内使用。所提供的所有功能可以在单个集成电路上提供。 TVOC包括数据传输模块，IF解调器，数字音频引擎，模拟音频引擎，数字视频引擎和模拟视频引擎。 TVOC还包括三套接口，包括输出接口，控制接口和辅助接口。其他特征和实施例提供增强的功能和提高的效率。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式