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1. 发明申请

US20100064271A1 METHOD AND SYSTEM FOR SIMULATING STATE RETENTION OF AN RTL DESIGN 有权
标题翻译：用于模拟RTL设计状态保持的方法和系统
公开(公告)号：US20100064271A1
公开(公告)日：2010-03-11
申请号：US12561176
申请日：2009-09-16
申请人： Yonghao CHEN
发明人： Yonghao CHEN
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F2217/78
摘要： Method and system for simulating state retention of an RTL design are disclosed. The method includes receiving a netlist description of the circuit represented in a register-transfer-level (RTL) design environment, receiving power information specifications of the circuit, identifying one or more power domains of the circuit using the netlist description and the power information specifications, associating the one or more power domains and the power information specifications in the RTL design environment, where the one or more power domains are controlled by a set of power control signals through a power manager logic, and simulating state retention behavior in response to variations in power applied to the power domain.
摘要翻译：公开了用于模拟RTL设计的状态保持的方法和系统。该方法包括接收在寄存器传送级（RTL）设计环境中表示的电路的网表描述，接收电路的功率信息规范，使用网表描述和功率信息规范识别电路的一个或多个功率域将RTL设计环境中的一个或多个功率域和功率信息规范相关联，其中一个或多个功率域由一组功率控制信号通过功率管理器逻辑控制，以及响应于变化模拟状态保持行为在电源上施加电力。

2. 发明申请

US20070245278A1 Simulation of power domain isolation 有权
标题翻译：电力域隔离仿真
公开(公告)号：US20070245278A1
公开(公告)日：2007-10-18
申请号：US11489385
申请日：2006-07-18
申请人： Yonghao Chen
发明人： Yonghao Chen
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F2217/78
摘要： Method and system for simulating isolation of a power domain are disclosed. The method includes receiving a netlist description of the circuit that is represented in a register-transfer-level (RTL) design environment, receiving power information specifications of the circuit, associating the plurality of power domains and the power information specifications in the RTL design environment, where the plurality of power domains are controlled by a set of power control signals through a power manager logic, isolating a power domain among the plurality of power domains for simulation, and simulating isolation behavior of the power domain in response to variations in power applied to the power domain.
摘要翻译：公开了用于模拟功率域隔离的方法和系统。该方法包括接收在寄存器传送级（RTL）设计环境中表示的电路的网表描述，接收电路的功率信息规范，将多个电源域与功率信息规范相关联，并将其与RTL设计环境，其中通过功率管理器逻辑通过一组功率控制信号来控制多个功率域，隔离多个功率域中的功率域进行模拟，以及响应于施加的功率变化来模拟功率域的隔离行为到电力领域。

3. 发明授权

US07739629B2 Method and mechanism for implementing electronic designs having power information specifications background 有权
标题翻译：实现具有电力信息规格背景的电子设计的方法和机制
公开(公告)号：US07739629B2
公开(公告)日：2010-06-15
申请号：US11590657
申请日：2006-10-30
申请人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
发明人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022 , G06F17/5081 , G06F2217/78
摘要： A method of adding power control circuitry to a circuit design at each of an RTL and a netlist level comprising: demarcating multiple power domains within the circuit design; specifying multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains; and defining isolation behavior relative to respective power domains.
摘要翻译：一种将功率控制电路添加到RTL和网表级别中的每一个处的电路设计的方法，包括：划分所述电路设计内的多个电源域; 指定多个功率模式，每个功率模式对应于多个划分的功率域的开/关状态的不同组合; 并定义相对于各自的功率域的隔离行为。

4. 发明申请

US20070245285A1 Method and mechanism for implementing electronic designs having power information specifications background 有权
标题翻译：实现具有电力信息规格背景的电子设计的方法和机制
公开(公告)号：US20070245285A1
公开(公告)日：2007-10-18
申请号：US11590657
申请日：2006-10-30
申请人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
发明人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022 , G06F17/5081 , G06F2217/78
摘要： A method of adding power control circuitry to a circuit design at each of an RTL and a netlist level comprising: demarcating multiple power domains within the circuit design; specifying multiple power modes each power mode corresponding to a different combination of on/off states of the multiple demarcated power domains; and defining isolation behavior relative to respective power domains.
摘要翻译：一种将功率控制电路添加到RTL和网表级别中的每一个处的电路设计的方法，包括：划分所述电路设计内的多个电源域; 指定多个功率模式，每个功率模式对应于多个划分的功率域的开/关状态的不同组合; 并定义相对于各自的功率域的隔离行为。

5. 发明申请

US20070245277A1 Method and system for simulating state retention of an RTL design 有权
标题翻译：用于模拟RTL设计的状态保留的方法和系统
公开(公告)号：US20070245277A1
公开(公告)日：2007-10-18
申请号：US11489384
申请日：2006-07-18
申请人： Yonghao Chen
发明人： Yonghao Chen
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F2217/78
摘要： Method and system for simulating state retention of an RTL design are disclosed. The method includes receiving a netlist description of the circuit represented in a register-transfer-level (RTL) design environment, receiving power information specifications of the circuit, identifying one or more power domains of the circuit using the netlist description and the power information specifications, associating the one or more power domains and the power information specifications in the RTL design environment, where the one or more power domains are controlled by a set of power control signals through a power manager logic, and simulating state retention behavior in response to variations in power applied to the power domain.
摘要翻译：公开了用于模拟RTL设计的状态保持的方法和系统。该方法包括接收在寄存器传送级（RTL）设计环境中表示的电路的网表描述，接收电路的功率信息规范，使用网表描述和功率信息规范识别电路的一个或多个功率域将RTL设计环境中的一个或多个功率域和功率信息规范相关联，其中一个或多个功率域由一组功率控制信号通过功率管理器逻辑控制，以及响应于变化模拟状态保持行为在电源上施加电力。

6. 发明授权

US08160860B1 Method and apparatus for event-based simulation of a digital design having a power shut-off feature 有权
标题翻译：用于具有电源切断功能的数字设计的基于事件的模拟的方法和装置
公开(公告)号：US08160860B1
公开(公告)日：2012-04-17
申请号：US12414239
申请日：2009-03-30
申请人： Yonghao Chen
发明人： Yonghao Chen
IPC分类号： G06F17/50 , G06G7/62 , G06G7/54
CPC分类号： G06F17/5022 , G06F2217/78
摘要： Method, apparatus, and computer readable medium for simulating a logic design having power domains are described. In some examples, a switchable power domain of the power domains is identified, the switchable power domain having primary inputs and having a power state switchable between a power-on state and a power-off state. The logic design is traversed to analyze driver and load logic of each of the primary inputs to the switchable power domain to identify any pure pass-through nets each of which has no driver and no load logic in the switchable power domain. An implicit logic device is inserted at each of the primary inputs not coupled to a pure pass-through net, each implicit logic device being in a corrupting state when the switchable power domain is in the power-off state and in a bypassing state when the switchable power domain is in the power-on state, the corrupting state corrupting the respective primary input with an undefined logic state, the bypassing state driving the respective primary input with a logic state of respective driver logic. An event-driven simulation of the logic design is performed.
摘要翻译：描述了用于模拟具有电力域的逻辑设计的方法，装置和计算机可读介质。在一些示例中，识别功率域的可切换功率域，可切换功率域具有主要输入并且具有在通电状态和断电状态之间切换的功率状态。遍历逻辑设计以分析每个主要输入到可切换电源域的驱动器和负载逻辑，以识别每个在可切换电源域中没有驱动器和无负载逻辑的纯直通网。在不耦合到纯直通网的每个主输入端插入隐式逻辑器件，当可切换的电源域处于断电状态时，每个隐式逻辑器件处于破坏状态，并且当旁路状态可切换电源区域处于通电状态，破坏状态以未定义的逻辑状态破坏相应的主输入，旁路状态以相应的驱动器逻辑的逻辑状态驱动相应的主输入。执行逻辑设计的事件驱动仿真。

7. 发明授权

US08775150B1 Method and system for providing an implicit unknown value to user enum data constructs in an HDL system to model power shutoff in simulation 有权
标题翻译：为HDL系统中的用户枚举数据结构提供隐含的未知值，以模拟模拟电源关闭的方法和系统
公开(公告)号：US08775150B1
公开(公告)日：2014-07-08
申请号：US12640601
申请日：2009-12-17
申请人： Abhishek Kanungo , Phil Giangarra , Yonghao Chen , Franz Erich Marschner
发明人： Abhishek Kanungo , Phil Giangarra , Yonghao Chen , Franz Erich Marschner
IPC分类号： G06F17/50 , G06F9/45
CPC分类号： G06F8/30 , G06F17/5036 , G06F17/505 , G06F2217/78
摘要： A method and system are provided for automatically creating an implicit literal value in a user defined enumerated data type by inserting an additional literal value, scanning the HDL design files for broken interdependencies or potential incompatibilities with the implicitly defined literal value, and modifying the HDL design files to be in accordance with the implicitly defined literal value while maintaining the semantics of the VHDL language reference model.
摘要翻译：提供了一种方法和系统，用于通过插入附加文字值来自动创建用户定义的枚举数据类型的隐式文字值，扫描HDL设计文件以断开相互依赖关系或与隐式定义的文字值的潜在不兼容性，以及修改HDL设计文件要符合隐式定义的文字值，同时保持VHDL语言参考模型的语义。

8. 发明授权

US08516422B1 Method and mechanism for implementing electronic designs having power information specifications background 有权
标题翻译：实现具有电力信息规格背景的电子设计的方法和机制
公开(公告)号：US08516422B1
公开(公告)日：2013-08-20
申请号：US12815239
申请日：2010-06-14
申请人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
发明人： Qi Wang , Ankur Gupta , Pinhong Chen , Christina Chu , Manish Pandey , Huan-Chih Tsai , Sandeep Bhatia , Yonghao Chen , Steven Sharp , Vivek Chickermane , Patrick Gallagher
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022 , G06F17/5081 , G06F2217/78
摘要： A method for implementing a single file format for power-related information for an IC comprising: providing a circuit design in at least one design file in a non-transitory computer readable storage device; providing power-related design information in a file in the computer readable storage device that is separate from the at least one design file and that specifies multiple power domains within the circuit design, each power domain including one or more design object instances from within the circuit design and that specifies multiple power modes each power mode corresponding to a different combination of on/off states of the multiple specified power domains and that specifies isolation behavior relative to respective power domains; and using a computer to add power control circuitry to the circuit design that implements the power domains and power modes and isolation behavior specified in the power specification information.
摘要翻译：一种用于实现用于IC的功率相关信息的单个文件格式的方法，包括：在非暂时性计算机可读存储设备中的至少一个设计文件中提供电路设计; 在与所述至少一个设计文件分离的并且指定所述电路设计中的多个电力域的所述计算机可读存储设备中的文件中提供电力相关设计信息，每个电力域包括来自所述电路内的一个或多个设计对象实例并且指定多个功率模式，每个功率模式对应于多个指定功率域的开/关状态的不同组合，并且指定相对于相应功率域的隔离行为; 并且使用计算机将功率控制电路添加到实现功率规范信息中指定的功率域和功率模式以及隔离行为的电路设计。

9. 发明授权

US07992125B2 Method and system for simulating state retention of an RTL design 有权
标题翻译：用于模拟RTL设计的状态保留的方法和系统
公开(公告)号：US07992125B2
公开(公告)日：2011-08-02
申请号：US12561176
申请日：2009-09-16
申请人： Yonghao Chen
发明人： Yonghao Chen
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F2217/78
摘要： Method and system for simulating state retention of an RTL design are disclosed. The method includes receiving a netlist description of the circuit represented in a register-transfer-level (RTL) design environment, receiving power information specifications of the circuit, identifying one or more power domains of the circuit using the netlist description and the power information specifications, associating the one or more power domains and the power information specifications in the RTL design environment, where the one or more power domains are controlled by a set of power control signals through a power manager logic, and simulating state retention behavior in response to variations in power applied to the power domain.
摘要翻译：公开了用于模拟RTL设计的状态保持的方法和系统。该方法包括接收在寄存器传送级（RTL）设计环境中表示的电路的网表描述，接收电路的功率信息规范，使用网表描述和功率信息规范识别电路的一个或多个功率域将RTL设计环境中的一个或多个功率域和功率信息规范相关联，其中一个或多个功率域由一组功率控制信号通过功率管理器逻辑控制，以及响应于变化模拟状态保持行为在电源上施加电力。

10. 发明授权

US07610571B2 Method and system for simulating state retention of an RTL design 有权
标题翻译：用于模拟RTL设计的状态保留的方法和系统
公开(公告)号：US07610571B2
公开(公告)日：2009-10-27
申请号：US11489384
申请日：2006-07-18
申请人： Yonghao Chen
发明人： Yonghao Chen
IPC分类号： G06F17/50
CPC分类号： G06F17/5022 , G06F2217/78
摘要： Method and system for simulating state retention of an RTL design are disclosed. The method includes receiving a netlist description of the circuit represented in a register-transfer-level (RTL) design environment, receiving power information specifications of the circuit, identifying one or more power domains of the circuit using the netlist description and the power information specifications, associating the one or more power domains and the power information specifications in the RTL design environment, where the one or more power domains are controlled by a set of power control signals through a power manager logic, and simulating state retention behavior in response to variations in power applied to the power domain.
摘要翻译：公开了用于模拟RTL设计的状态保持的方法和系统。该方法包括接收在寄存器传送级（RTL）设计环境中表示的电路的网表描述，接收电路的功率信息规范，使用网表描述和功率信息规范识别电路的一个或多个功率域将RTL设计环境中的一个或多个功率域和功率信息规范相关联，其中一个或多个功率域由一组功率控制信号通过功率管理器逻辑控制，以及响应于变化模拟状态保持行为在电源上施加电力。

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