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1. 发明授权

US5060045A Semiconductor integrated circuit device and method of manufacturing the same 失效
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US5060045A
公开(公告)日：1991-10-22
申请号：US422640
申请日：1989-10-17
申请人： Nobuo Owada , Hiroyuki Akimori , Takahisa Nitta , Tohru Kobayashi , Shunji Sasabe , Mikinori Kawaji , Osamu Kasahara
发明人： Nobuo Owada , Hiroyuki Akimori , Takahisa Nitta , Tohru Kobayashi , Shunji Sasabe , Mikinori Kawaji , Osamu Kasahara
IPC分类号： H01L21/3205 , H01L21/82 , H01L23/52 , H01L27/118
CPC分类号： H01L27/118
摘要： Disclosed is a semiconductor integrated circuit device adopting a gate array scheme, having a plurality of layers of wiring formed by a Design Automation system. The device according to the present invention includes a semiconductor substrate having basic cell forming regions, the basic cell forming regions being spaced from each other with wiring channel regions between adjacent basic cell forming regions. The wiring includes at least first-layer wiring lines arranged overlying the wiring channel regions; second-layer wiring lines overlying both the basic cell forming regions and the wiring channel regions; and third-layer wiring lines overlying both the basic cell forming regions and the wiring channel regions. The first-, second- and third-layer wiring lines respectively extend in first, second and third directions, the second direction being different from the first direction. The wiring pitches of the second-layer wiring lines and the third-layer wiring lines are set substantially equal to or smaller than the wiring pitch of th first-layer wiring lines. As a further aspect of the present invention, the ratio of wiring pitch of third-layer wiring lines to first-layer wiring lines can be 0.5, 1.0, 1.5 or 2.0. In addition, insulator films on which are formed the wiring lines are respectively subjected to flattening processes in order to flatten their upper surfaces, prior to providing the wiring lines thereon.
摘要翻译：公开了一种采用门阵列方案的半导体集成电路装置，具有由设计自动化系统形成的多层布线。根据本发明的器件包括具有碱性电池形成区域的半导体衬底，所述碱性电池形成区域彼此间隔开，并且在相邻的基本电池形成区域之间具有布线沟道区域。布线至少包括布置在布线沟道区域上的第一层布线; 覆盖基本单元形成区域和布线沟道区域的第二层布线; 以及覆盖基本单元形成区域和布线沟道区域的第三层布线。第一，第二和第三层布线分别在第一，第二和第三方向上延伸，第二方向不同于第一方向。第二层布线和第三层布线的布线间距基本上等于或小于第一层布线的布线间距。作为本发明的另一方面，第三层布线与第一层布线的布线间距的比可以为0.5,1.0,1.5或2.0。此外，在其上形成布线的绝缘膜分别在其上提供布线之前分别进行平坦化处理以使其上表面变平。

2. 发明授权

US5235399A Temperature measuring apparatus utilizing radiation 失效
标题翻译：使用辐射的温度测量仪
公开(公告)号：US5235399A
公开(公告)日：1993-08-10
申请号：US719945
申请日：1991-06-24
申请人： Tatehito Usui , Tomoji Watanabe , Junichi Kobayashi , Takehiko Ooshima , Shunji Sasabe
发明人： Tatehito Usui , Tomoji Watanabe , Junichi Kobayashi , Takehiko Ooshima , Shunji Sasabe
IPC分类号： G01J5/10 , G01J5/00 , G01J5/06 , G01J5/60 , H05H1/00
CPC分类号： G01J5/0014 , G01J5/0018 , G01J5/06 , G01J5/08 , G01J5/0806 , G01J5/0825 , G01J5/602
摘要： An apparatus for measuring the temperature of an object placed in a plasma by utilizing radiation includes measuring means for measuring the intensity of radiation from the object and the intensity of plasma light in different directions at the same time. The measuring means includes a first lens for receiving the radiation from the object and the plasma light, a second lens for converting the output beam of the first lens into parallel light rays, a third lens for focusing the parallel light rays, and an interference filter disposed rotatably between the second lens and the third lens.
摘要翻译：用于通过利用辐射来测量放置在等离子体中的物体的温度的装置包括用于同时测量来自物体的辐射强度和等离子体光的强度的测量装置。测量装置包括用于接收来自物体和等离子体光的辐射的第一透镜，用于将第一透镜的输出光束转换为平行光线的第二透镜，用于聚焦平行光线的第三透镜和用于聚焦平行光线的干涉滤光器可旋转地设置在第二透镜和第三透镜之间。

3. 发明授权

US4717462A Sputtering apparatus 失效
标题翻译：溅射装置
公开(公告)号：US4717462A
公开(公告)日：1988-01-05
申请号：US922892
申请日：1986-10-24
申请人： Yoshio Homma , Sukeyoshi Tsunekawa , Shunji Sasabe
发明人： Yoshio Homma , Sukeyoshi Tsunekawa , Shunji Sasabe
IPC分类号： C23C14/34 , C23C14/04 , H01J37/34 , H01L21/203 , H01L21/285 , H01L21/302 , H01L21/3065 , C23C14/00
CPC分类号： H01J37/3408 , C23C14/046
摘要： A sputtering apparatus comprising an intermediate electrode having a plurality of openings disposed between a cathode and a substrate electrode.The directionality of the particles which are liberated from a target by the collision of ions against the target is made remarkably uniform by the presence of the intermediate electrode, and thus a thin film having a superior step coverage can be deposited on the substrate placed on the substrate electrode.
摘要翻译：一种溅射装置，包括具有设置在阴极和基板电极之间的多个开口的中间电极。通过中间电极的存在，通过离子与靶碰撞而从靶中释放的颗粒的方向性被显着地均匀化，因此具有优异的台阶覆盖率的薄膜可以沉积在放置在基板上的基板上基板电极。

4. 发明授权

US06497992B1 Process for manufacturing semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件制造工艺
公开(公告)号：US06497992B1
公开(公告)日：2002-12-24
申请号：US09551615
申请日：2000-04-17
申请人： Takashi Yunogami , Shunji Sasabe , Kazuyuki Suko , Jun Abe , Takao Kumihashi , Fumio Murai
发明人： Takashi Yunogami , Shunji Sasabe , Kazuyuki Suko , Jun Abe , Takao Kumihashi , Fumio Murai
IPC分类号： G03F726
CPC分类号： H01L21/02071 , G03F7/40 , H01L21/0274 , H01L21/31122 , H01L21/31144 , H01L21/32139
摘要： In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.
摘要翻译：为了防止当通过干法蚀刻Pt膜或PZT膜而形成该图案时，可以防止低蒸气压的反应产物沉积在预定图案的侧壁上，具有圆形外部的抗蚀剂掩模54 当要沉积在半导体衬底50上的Pt膜53被干蚀刻时，使用其头部周边。此外，在该干蚀刻之后，进行适当程度的过蚀刻以完全去除留在图案侧的侧壁沉积膜55。抗蚀剂掩模54通过曝光和显影二苯甲酚酚醛清漆抗蚀剂而形成，随后通过加热固化，同时照射它，如果需要，用紫外线照射。

5. 发明授权

US5972862A Cleaning liquid for semiconductor devices 失效
标题翻译：半导体器件清洗液
公开(公告)号：US5972862A
公开(公告)日：1999-10-26
申请号：US901475
申请日：1997-07-28
申请人： Yoshimi Torii , Shunji Sasabe , Masayuki Kojima , Kazuhisa Usuami , Takafumi Tokunaga , Kazusato Hara , Yoshikazu Ohira , Tsuyoshi Matsui , Hideto Gotoh , Tetsuo Aoyama , Ryuji Hasemi , Hidetoshi Ikeda , Fukusaburo Ishihara , Ryuji Sotoaka
发明人： Yoshimi Torii , Shunji Sasabe , Masayuki Kojima , Kazuhisa Usuami , Takafumi Tokunaga , Kazusato Hara , Yoshikazu Ohira , Tsuyoshi Matsui , Hideto Gotoh , Tetsuo Aoyama , Ryuji Hasemi , Hidetoshi Ikeda , Fukusaburo Ishihara , Ryuji Sotoaka
IPC分类号： C11D7/60 , G03F7/42 , H01L21/02 , H01L21/302 , H01L21/304 , H01L21/3065 , H01L21/3213 , C11D1/62 , C11D3/44 , C11D7/08
CPC分类号： H01L21/02071 , G03F7/423 , G03F7/425 , H01L21/02063 , Y10S438/974
摘要： There is disclosed a cleaning liquid for producing a semiconductor device which comprises (A) fluorine-containing compound; (B) water-soluble or water-miscible organic solvent; and (C) inorganic acid and/or organic acid, optionally, further comprises (D) quaternary ammonium salt or (D') a specific organic carboxylic acid ammonium salt and/or an organic carboxylic acid amine salt; as well as a process for producing a semiconductor device by forming a resist pattern on a substrate equipped on the surface with an insulating film layer or a metallic electroconductive layer, forming a via hole or electric wiring by dry etching, removing the resist pattern by ashing treatment with oxygen plasma; and effecting an cleaning treatment with the above cleaning liquid. The above cleaning liquid and production process can readily remove the deposit polymer formed in the case of dry etching without impairing metallic film and insulating film.
摘要翻译：公开了一种用于制造半导体器件的清洗液，其包含（A）含氟化合物; （B）水溶性或水混溶性有机溶剂; 和（C）无机酸和/或有机酸，任选地还包含（D）季铵盐或（D'）特定的有机羧酸铵盐和/或有机羧酸胺盐; 以及通过在表面上配置有绝缘膜层或金属导电层的基板上形成抗蚀剂图案来制造半导体器件的方法，通过干蚀刻形成通孔或电布线，通过灰化除去抗蚀剂图案用氧等离子体处理; 并用上述清洗液进行清洗处理。上述清洗液和制造方法可以容易地除去在干蚀刻的情况下形成的沉积聚合物，而不损害金属膜和绝缘膜。

6. 发明授权

US6057081A Process for manufacturing semiconductor integrated circuit device 失效
公开(公告)号：US6057081A
公开(公告)日：2000-05-02
申请号：US935033
申请日：1997-09-22
申请人： Takashi Yunogami , Shunji Sasabe , Kazuyuki Suko , Jun Abe , Takao Kumihashi , Fumio Murai
发明人： Takashi Yunogami , Shunji Sasabe , Kazuyuki Suko , Jun Abe , Takao Kumihashi , Fumio Murai
IPC分类号： G03F7/26 , G03F7/40 , H01L21/02 , H01L21/027 , H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108
CPC分类号： H01L21/02071 , H01L21/31122 , H01L21/31144 , H01L21/32139 , G03F7/40 , H01L21/0274
摘要： In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.

7. 发明授权

US5021114A Apparatus for treating material by using plasma 失效
标题翻译：用等离子体处理材料的装置
公开(公告)号：US5021114A
公开(公告)日：1991-06-04
申请号：US221272
申请日：1988-07-19
申请人： Hiroshi Saito , Yasumichi Suzuki , Shunji Sasabe , Kazuhiro Nakajima
发明人： Hiroshi Saito , Yasumichi Suzuki , Shunji Sasabe , Kazuhiro Nakajima
IPC分类号： C23C16/517 , H01J37/32
CPC分类号： H01J37/32247 , C23C16/517 , H01J37/32192 , H01J37/3266
摘要： A sputter etching apparatus including a vacuum chamber provided with a gas supply system and an evacuator, a sputter etching electrode disposed within the vacuum chamber on which a substrate is disposed, a plasma generator for generating plasma by applying microwave energy and disposed in opposition to the sputter etching electrode, a voltage applying stud provided in association with the sputter etching electrode for causing ions in the plasma to impact against the substrate, a first power supply source provided in association with the plasma generator for generating the plasma, and a second power supply source provided independent of the first power supply source for supplying the voltage for causing the ions to impact against the substrate. A magnetic field generating magnet or coil assembly can be incorporated in the apparatus for generating a magnetic field in such a manner in which the plasma produced within a space defined between the substrate and the microwave inlet window is peripherally surrounded by the magnetic lines of forces. Further disclosed in a plasma treatment apparatus which includes an activating chamber equipped with plasma generator and a first raw gas supplying system, a reaction chamber spatially coupled to the activating chamber and containing an electrode for supporting thereon a substrate to be treated, an evacuator for evacuating the activating chamber and the reaction chamber down to a predetermined pressure. The activating chamber is directly connected to the reaction chamber for shortening the distance between the activating chamber and the substrate to be treated. A second raw gas supplying system for supplying a raw gas to the reaction chamber is provided in the connecting portion between the activating chamber and the reacting chamber.

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