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1. 发明授权

US06503079B2 Substrate processing apparatus and method for manufacturing semiconductor device 有权
公开(公告)号：US06503079B2
公开(公告)日：2003-01-07
申请号：US10041617
申请日：2002-01-10
申请人： Minoru Kogano , Yasuhiro Inokuchi , Makoto Sambu , Atsushi Moriya , Yasuo Kunii
发明人： Minoru Kogano , Yasuhiro Inokuchi , Makoto Sambu , Atsushi Moriya , Yasuo Kunii
IPC分类号： F27D312
CPC分类号： C23C16/45519 , C23C16/4401 , C23C16/4409 , C23C16/4412 , C30B25/14
摘要： An apparatus and a method for manufacturing a semiconductor device can provide a good quality film growth in a highly clean reaction atmosphere unaffected by contamination from a furnace opening portion. A reverse-diffusion preventing body 8 is provided between a furnace opening flange 7 and a boat susceptor 19 so that a substrate processing space 20 is isolated from a furnace opening portion space 21 to thereby prevent reverse-diffusion of a contaminant which occurs at a furnace opening portion B, to the substrate processing space 20. At a furnace opening flange 7, a furnace opening exhausting tube 15 is provided which constitutes a furnace opening system for exhausting the space 21 independently of the space 20 so that the space 21 is exhausted while being purged by supplying a purge gas into the space 21, to thereby remove a contaminant from the space 21. A gas supplying nozzle 4 which is introduced from the flange 7 is extended from the space 21 to the space 20 so that a reaction gas is directly introduced into the space 20 to thereby prevent a contaminant Within the space 21 from being involved in the space 20.

2. 发明申请

US20080251008A1 Substrate Processing Apparatus and Semiconductor Device Producing Method 失效
标题翻译：基板加工装置及半导体装置生产方法
公开(公告)号：US20080251008A1
公开(公告)日：2008-10-16
申请号：US10592350
申请日：2005-03-11
申请人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii
发明人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii
IPC分类号： H01L21/205 , H01L21/28 , H01L21/285 , H01L29/417 , H01L29/78
CPC分类号： C23C16/22 , C23C16/04 , C23C16/24 , C23C16/4583 , C30B25/02 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/28525 , H01L21/28562 , H01L29/6659 , H01L29/66628 , H01L29/7834 , Y10T117/10 , Y10T117/1016
摘要： Disclosed is a hot wall type substrate processing apparatus, including a processing chamber which is to accommodate at least one product substrate therein; a heating member which is disposed outside of the processing chamber and which is to heat the product substrate; a processing gas supply system connected to the processing chamber; and an exhaust system, wherein with a member from which a Si film is exposed being disposed such as to be opposed to a surface on which selective growth is to be effected of the product substrate, an epitaxial film including Si is allowed to selectively grow on a Si surface of the product substrate.
摘要翻译：公开了一种热壁型基板处理装置，包括：处理室，其用于容纳至少一个产品基板; 加热构件，其设置在所述处理室的外部并且用于加热所述产品基板; 连接到处理室的处理气体供应系统; 以及排气系统，其中与Si膜暴露的构件配置成与要对产品衬底进行选择性生长的表面相对，允许包括Si的外延膜选择性地生长在产品基板的Si表面。

3. 发明授权

US08790463B2 Substrate processing apparatus and semiconductor device producing method 失效
标题翻译：基板加工装置及半导体装置的制造方法
公开(公告)号：US08790463B2
公开(公告)日：2014-07-29
申请号：US10592350
申请日：2005-03-11
申请人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii
发明人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii
IPC分类号： C30B25/00
CPC分类号： C23C16/22 , C23C16/04 , C23C16/24 , C23C16/4583 , C30B25/02 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/28525 , H01L21/28562 , H01L29/6659 , H01L29/66628 , H01L29/7834 , Y10T117/10 , Y10T117/1016
摘要： Disclosed is a hot wall type substrate processing apparatus, including a processing chamber which is to accommodate at least one product substrate therein; a heating member which is disposed outside of the processing chamber and which is to heat the product substrate; a processing gas supply system connected to the processing chamber; and an exhaust system, wherein with a member from which a Si film is exposed being disposed such as to be opposed to a surface on which selective growth is to be effected of the product substrate, an epitaxial film including Si is allowed to selectively grow on a Si surface of the product substrate.
摘要翻译：公开了一种热壁型基板处理装置，包括：处理室，其用于容纳至少一个产品基板; 加热构件，其设置在所述处理室的外部并且用于加热所述产品基板; 连接到处理室的处理气体供应系统; 以及排气系统，其中与Si膜暴露的构件配置成与要对产品衬底进行选择性生长的表面相对，允许包括Si的外延膜选择性地生长在产品基板的Si表面。

4. 发明授权

US07851379B2 Substrate processing method and substrate processing apparatus 有权
标题翻译：基板处理方法和基板处理装置
公开(公告)号：US07851379B2
公开(公告)日：2010-12-14
申请号：US12410963
申请日：2009-03-25
申请人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii
发明人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02381 , C23C16/24 , H01L21/02532 , H01L21/02592 , H01L21/0262 , H01L21/02636 , H01L21/02667 , H01L21/8221 , H01L27/0688
摘要： There are provided a substrate processing method and apparatus adapted to prevent deterioration of film thickness uniformity while maintaining the film forming rate. The substrate processing method comprises: (a) accommodating a plurality of substrates in a process chamber by carrying and stacking the substrates in the process chamber, (b) forming first amorphous silicon films to a predetermined thickness by heating at least the substrates and supplying first gas, and (c) forming second amorphous silicon films to a predetermined thickness by heating at least the substrates and supplying second gas different from the first gas. The first gas is higher order gas than the second gas.
摘要翻译：提供了一种适于在保持成膜速率的同时防止膜厚均匀性劣化的基板处理方法和装置。基板处理方法包括：（a）通过在处理室中承载和堆叠基板将多个基板容纳在处理室中，（b）通过至少加热基板并首先提供第一非晶硅膜，形成预定厚度的第一非晶硅膜气体，以及（c）通过至少加热所述基板并供应与所述第一气体不同的第二气体，将第二非晶硅膜形成为预定厚度。第一气体比第二气体高。

5. 发明申请

US20090325366A1 SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS 有权
标题翻译：基板加工方法和基板加工装置
公开(公告)号：US20090325366A1
公开(公告)日：2009-12-31
申请号：US12410963
申请日：2009-03-25
申请人： Atsushi MORIYA , Yasuhiro Inokuchi , Yasuo Kunii
发明人： Atsushi MORIYA , Yasuhiro Inokuchi , Yasuo Kunii
IPC分类号： H01L21/365 , C23C16/42
CPC分类号： H01L21/02381 , C23C16/24 , H01L21/02532 , H01L21/02592 , H01L21/0262 , H01L21/02636 , H01L21/02667 , H01L21/8221 , H01L27/0688
摘要： There are provided a substrate processing method and apparatus adapted to prevent deterioration of film thickness uniformity while maintaining the film forming rate. The substrate processing method comprises: (a) accommodating a plurality of substrates in a process chamber by carrying and stacking the substrates in the process chamber, (b) forming first amorphous silicon films to a predetermined thickness by heating at least the substrates and supplying first gas, and (c) forming second amorphous silicon films to a predetermined thickness by heating at least the substrates and supplying second gas different from the first gas. The first gas is higher order gas than the second gas.
摘要翻译：提供了一种适于在保持成膜速率的同时防止膜厚均匀性劣化的基板处理方法和装置。基板处理方法包括：（a）通过在处理室中承载和堆叠基板将多个基板容纳在处理室中，（b）通过至少加热基板并首先提供第一非晶硅膜，形成预定厚度的第一非晶硅膜气体，以及（c）通过至少加热所述基板并供应与所述第一气体不同的第二气体，将第二非晶硅膜形成为预定厚度。第一气体比第二气体高。

6. 发明授权

US06949474B2 Method of manufacturing a semiconductor device and a semiconductor manufacture system 有权
标题翻译：制造半导体器件和半导体制造系统的方法
公开(公告)号：US06949474B2
公开(公告)日：2005-09-27
申请号：US10359127
申请日：2003-02-06
申请人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii , Junichi Murota
发明人： Atsushi Moriya , Yasuhiro Inokuchi , Yasuo Kunii , Junichi Murota
IPC分类号： C23C16/42 , C23C16/30 , C23C16/44 , C23C16/455 , C23C16/46 , C23C16/52 , C30B25/02 , C30B25/10 , C30B29/52 , H01L21/205 , H01L21/31
CPC分类号： C23C16/45523 , C23C16/30 , C23C16/46 , C23C16/52 , C30B25/02 , C30B25/10 , C30B29/52 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/0262
摘要： This invention makes it possible to make even films composed of at least silicon and germanium with gradient germanium ratio along a film thickness direction thereof for a short deposition time. A temperature controller 61 controls a heater 2 so that temperature of wafers W will be changed from low (e.g. 400° C.) to high (e.g. 700° C.) by alternately repeating temperature changing process to heat up the wafers W and temperature regulating process when temperature of the wafers W does not change as much as that of the temperature changing process for a specific amount of time. While a gas controller 62 provides a reactive gas into a reaction tube 1 during the temperature regulating process, it controls a valve 31 to stop it during the temperature changing process.
摘要翻译：本发明使得可以在短的沉积时间内使其至少由硅和锗组成的平均膜沿其膜厚度方向具有梯度锗比。温度控制器61控制加热器2，使得晶片W的温度将从低（例如400℃）变为高（例如700℃），通过交替重复温度变化过程以加热晶片W和温度调节晶片W的温度在温度变化过程中的温度不变化一定时间的过程。当气体控制器62在温度调节过程中向反应管1提供反应气体时，它控制阀31在温度变化过程中停止它。

7. 发明授权

US06872636B2 Method for fabricating a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US06872636B2
公开(公告)日：2005-03-29
申请号：US10100922
申请日：2002-03-20
申请人： Atsushi Moriya , Yasuhiro Inokuchi , Takaaki Noda , Yasuo Kunii
发明人： Atsushi Moriya , Yasuhiro Inokuchi , Takaaki Noda , Yasuo Kunii
IPC分类号： C23C16/24 , C23C16/458 , H01L21/00
CPC分类号： C23C16/4583 , C23C16/24
摘要： A semiconductor device fabricating method includes the step of supplying BCl3 as a doping gas, SiH4 as a film forming gas, and H2 as a carrier gas to a reaction chamber of a semiconductor device fabricating apparatus, wherein SiH4, BCl3 and H2 flow in the reaction chamber on the condition that the film forming pressure ranges from about 0.1 to 100 Pa and the film forming temperature ranges from about 400 to 700° C.
摘要翻译：半导体器件制造方法包括以下步骤：将作为掺杂气体的BCl 3，作为成膜气体的SiH 4和作为载气的H 2作为半导体器件制造装置的反应室，其中SiH 4，BCl 3和H 2在反应中流动膜的成膜压力为约0.1〜100Pa，成膜温度为约400〜700℃。

8. 发明授权

US08261692B2 Substrate processing apparatus and reaction container 有权
标题翻译：基材加工设备和反应容器
公开(公告)号：US08261692B2
公开(公告)日：2012-09-11
申请号：US12823001
申请日：2010-06-24
申请人： Tadashi Kontani , Kazuyuki Toyoda , Taketoshi Sato , Toru Kagaya , Nobuhito Shima , Nobuo Ishimaru , Masanori Sakai , Kazuyuki Okuda , Yasushi Yagi , Seiji Watanabe , Yasuo Kunii
发明人： Tadashi Kontani , Kazuyuki Toyoda , Taketoshi Sato , Toru Kagaya , Nobuhito Shima , Nobuo Ishimaru , Masanori Sakai , Kazuyuki Okuda , Yasushi Yagi , Seiji Watanabe , Yasuo Kunii
IPC分类号： C23C16/50 , C23C16/509 , C23C16/503 , C23C16/505 , C23C16/458 , C23F1/00 , H01L21/306
CPC分类号： C23C16/45546 , C23C16/452 , C23C16/45542 , C23C16/45578 , C23C16/4583 , H01J37/3244
摘要： A substrate processing apparatus comprises a reaction chamber which is to accommodate stacked substrates, a gas introducing portion, and a buffer chamber, wherein the gas introducing portion is provided along a stacking direction of the substrates, and introduces substrate processing gas into the buffer chamber, the buffer chamber includes a plurality of gas-supply openings provided along the stacking direction of the substrates, and the processing gas introduced from the gas introducing portion is supplied from the gas-supply openings to the reaction chamber.
摘要翻译：基板处理装置包括容纳层叠基板的反应室，气体导入部和缓冲室，其中，沿着基板的堆叠方向设置气体导入部，并将基板处理气体导入缓冲室，缓冲室包括沿着基板的层叠方向设置的多个气体供给开口，从气体导入部导入的处理气体从气体供给口供给到反应室。

9. 发明申请

US20080251015A1 Substrate Processing Apparatus and Reaction Container 审中-公开
公开(公告)号：US20080251015A1
公开(公告)日：2008-10-16
申请号：US11933190
申请日：2007-10-31
申请人： Tadashi KONTANI , Kazuyuki Toyoda , Taketoshi Sato , Toru Kagaya , Nobuhito Shima , Nobuo Ishimaru , Masanori Sakai , Kazuyuki Okuda , Yasushi Yagi , Seiji Watanabe , Yasuo Kunii
发明人： Tadashi KONTANI , Kazuyuki Toyoda , Taketoshi Sato , Toru Kagaya , Nobuhito Shima , Nobuo Ishimaru , Masanori Sakai , Kazuyuki Okuda , Yasushi Yagi , Seiji Watanabe , Yasuo Kunii
IPC分类号： C23C16/455 , C23C16/54
CPC分类号： C23C16/45546 , C23C16/452 , C23C16/45542 , C23C16/45578 , C23C16/4583 , H01J37/3244
摘要： A substrate processing apparatus comprises a reaction chamber which is to accommodate stacked substrates, a gas introducing portion, and a buffer chamber, wherein the gas introducing portion is provided along a stacking direction of the substrates, and introduces substrate processing gas into the buffer chamber, the buffer chamber includes a plurality of gas-supply openings provided along the stacking direction of the substrates, and the processing gas introduced from the gas introducing portion is supplied from the gas-supply openings to the reaction chamber.

10. 发明授权

US5188973A Method of manufacturing SOI semiconductor element 失效
标题翻译：制造SOI半导体元件的方法
公开(公告)号：US5188973A
公开(公告)日：1993-02-23
申请号：US877446
申请日：1992-04-30
申请人： Yasuhisa Omura , Yasuo Kunii , Katsutoshi Izumi
发明人： Yasuhisa Omura , Yasuo Kunii , Katsutoshi Izumi
IPC分类号： H01L27/12 , H01L21/336 , H01L29/78 , H01L29/786
CPC分类号： H01L29/66772 , H01L29/78645 , H01L29/78648 , H01L29/78654
摘要： According to a method of manufacturing an SOI semiconductor element of this invention, a structure obtained by forming a first semiconductor layer on a first insulator is prepared. A process mask is arranged on the first semiconductor layer. The process mask has a groove pattern of a predetermined size. A groove extending between the first semiconductor layer and the first insulator layer is formed by etching the first semiconductor layer on the basis of the groove pattern of the process mask to expose the first insulator layer and etching the first insulator layer to a predetermined depth. A second semiconductor layer serving as a buried electrode is formed in the groove such that a level of an upper surface of the second semiconductor layer is equal to a level of a bottom surface of the first semiconductor layer. A second insulator layer is formed on the second semiconductor layer. Crystalline growth of a semiconductor layer is performed from side surfaces of the groove to bury the groove with a monocrystalline semiconductor. A source region and a drain region are formed in the monocrystalline semiconductor buried in the groove. A gate electrode is formed on the monocrystalline semiconductor through a gate oxide film.
摘要翻译：根据本发明的SOI半导体元件的制造方法，准备在第一绝缘体上形成第一半导体层而获得的结构。处理掩模布置在第一半导体层上。处理掩模具有预定尺寸的凹槽图案。通过基于处理掩模的凹槽图案蚀刻第一半导体层来形成在第一半导体层和第一绝缘体层之间延伸的凹槽，以暴露第一绝缘体层并将第一绝缘体层蚀刻到预定深度。用作掩埋电极的第二半导体层形成在沟槽中，使得第二半导体层的上表面的电平等于第一半导体层的底表面的电平。在第二半导体层上形成第二绝缘体层。从槽的侧面进行半导体层的结晶生长，以用单晶半导体填埋槽。源极区域和漏极区域形成在埋入槽中的单晶半导体中。栅电极通过栅极氧化膜形成在单晶半导体上。

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