专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08497192B2 Method of manufacturing a semiconductor device and substrate processing apparatus 有权
标题翻译：半导体器件和衬底处理设备的制造方法
公开(公告)号：US08497192B2
公开(公告)日：2013-07-30
申请号：US13178232
申请日：2011-07-07
申请人： Kiyohisa Ishibashi , Atsushi Moriya , Takaaki Noda , Kiyohiko Maeda
发明人： Kiyohisa Ishibashi , Atsushi Moriya , Takaaki Noda , Kiyohiko Maeda
IPC分类号： H01L21/20
CPC分类号： H01L21/02532 , C23C16/24 , C23C16/4583 , H01L21/02381 , H01L21/02587 , H01L21/0262 , H01L21/02636 , H01L21/67781
摘要： A method of manufacturing a semiconductor device includes conveying a first substrate provided with an opposing surface having insulator regions and a semiconductor region exposed between the insulator regions and a second substrate provided with an insulator surface exposed toward the opposing surface of the first substrate, into a process chamber in a state that the second substrate is arranged in to face the opposing surface of the first substrate, and selectively forming a silicon-containing film with a flat surface at least on the semiconductor region of the opposing surface of the first substrate by heating an inside of the process chamber and supplying at least a silicon-containing gas and a chlorine-containing gas into the process chamber.
摘要翻译：一种制造半导体器件的方法包括：传送具有绝缘体区域的相对表面的第一基板和暴露在绝缘体区域之间的半导体区域和设置有朝向第一基板的相对表面暴露的绝缘体表面的第二基板，处理室，其处于第二基板布置成面对第一基板的相对表面的状态，并且通过加热至少在第一基板的相对表面的半导体区域上选择性地形成具有平坦表面的含硅膜处理室的内部，并且至少将含硅气体和含氯气体供应到处理室中。

2. 发明申请

US20110046852A1 POWER STEERING DEVICE 失效
标题翻译：动力转向装置
公开(公告)号：US20110046852A1
公开(公告)日：2011-02-24
申请号：US12935211
申请日：2009-03-11
申请人： Satoru Yamamoto , Takaaki Noda , Yasuto Yanagida
发明人： Satoru Yamamoto , Takaaki Noda , Yasuto Yanagida
IPC分类号： B62D6/00 , B62D5/12
CPC分类号： B62D5/083 , B62D5/065 , B62D5/0837
摘要： A power steering device includes an oil-hydraulic pump, an electric motor to drive the pump, an inverter, a control valve, a power cylinder to produce a steering assist, and a control unit to control the drive signal of the inverter. The control valve includes a pump port supplied with oil from the pump, a first and second cylinder ports connected to first and second cylinder chambers on sides of the piston, and a discharge port. Communication between the first cylinder port and the pump port and communication between the second cylinder port and the discharge port, and communication between the first cylinder port and the discharge port and communication between the second cylinder port and the pump port are established in steered status in the other direction. Communication among the pump port and first and second cylinder ports, and isolation of the discharge port from the pump port and first and second cylinder ports are established when the control valve is in neutral status.
摘要翻译：动力转向装置包括油压泵，用于驱动泵的电动马达，逆变器，控制阀，动力缸以产生转向辅助，以及用于控制逆变器的驱动信号的控制单元。控制阀包括从泵供给油的泵口，连接到活塞侧面的第一和第二气缸室的第一和第二气缸端口以及排出口。在第一气缸端口和泵口之间的通信以及第二气缸端口和排出口之间的连通以及第一气缸端口和排出口之间的连通以及第二气缸端口和泵口之间的连通在转向状态下建立另一个方向。当控制阀处于空档状态时，建立泵口和第一和第二气缸端口之间的通信，以及排出口与泵口和第一和第二气缸端口的隔离。

3. 发明申请

US20080166882A1 Substrate Processing Apparatus and Producing Method of Semiconductor Device 有权
标题翻译：半导体器件的基板处理装置及其制造方法
公开(公告)号：US20080166882A1
公开(公告)日：2008-07-10
申请号：US11664726
申请日：2005-10-05
申请人： Hironobu Miya , Taketoshi Sato , Norikazu Mizuno , Masanori Sakai , Takaaki Noda
发明人： Hironobu Miya , Taketoshi Sato , Norikazu Mizuno , Masanori Sakai , Takaaki Noda
IPC分类号： H01L21/02 , H01L21/20
CPC分类号： C23C16/45536 , C23C16/345 , C23C16/452 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/3141 , H01L21/3185 , H01L21/67017 , H01L21/67109
摘要： A substrate treating apparatus is provided with a treatment chamber, a holding member, a heating member, and supplying members for alternately supplying the treatment chamber with first and second reacting substances. The apparatus is provided for forming a thin film on a substrate by supplying the first reacting substance to have the first reacting substance adsorbed on the substrate, removing the excess first reacting substance, then, supplying the second reacting substance to have it adsorbed on the substrate, and reacting it with the first reacting substance. The apparatus is provided with a control part for permitting the apparatus to perform the thin film forming treatment in a status where the number of product substrates lacks, in the case where the number of sheets of the product substrates held by the holding member is less than the maximum number of the product substrates that can be held by the holding member.
摘要翻译：基板处理装置设置有处理室，保持构件，加热构件和用于向处理室交替地供给第一和第二反应物质的供给构件。该装置用于通过供给第一反应物质使第一反应物质吸附在基板上，除去过量的第一反应物质，然后供给第二反应物质使其吸附在基板上而在基板上形成薄膜并使其与第一反应物质反应。该设备设置有控制部件，用于允许设备在产品基板的数量不足的状态下进行薄膜形成处理，在由保持部件保持的产品基板的张数少于可由保持构件保持的产品基板的最大数量。

4. 发明授权

US08847343B2 Method of manufacturing semiconductor device, semiconductor device and substrate processing apparatus 有权
标题翻译：制造半导体器件，半导体器件和衬底处理设备的方法
公开(公告)号：US08847343B2
公开(公告)日：2014-09-30
申请号：US13293636
申请日：2011-11-10
申请人： Norikazu Mizuno , Tomohide Kato , Takaaki Noda
发明人： Norikazu Mizuno , Tomohide Kato , Takaaki Noda
IPC分类号： H01L31/0232 , H01L31/0216 , H01L27/146 , C23C16/52 , C23C16/455 , C23C16/40
CPC分类号： H01L27/14685 , C23C16/40 , C23C16/45534 , C23C16/45542 , C23C16/45544 , C23C16/45555 , C23C16/45557 , C23C16/52 , H01L21/02172 , H01L21/022 , H01L21/02205 , H01L21/02211 , H01L21/0223 , H01L21/02274 , H01L21/0228 , H01L27/1462 , H01L27/14627 , H01L31/0216 , H01L31/02161 , H01L31/02327
摘要： An oxide film capable of suppressing reflection of a lens is formed under a low temperature. A method of manufacturing a semiconductor device includes: (a) forming a lower layer oxide film on a lens formed on a substrate using a first processing source containing a first element, a second processing source containing a second element, an oxidizing source and a catalyst, the lower layer oxide film having a refractive index greater than that of air and less than that of the lens; and (b) forming an upper layer oxide film on the lower layer oxide film using the first processing source, the oxidizing source and the catalyst, the upper layer oxide film having a refractive index greater than that of the air and less than that of the lower layer oxide film.
摘要翻译：在低温下形成能够抑制透镜反射的氧化膜。一种制造半导体器件的方法包括：（a）使用包含第一元件的第一处理源，包含第二元件的第二处理源，氧化源和催化剂在形成在基板上的透镜上形成下层氧化膜，所述下层氧化膜的折射率大于空气的折射率，并且小于所述透镜的折射率; 和（b）使用第一处理源，氧化源和催化剂在下层氧化膜上形成上层氧化膜，上层氧化膜的折射率大于空气的折射率，并且小于下层氧化膜。

5. 发明申请

US20090130829A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS 有权
标题翻译：半导体器件和衬底加工设备的制造方法
公开(公告)号：US20090130829A1
公开(公告)日：2009-05-21
申请号：US12273028
申请日：2008-11-18
申请人： Takaaki Noda , Masami Miyamoto , Ryuji Yamamoto
发明人： Takaaki Noda , Masami Miyamoto , Ryuji Yamamoto
IPC分类号： H01L21/205
CPC分类号： H01L21/02661 , C23C16/0227 , C23C16/24 , C23C16/45578 , C23C16/54 , H01L21/02532 , H01L21/0262
摘要： Provided are a manufacturing method of a semiconductor device and a substrate processing apparatus. The manufacturing method of the semiconductor device includes: loading a plurality of substrates into a reaction vessel, which is configured by a process tube and a manifold that supports the process tube, and arranging the loaded substrates within the reaction vessel; pre-processing the plurality of substrates by supplying a pre-process gas from the manifold side toward the process tube side within the reaction vessel; main-processing the plurality of pre-processed substrates by supplying a main-process gas from the manifold side toward the process tube side within the reaction vessel; and unloading the plurality of main-processed substrates from the reaction vessel, wherein in pre-processing the plurality of substrates, the pre-process gas is supplied from at least one position in an area corresponding to the manifold, and at least one position in an upper area of an area corresponding to a substrate arrangement area.
摘要翻译：提供一种半导体器件和衬底处理设备的制造方法。半导体器件的制造方法包括：将多个基板装载到反应容器中，该反应容器由处理管和支撑处理管的歧管构成，并将负载的基板布置在反应容器内; 通过在反应容器内从歧管侧向处理管侧供给预处理气体来预处理多个基板; 通过在反应容器内从歧管侧向处理管侧供给主工艺气体来主要处理多个预处理衬底; 以及从所述反应容器中卸载所述多个主处理基板，其中在预处理所述多个基板时，所述预处理气体从对应于所述歧管的区域中的至少一个位置供应，并且至少一个位置与衬底布置区域相对应的区域的上部区域。

6. 发明授权

US06686281B2 Method for fabricating a semiconductor device and a substrate processing apparatus 有权
标题翻译：半导体装置的制造方法以及基板处理装置
公开(公告)号：US06686281B2
公开(公告)日：2004-02-03
申请号：US10234520
申请日：2002-09-05
申请人： Hirohisa Yamazaki , Takaaki Noda
发明人： Hirohisa Yamazaki , Takaaki Noda
IPC分类号： H01L21311
CPC分类号： C23C16/45574 , C23C16/30 , C23C16/45578 , C30B25/02 , C30B29/52 , H01L21/67017 , Y10S438/933 , Y10S438/935 , Y10S438/936
摘要： A substrate processing apparatus for forming a boron doped silicon-germanium film on one or more substrates in a reaction furnace of a low pressure CVD apparatus uses a mixture gas of GeH4 and SiH4 as a reaction gas, and BCl3 as a doping gas. The substrate processing apparatus includes a plurality of gas outlets for supplying GeH4 at different locations in the reaction tube and a doping gas line for supplying BCl3 at least at an upstream side of gas flow in the reaction tube.
摘要翻译：在低压CVD装置的反应炉中，在一个或多个基板上形成硼掺杂的硅 - 锗膜的基板处理装置使用GeH 4和SiH 4的混合气体作为反应气体，BCl3作为掺杂气体。基板处理装置包括用于在反应管中的不同位置处供给GeH 4的多个气体出口和用于至少在反应管中的气流的上游侧供给BCl 3的掺杂气体管线。

7. 发明授权

US5285168A Operational amplifier for stably driving a low impedance load of low power consumption 失效
标题翻译：用于稳定驱动低功耗的低阻抗负载的运算放大器
公开(公告)号：US5285168A
公开(公告)日：1994-02-08
申请号：US944921
申请日：1992-09-15
申请人： Takashi Tomatsu , Takaaki Noda
发明人： Takashi Tomatsu , Takaaki Noda
IPC分类号： H03F3/30 , H03F3/345 , H03F3/45 , H04L25/02
CPC分类号： H03F3/45192 , H03F3/3001 , H03F2203/30036 , H03F2203/30096 , H03F2203/30129 , H03F2203/45028 , H03F2203/45182 , H03F2203/45281 , H04L25/028
摘要： An operational amplifier is equipped at its input stage with a folded cascode type differential amplifier and at its downstream stage with pre-buffers, which include a differential amplification stage of PMOS input and a differential amplification stage of NMOS input, as level shifters. A MOS resistor having its gate terminal fed with an intermediate bias potential between a supply voltage V.sub.DD and an earth potential is connected between every one of the drain terminals of current-mirror connected load MOSFETs in the pre-buffers. As a result, the gains of the pre-buffers in the steady state can be suppressed to about 10 dB or less. The individual MOSFETs of the push-pull output stage are individually driven by the pre-buffers of low gains.
摘要翻译：运算放大器在其输入级配有折叠型共源共栅型差分放大器，其下游级具有预缓冲器，其中包括PMOS输入的差分放大级和NMOS输入的差分放大级，作为电平转换器。其电源电压VDD和地电位之间的中间偏置电位馈入其栅极端子的MOS电阻连接在预缓冲器中电流镜连接的负载MOSFET的每个漏极端子之间。结果，可以将稳定状态下的预缓冲器的增益抑制在10dB以下。推挽输出级的各个MOSFET分别由低增益的预缓冲器驱动。

8. 发明授权

US5179539A Large scale integrated circuit having low internal operating voltage 失效
标题翻译：具有低内部工作电压的大规模集成电路
公开(公告)号：US5179539A
公开(公告)日：1993-01-12
申请号：US865677
申请日：1992-04-08
申请人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
发明人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/4074 , H01L27/02
CPC分类号： G11C5/147 , G05F1/465 , G05F3/245 , G05F3/247 , G11C11/4074 , H01L27/0203
摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16 M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.
摘要翻译：涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。提供了改进的测试这些电路的方法。

9. 发明授权

US08716147B2 Manufacturing method of semiconductor device and substrate processing apparatus 有权
标题翻译：半导体器件和衬底处理设备的制造方法
公开(公告)号：US08716147B2
公开(公告)日：2014-05-06
申请号：US12273028
申请日：2008-11-18
申请人： Takaaki Noda , Masami Miyamoto , Ryuji Yamamoto
发明人： Takaaki Noda , Masami Miyamoto , Ryuji Yamamoto
IPC分类号： H01L21/31
CPC分类号： H01L21/02661 , C23C16/0227 , C23C16/24 , C23C16/45578 , C23C16/54 , H01L21/02532 , H01L21/0262
摘要： Provided are a manufacturing method of a semiconductor device and a substrate processing apparatus. The manufacturing method of the semiconductor device includes: loading a plurality of substrates into a reaction vessel, which is configured by a process tube and a manifold that supports the process tube, and arranging the loaded substrates within the reaction vessel; pre-processing the plurality of substrates by supplying a pre-process gas from the manifold side toward the process tube side within the reaction vessel; main-processing the plurality of pre-processed substrates by supplying a main-process gas from the manifold side toward the process tube side within the reaction vessel; and unloading the plurality of main-processed substrates from the reaction vessel, wherein in pre-processing the plurality of substrates, the pre-process gas is supplied from at least one position in an area corresponding to the manifold, and at least one position in an upper area of an area corresponding to a substrate arrangement area.
摘要翻译：提供一种半导体器件和衬底处理设备的制造方法。半导体器件的制造方法包括：将多个基板装载到反应容器中，该反应容器由处理管和支撑处理管的歧管构成，并将负载的基板布置在反应容器内; 通过在反应容器内从歧管侧向处理管侧供给预处理气体来预处理多个基板; 通过在反应容器内从歧管侧向处理管侧供给主工艺气体来主要处理多个预处理衬底; 以及从所述反应容器中卸载所述多个主处理基板，其中在预处理所述多个基板时，所述预处理气体从对应于所述歧管的区域中的至少一个位置供应，并且至少一个位置与衬底布置区域相对应的区域的上部区域。

10. 发明授权

US08227030B2 Method of manufacturing semiconductor device and apparatus for processing substrate 有权
公开(公告)号：US08227030B2
公开(公告)日：2012-07-24
申请号：US12382276
申请日：2009-03-12
申请人： Takaaki Noda , Kenichi Suzaki
发明人： Takaaki Noda , Kenichi Suzaki
IPC分类号： C23C16/00 , C23C16/22
CPC分类号： C23C16/4408 , C23C16/24 , H01L21/02532 , H01L21/02579 , H01L21/0262
摘要： A process for producing a semiconductor device, in which in the formation of a boron doped silicon film from, for example, monosilane and boron trichloride by vacuum CVD technique, there can be produced a film excelling in inter-batch homogeneity with respect to the growth rate and concentration of a dopant element, such as boron. The process includes the step of performing the first purge through conducting at least once of while a substrate after treatment is housed in a reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto and the steps of performing the second purge through conducting at least once of after carrying of the substrate after treatment out of the reaction furnace, prior to carrying of a substrate to be next treated into the reaction furnace and while at least no product substrate is housed in the reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式