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1. 发明授权

US06545312B2 Nonvolatile semiconductor memory device and method for fabricating the same 有权
公开(公告)号：US06545312B2
公开(公告)日：2003-04-08
申请号：US09897417
申请日：2001-07-03
申请人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
发明人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the formation of a floating gate electrode, the floating gate electrode opposed to one of the side surfaces of the control gate electrode with the protective insulating film interposed therebetween so as to be capacitively coupled to the control gate electrode, a tunnel insulating film formed between the floating gate electrode and the semiconductor substrate, a drain region formed in a region of the semiconductor substrate containing a portion underlying the floating gate electrode, and a source region formed in a region of the semiconductor substrate opposite to the drain region relative to the control gate electrode.

2. 发明授权

US06828621B2 Nonvolatile semiconductor memory device and method for fabricating the same 失效
公开(公告)号：US06828621B2
公开(公告)日：2004-12-07
申请号：US10679431
申请日：2003-10-07
申请人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
发明人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the formation of a floating gate electrode, the floating gate electrode opposed to one of the side surfaces of the control gate electrode with the protective insulating film interposed therebetween so as to be capacitively coupled to the control gate electrode, a tunnel insulating film formed between the floating gate electrode and the semiconductor substrate, a drain region formed in a region of the semiconductor substrate containing a portion underlying the floating gate electrode, and a source region formed in a region of the semiconductor substrate opposite to the drain region relative to the control gate electrode.

3. 发明授权

US06642572B2 Nonvolatile semiconductor memory device and method for fabricating the same 失效
公开(公告)号：US06642572B2
公开(公告)日：2003-11-04
申请号：US10382520
申请日：2003-03-07
申请人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
发明人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the formation of a floating gate electrode, the floating gate electrode opposed to one of the side surfaces of the control gate electrode with the protective insulating film interposed therebetween so as to be capacitively coupled to the control gate electrode, a tunnel insulating film formed between the floating gate electrode and the semiconductor substrate, a drain region formed in a region of the semiconductor substrate containing a portion underlying the floating gate electrode, and a source region formed in a region of the semiconductor substrate opposite to the drain region relative to the control gate electrode.

4. 发明授权

US06784040B2 Nonvolatile semiconductor memory device and method for fabricating the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US06784040B2
公开(公告)日：2004-08-31
申请号：US10382508
申请日：2003-03-07
申请人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
发明人： Masataka Kusumi , Fumihiko Noro , Hiromasa Fujimoto , Akihiro Kamada , Shinji Odanaka , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the formation of a floating gate electrode, the floating gate electrode opposed to one of the side surfaces of the control gate electrode with the protective insulating film interposed therebetween so as to be capacitively coupled to the control gate electrode, a tunnel insulating film formed between the floating gate electrode and the semiconductor substrate, a drain region formed in a region of the semiconductor substrate containing a portion underlying the floating gate electrode, and a source region formed in a region of the semiconductor substrate opposite to the drain region relative to the control gate electrode.
摘要翻译：非易失性半导体存储器件具有沉积在控制栅电极的每个侧表面上的保护绝缘膜，以在形成浮栅电极期间保护控制栅电极，浮置栅极与其中一个侧表面相对控制栅电极，其间插入有保护绝缘膜，以便电容耦合到控制栅电极，形成在浮置栅电极和半导体衬底之间的隧道绝缘膜，形成在半导体衬底的包含并且形成在半导体衬底的与漏极区相对的控制栅电极相对的区域中的源极区。

5. 发明申请

US20050051837A1 Nonvolatile semiconductor memory device and method of manufacturing the same 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20050051837A1
公开(公告)日：2005-03-10
申请号：US10965955
申请日：2004-10-18
申请人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
发明人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
IPC分类号： H01L21/8247 , H01L21/28 , H01L21/316 , H01L21/336 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792
CPC分类号： H01L29/66825 , H01L29/40114 , H01L29/42324
摘要： Using a rapid thermal oxidation device, the top and side surfaces of a floating gate electrode are oxidized by In Situ Steam Generation (ISSG), wherein oxygen to which about 0.5 to 33% hydrogen has been added is introduced directly into a chamber with a temperature of approximately 900 to 1100° C. and a pressure of approximately 1,000 to 2,000 Pa, in order to generate water vapor from the introduced hydrogen and oxygen on a heated semiconductor substrate. Thus, an insulating film made of silicon oxide is formed on the surface of the floating gate electrode.
摘要翻译：使用快速热氧化装置，浮栅电极的顶表面和侧表面被原位蒸汽发生（ISSG）氧化，其中加入约0.5％至33％氢的氧气直接引入具有温度约900至1100℃，压力为约1,000至2,000Pa，以便在加热的半导体衬底上从引入的氢气和氧气产生水蒸汽。因此，在浮栅电极的表面上形成由氧化硅制成的绝缘膜。

6. 发明授权

US06830973B2 Nonvolatile semiconductor memory device and method of manufacturing the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US06830973B2
公开(公告)日：2004-12-14
申请号：US10238636
申请日：2002-09-11
申请人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
发明人： Hiromasa Fujimoto , Fumihiko Noro , Masataka Kusumi
IPC分类号： H01L218247
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324
摘要： Using a rapid thermal oxidation device, the top and side surfaces of a floating gate electrode are oxidized by In Situ Steam Generation (ISSG), wherein oxygen to which about 0.5 to 33% hydrogen has been added is introduced directly into a chamber with a temperature of approximately 900 to 1100° C. and a pressure of approximately 1,000 to 2,000 Pa, in order to generate water vapor from the introduced hydrogen and oxygen on a heated semiconductor substrate. Thus, an insulating film made of silicon oxide is formed on the surface of the floating gate electrode.
摘要翻译：使用快速热氧化装置，浮栅电极的顶表面和侧表面被原位蒸汽发生（ISSG）氧化，其中加入约0.5％至33％氢的氧气直接引入具有温度约900至1100℃，压力为约1,000至2,000Pa，以便在加热的半导体衬底上从引入的氢气和氧气产生水蒸汽。因此，在浮栅电极的表面上形成由氧化硅制成的绝缘膜。

7. 发明申请

US20080048247A1 Semiconductor device and semiconductor device fabrication method 有权
标题翻译：半导体器件和半导体器件制造方法
公开(公告)号：US20080048247A1
公开(公告)日：2008-02-28
申请号：US11806887
申请日：2007-06-05
申请人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L29/792 , H01L21/336 , H01L21/4763
CPC分类号： H01L29/792 , H01L21/0217 , H01L21/02211 , H01L21/02222 , H01L21/02271 , H01L21/02337 , H01L21/28282 , H01L21/3125 , H01L21/3185 , H01L21/76834 , H01L27/115 , H01L27/11568 , H01L29/4234 , H01L29/511 , H01L29/7923
摘要： A semiconductor device includes: source/drain regions formed in a semiconductor substrate; a trapping film for storing information by accumulating charges, the trapping film being formed in a region on the semiconductor substrate which includes a region on a channel region between the source/drain regions; and gate electrodes formed on the trapping film. A silicon nitride film containing carbon is formed by low pressure CVD using an organic material so as to cover the gate electrodes and a part of the trapping film which is located between adjacent gate electrodes.
摘要翻译：半导体器件包括：形成在半导体衬底中的源/漏区; 用于通过累积电荷来存储信息的捕集膜，所述捕获膜形成在所述半导体衬底上的包括所述源极/漏极区之间的沟道区域上的区域的区域中; 以及形成在捕获膜上的栅电极。通过使用有机材料的低压CVD形成含有碳的氮化硅膜，以覆盖位于相邻栅电极之间的栅电极和捕获膜的一部分。

8. 发明授权

US07807557B2 Method of forming a semiconductor device having a trapping film for charge accumulation 有权
标题翻译：形成具有用于电荷累积的捕获膜的半导体器件的方法
公开(公告)号：US07807557B2
公开(公告)日：2010-10-05
申请号：US11806887
申请日：2007-06-05
申请人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Koji Yoshida , Masataka Kusumi , Hiroaki Kuriyama , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L21/76
CPC分类号： H01L29/792 , H01L21/0217 , H01L21/02211 , H01L21/02222 , H01L21/02271 , H01L21/02337 , H01L21/28282 , H01L21/3125 , H01L21/3185 , H01L21/76834 , H01L27/115 , H01L27/11568 , H01L29/4234 , H01L29/511 , H01L29/7923
摘要： A semiconductor device includes: source/drain regions formed in a semiconductor substrate; a trapping film for storing information by accumulating charges, the trapping film being formed in a region on the semiconductor substrate which includes a region on a channel region between the source/drain regions; and gate electrodes formed on the trapping film. A silicon nitride film containing carbon is formed by low pressure CVD using an organic material so as to cover the gate electrodes and a part of the trapping film which is located between adjacent gate electrodes.
摘要翻译：半导体器件包括：形成在半导体衬底中的源/漏区; 用于通过累积电荷来存储信息的捕集膜，所述捕获膜形成在所述半导体衬底上的包括所述源极/漏极区之间的沟道区域上的区域的区域中; 以及形成在捕获膜上的栅电极。通过使用有机材料的低压CVD形成含有碳的氮化硅膜，以覆盖位于相邻栅电极之间的栅电极和捕获膜的一部分。

9. 发明授权

US06558997B2 Method for fabricating the control and floating gate electrodes without having their upper surface silicided 有权
标题翻译：制造控制和浮栅电极而不使其上表面硅化的方法
公开(公告)号：US06558997B2
公开(公告)日：2003-05-06
申请号：US09942948
申请日：2001-08-31
申请人： Fumihiko Noro , Seiki Ogura
发明人： Fumihiko Noro , Seiki Ogura
IPC分类号： H01L218238
CPC分类号： H01L27/11526 , G11C16/0425 , H01L27/115 , H01L27/11543
摘要： A semiconductor memory has first and second active regions that have been defined in a semiconductor substrate and electrically isolated from each other. Over the first active region, a control gate electrode has been formed with a control gate insulating film interposed therebetween. A floating gate electrode has been formed adjacent to a side face of the control gate electrode with a capacitive insulating film interposed therebetween. A tunnel insulating film is interposed between the first active region and the floating gate electrode. A gate electrode has been formed over the second active region with a gate insulating film interposed therebetween. Source/drain regions have been defined in respective parts of the second active region beside the gate electrode. Only the source/drain regions and the gate electrode have their upper surface covered with a metal silicide film.
摘要翻译：半导体存储器具有已经限定在半导体衬底中并且彼此电隔离的第一和第二有源区。在第一有源区域之后，形成控制栅极电极，其间插入有控制栅极绝缘膜。已经在控制栅极的侧面附近形成有浮置栅电极，其间插入有电容绝缘膜。隧道绝缘膜介于第一有源区和浮栅之间。在第二有源区上形成有栅极电极，其间插入有栅极绝缘膜。在栅电极旁边的第二有源区的相应部分中限定了源极/漏极区。只有源极/漏极区域和栅极电极的上表面被金属硅化物膜覆盖。

10. 发明授权

US06686622B2 Semiconductor memory device and manufacturing method thereof 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US06686622B2
公开(公告)日：2004-02-03
申请号：US10077979
申请日：2002-02-20
申请人： Fumihiko Noro , Seiki Ogura
发明人： Fumihiko Noro , Seiki Ogura
IPC分类号： H01L2976
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324
摘要： A semiconductor memory device includes a control gate electrode formed on a first main surface of a semiconductor substrate through a first insulating film, and a floating gate electrode covering a stepped region which connects the first main surface of the semiconductor substrate and a second main surface positioned at a lower level than the first main surface through a second insulating film and having a side surface capacitively coupled with one side surface of the control gate electrode through a third insulating film. The stepped region has a first stepped portion connected with the first main surface and a second stepped portion connecting the first stepped portion and the second main surface.
摘要翻译：半导体存储器件包括通过第一绝缘膜形成在半导体衬底的第一主表面上的控制栅极电极和覆盖连接半导体衬底的第一主表面的阶梯区域的浮栅电极和位于通过第二绝缘膜在比第一主表面更低的水平处，并且具有通过第三绝缘膜与控制栅电极的一个侧表面电容耦合的侧表面。台阶区域具有与第一主表面连接的第一阶梯部分和连接第一阶梯部分和第二主表面的第二阶梯部分。

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