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1. 发明授权

US06611728B1 Inspection system and method for manufacturing electronic devices using the inspection system 有权
标题翻译：使用检查系统制造电子设备的检查系统和方法
公开(公告)号：US06611728B1
公开(公告)日：2003-08-26
申请号：US09389230
申请日：1999-09-03
申请人： Natsuyo Morioka , Hisafumi Iwata , Junko Konishi , Yoko Ikeda , Kazunori Nemoto , Makoto Ono , Yasuhiro Yoshitake
发明人： Natsuyo Morioka , Hisafumi Iwata , Junko Konishi , Yoko Ikeda , Kazunori Nemoto , Makoto Ono , Yasuhiro Yoshitake
IPC分类号： G06F1900
CPC分类号： G01N21/9501 , H01L22/12 , H01L22/20
摘要： An inspection system comprises an inspection machine for inspecting a work which is processed in one of the manufacturing processes of a manufacturing line and an analysis system for outputting an inspection history list obtained by making calculations from the inspected result. The inspection history list shows a matrix of first information as the inspection processes in which the work is inspected or the manufacturing processes corresponding to the inspection processes in which the work is inspected and second information as to the works inspected by the inspection machine.
摘要翻译：检查系统包括检查机器，用于检查在生产线的一个制造过程中处理的工件和用于输出通过从检查结果进行计算而获得的检查履历表的分析系统。检查历史列表显示作为检查工作的检查过程的第一信息矩阵或与检查工作相关的检查过程对应的制造过程以及由检查机检查的工件的第二信息。

2. 发明授权

US06539272B1 Electric device inspection method and electric device inspection system 有权
标题翻译：电气设备检查方法和电气设备检查系统
公开(公告)号：US06539272B1
公开(公告)日：2003-03-25
申请号：US09494939
申请日：2000-02-01
申请人： Makoto Ono , Hisafumi Iwata , Kazunori Nemoto
发明人： Makoto Ono , Hisafumi Iwata , Kazunori Nemoto
IPC分类号： G06F1900
CPC分类号： G01N21/956 , G01N21/47 , G01N21/94 , G01N21/9501
摘要： An analysis method includes one or more inspection steps for inspecting defects on a wafer, including an electrical inspection an step for inspecting electrical function of dies of the wafer, a determination step for determining whether each die is a good die or a bad die by using results obtained in the electrical inspection step, a calculation step for calculating the yield of dies without defects by using results obtained in the determination step, and an output step for outputting a result of the calculation step.
摘要翻译：分析方法包括检查晶片上的缺陷的一个或多个检查步骤，包括电检查用于检查晶片的管芯的电功能的步骤，用于通过使用用于确定每个管芯是否为良好管芯或坏死的确定步骤在电检查步骤中获得的结果，通过使用在确定步骤中获得的结果来计算没有缺陷的管芯的产量的计算步骤以及用于输出计算步骤的结果的输出步骤。

3. 发明申请

US20050195396A1 Inspection condition setting program, inspection device and inspection system 审中-公开
公开(公告)号：US20050195396A1
公开(公告)日：2005-09-08
申请号：US11066121
申请日：2005-02-24
申请人： Makoto Ono , Yohei Asakawa , Hisafumi Iwata , Kanako Harada
发明人： Makoto Ono , Yohei Asakawa , Hisafumi Iwata , Kanako Harada
IPC分类号： G01N21/956 , G01R31/303 , G06T1/00 , G06T7/00 , H01L21/00 , H01L21/66 , G01B11/00
CPC分类号： G01N21/9501 , G01N21/95684 , G01R31/2894 , H01L22/12 , H01L22/20
摘要： A program is provided for setting efficiently, and with precision, the inspection conditions of an inspection device that detects particles and deformed patterns in or on products such as semiconductor integrated circuits that are manufactured by simultaneously forming a plurality of products on a single substrate. In particular, the system achieves greater efficiency of the setting of cell comparison regions and the setting of non-inspection regions. Input processing of a product type code, input processing of chip size and configuration information, reading processing of circuit layout data, extraction processing of repeated pattern region coordinates, extraction processing of sparse region coordinates and circuit pattern condition registration processing are sequentially executed.

4. 发明授权

US06928375B2 Inspection condition setting program, inspection device and inspection system 失效
标题翻译：检验条件设定程序，检查装置和检查系统
公开(公告)号：US06928375B2
公开(公告)日：2005-08-09
申请号：US10411785
申请日：2003-04-10
申请人： Makoto Ono , Yohei Asakawa , Hisafumi Iwata , Kanako Harada
发明人： Makoto Ono , Yohei Asakawa , Hisafumi Iwata , Kanako Harada
IPC分类号： G01N21/956 , G01R31/303 , G06T1/00 , G06T7/00 , H01L21/00 , H01L21/66 , G06F19/00
CPC分类号： G01N21/9501 , G01N21/95684 , G01R31/2894 , H01L22/12 , H01L22/20
摘要： A program is provided for setting efficiently, and with precision, the inspection conditions of an inspection device that detects particles and deformed patterns in or on products such as semiconductor integrated circuits that are manufactured by simultaneously forming a plurality of products on a single substrate. In particular, the system achieves greater efficiency of the setting of cell comparison regions and the setting of non-inspection regions. Input processing of a product type code, input processing of chip size and configuration information, reading processing of circuit layout data, extraction processing of repeated pattern region coordinates, extraction processing of sparse region coordinates and circuit pattern condition registration processing are sequentially executed.
摘要翻译：提供了一种程序，用于精确地设置检测装置的检查条件，该检查装置检测在通过在单个基板上同时形成多个产品而制造的半导体集成电路等产品中或其上产生的变形图案。特别地，该系统实现了细胞比较区域的设置和非检查区域的设置的更高的效率。顺序地执行产品类型代码的输入处理，芯片尺寸和配置信息的输入处理，电路布局数据的读取处理，重复模式区域坐标的提取处理，稀疏区域坐标的提取处理和电路图案状态注册处理。

5. 发明授权

US06826735B2 Inspection data analysis program, defect inspection apparatus, defect inspection system and method for semiconductor device 失效
标题翻译：检验数据分析程序，缺陷检查装置，半导体装置的缺陷检查系统和方法
公开(公告)号：US06826735B2
公开(公告)日：2004-11-30
申请号：US10196146
申请日：2002-07-17
申请人： Makoto Ono , Hisafumi Iwata , Kanako Harada
发明人： Makoto Ono , Hisafumi Iwata , Kanako Harada
IPC分类号： G06F1750
CPC分类号： G01N21/95684 , G06T7/0002 , G06T7/62 , G06T2200/24 , G06T2207/30148
摘要： Inspection data output from an inspection apparatus is read, the inspection data containing at least one information piece of coordinate value information and size information of a particle or a pattern defect of an inspected object, and drawing data of a product of the inspected object is read. Information is extracted which is representative of a relation between at least one information piece of coordinated value information and size information of the particle or pattern defect of the inspected object in the read inspection data and the read drawing data input at said drawing data input step. The extracted information is compared with determination criterion information registered beforehand and it is determined whether each particle or pattern defect of the inspected object in the inspection data is a detection error or not.
摘要翻译：读取从检查装置输出的检查数据，读取包含检测对象的粒子或图案缺陷的坐标值信息和尺寸信息的至少一个信息的检查数据和被检查对象的乘积的绘制数据。提取信息，其代表在读取检查数据中的至少一个协调价值信息信息和被检查对象的粒子或图案缺陷的尺寸信息与在所述绘制数据输入步骤输入的读取绘制数据之间的关系。将提取的信息与预先登记的确定标准信息进行比较，并且确定检查数据中被检查对象的每个粒子或图案缺陷是否是检测错误。

6. 发明授权

US06775817B2 Inspection system and semiconductor device manufacturing method 失效
标题翻译：检测系统和半导体器件制造方法
公开(公告)号：US06775817B2
公开(公告)日：2004-08-10
申请号：US10004168
申请日：2001-10-30
申请人： Makoto Ono , Hisafumi Iwata , Keiko Kirino
发明人： Makoto Ono , Hisafumi Iwata , Keiko Kirino
IPC分类号： G06F1750
CPC分类号： H01L21/67271 , G01N21/9501 , G01N21/956 , H01L22/20
摘要： A method and system are provided for analyzing defects having the potential to become electrical failures, during the inspection of particles and/or pattern defects of a wafer used in the manufacture of electronic devices such as semiconductor integrated circuits. Defect map data is processed along with failure probability data. Next, defect-dependent failure probability calculations are made to obtain the failure probability of each defect in the defect map data. That data is then used to prepare failure-probability-added defect map data. Further, a selection process of defects to be reviewed is used to reorder and filter defects from the failure-probability-added defect map data, thus selecting one or more defects for review.
摘要翻译：提供了一种方法和系统，用于在用于制造诸如半导体集成电路的电子器件的晶片的颗粒和/或图案缺陷的检查期间分析具有变为电气故障的可能性的缺陷。缺陷图数据与故障概率数据一起处理。接下来，进行与缺陷相关的故障概率计算，以获得缺陷图数据中的每个缺陷的故障概率。然后将该数据用于准备故障概率添加缺陷图数据。此外，使用要检查的缺陷的选择处理用于从故障概率添加缺陷图数据重新排序和过滤缺陷，从而选择一个或多个缺陷以供审查。

7. 发明授权

US06687633B2 Inspection system, inspection apparatus, inspection program, and production method of semiconductor devices 失效
标题翻译：检测系统，检验仪器，检验程序和半导体器件的生产方法
公开(公告)号：US06687633B2
公开(公告)日：2004-02-03
申请号：US10079518
申请日：2002-02-22
申请人： Makoto Ono , Hisafumi Iwata
发明人： Makoto Ono , Hisafumi Iwata
IPC分类号： G01N3700
CPC分类号： H01L21/67288
摘要： In the wafer production process of a semiconductor integrated circuit, an inspection system and an inspection apparatus that convert and output a yield loss at high accuracy from the result of a defect inspection, such as a dark-field inspection and a bright-field inspection without waiting for the result of the final probing test. Defect map data read processing and kill ratio computation data read processing are performed. Subsequently, kill ratio computation processing every defect computes a kill ratio every defect using defect map data and kill ratio computation data. Subsequently, kill ratio computation processing every chip computes a kill ratio every LSI chip using the kill ratio every defect. Subsequently, yield loss computation processing computes a yield loss of the defect map data using the kill ratio every chip and yield loss output processing outputs the computation result.
摘要翻译：在半导体集成电路的晶片生产过程中，检查系统和检查装置从缺陷检查的结果（例如暗场检查和明场检查）转换并输出高精度的屈服损失而没有等待最终探测测试的结果。执行缺陷地图数据读取处理和杀死比计算数据读取处理。随后，每个缺陷的杀伤比计算处理使用缺陷图数据和杀死比计算数据计算每个缺陷的杀伤比。随后，每个芯片的杀死率计算处理使用每个缺陷的杀死率来计算每个LSI芯片的杀死率。随后，屈服损失计算处理使用每个芯片的杀死率来计算缺陷图数据的屈服损失，并且屈服损失输出处理输出计算结果。

8. 发明授权

US08319960B2 Defect inspection system 失效
标题翻译：缺陷检查系统
公开(公告)号：US08319960B2
公开(公告)日：2012-11-27
申请号：US12770337
申请日：2010-04-29
申请人： Kenji Aiko , Shuichi Chikamatsu , Minori Noguchi , Hisafumi Iwata
发明人： Kenji Aiko , Shuichi Chikamatsu , Minori Noguchi , Hisafumi Iwata
IPC分类号： G01N21/88
CPC分类号： H04N7/18 , G01N21/9501 , G01N21/956 , G01N2021/8822 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A defect inspection system can suppress an effect of light from a sample rough surface or a regular circuit pattern and increasing a gain of light from a defect such as a foreign material to detect the defect on the sample surface with high sensitivity. When a lens with a large NA value is used, the outer diameter of the lens is 10a, and an angle between the sample surface and a traveling direction of the light from a defect is α1. An oblique detection optics system receives the light from the defect at a reduced elevation angle α2 with respect to the sample surface to reduce light from the sample rough surface, an oxide film rough bottom surface, and a circuit pattern, and to increase the amount of the light from the defect and detected. The diameter 10a of a lens is smaller than the diameter 10b, resulting in a reduction in the ability to focus the scattered light. When a lens with an outer diameter 10c is used to improve the focus ability, the lens interferes with the sample. To avoid the interference, a portion of the lens interfering with the sample is removed. The lens has an aperture larger than the diameter 10b while the lens receives the light scattered at the elevation angle α2, making it possible to improve the ability to detect defects and lens performance simultaneously.
摘要翻译：缺陷检查系统可以抑制来自样品粗糙表面或常规电路图案的光的影响，并且增加来自诸如异物的缺陷的光的增益以高灵敏度检测样品表面上的缺陷。当使用具有大NA值的透镜时，透镜的外径为10a，并且样品表面与来自缺陷的光的行进方向之间的角度为α1。倾斜检测光学系统以相对于样品表面的降低的仰角α2接收来自缺陷的光，以减少来自样品粗糙表面，氧化膜粗糙底表面和电路图案的光，并且增加来自缺陷的光并检测。透镜的直径10a小于直径10b，导致散射光聚焦的能力降低。当使用外径为10c的透镜来提高聚焦能力时，透镜会干扰样品。为了避免干扰，去除了与样品干扰的一部分透镜。透镜具有大于直径10b的孔径，而透镜接收以仰角α2散射的光，从而可以提高同时检测缺陷和透镜性能的能力。

9. 发明授权

US07426023B2 Method and apparatus for detecting defects 有权
标题翻译：检测缺陷的方法和装置
公开(公告)号：US07426023B2
公开(公告)日：2008-09-16
申请号：US11296290
申请日：2005-12-08
申请人： Yoshimasa Ohshima , Hisafumi Iwata , Hiroyuki Nakano
发明人： Yoshimasa Ohshima , Hisafumi Iwata , Hiroyuki Nakano
IPC分类号： G01N21/00
CPC分类号： G01N21/47 , G01N21/21 , G01N21/94 , G01N21/9501 , G01N2021/8825
摘要： There is disclosed a defect detecting apparatus that focuses a laser beam, irradiates it onto the surface of a sample to be examined, and detects a foreign substance/defect existing on the surface from the scattered light as a result of the irradiation of the beam onto the sample surface. In order to stably detect defects such as foreign substance, the defect detecting apparatus according to the invention is constructed to use a beam shape optical system by which the laser beam emitted from a laser source is shaped to change the illumination intensity from its Gauss distribution to a flat distribution so that the detected signal can be stably produced even if the relative position of a defect/foreign substance to the laser beam irradiation position is changed.
摘要翻译：公开了一种将激光束聚焦并将其照射到待检查样品的表面上的缺陷检测装置，并且由于将光束照射到散射光上而检测存在于表面上的异物/缺陷样品表面。为了稳定地检测异物等缺陷，根据本发明的缺陷检测装置的结构是使用光束形状光学系统，通过该光束系统将从激光源发射的激光束成形为将照射强度从其高斯分布改变为平坦分布，使得即使改变了缺陷/异物与激光束照射位置的相对位置，也能够稳定地产生检测信号。

10. 发明授权

US5278012A Method for producing thin film multilayer substrate, and method and apparatus for detecting circuit conductor pattern of the substrate 失效
标题翻译：薄膜多层基板的制造方法以及检测基板电路导体图案的方法和装置
公开(公告)号：US5278012A
公开(公告)日：1994-01-11
申请号：US938516
申请日：1992-09-02
申请人： Chie Yamanaka , Toshiaki Ichinose , Takanori Ninomiya , Hisafumi Iwata , Yasuo Nakagawa , Nobuyuki Akiyama
发明人： Chie Yamanaka , Toshiaki Ichinose , Takanori Ninomiya , Hisafumi Iwata , Yasuo Nakagawa , Nobuyuki Akiyama
IPC分类号： G01N21/956 , H01L21/00 , H01L21/48 , H01L21/66 , H05K3/22 , G01N21/88 , G01N21/64
CPC分类号： H01L21/67121 , G01N21/95684 , H01L21/4857 , H01L22/20 , H05K3/225 , G01N2021/8825
摘要： A method for producing a thin film multilayer substrate having a base substrate, and, which a plurality of conductor pattern layers superposed thereon through dielectric layers therebetween comprises the steps of: optically detecting the uppermost conductor pattern layer whenever the conductor pattern layer is formed on the base substrate; inspecting an absence and/or presence of a fault of the conductor pattern layer; and repairing a faulty portion in accordance with fault position data detected by the inspecting. According to this method, it is possible to enhance a production yield of relatively large size of thin film multilayer substrates which needs a relatively small amount of production at a high production cost, for mounting LSI chips thereon.
摘要翻译：一种制造具有基底基板的薄膜多层基板的方法，其中通过介电层叠置在其上的多个导体图案层之间包括以下步骤：每当在导体图案层上形成导体图案层时，光学检测最上面的导体图案层基底; 检查导体图案层的缺陷和/或存在故障; 并根据检查检测到的故障位置数据修复故障部分。根据这种方法，可以提高生产成本较高的相对大尺寸薄膜多层基板的生产成本，以便在其上安装LSI芯片。

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