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1. 发明授权

US07354861B1 Polishing method and polishing liquid 失效
标题翻译：抛光方法和抛光液
公开(公告)号：US07354861B1
公开(公告)日：2008-04-08
申请号：US09453831
申请日：1999-12-02
申请人： Kenro Nakamura , Takeo Kubota , Gaku Minamihaba
发明人： Kenro Nakamura , Takeo Kubota , Gaku Minamihaba
IPC分类号： H01L21/302
CPC分类号： H01L21/3212 , C09G1/00 , C09G1/02
摘要： Disclosed is a method for polishing a surface of a substrate containing Ru or a Ru compound in a surface region, said method comprising a polishing step with a polishing liquid containing tetravalent cerium ions. The polishing liquid is prepared by adding a compound having a tetravalent cerium ion or its solution to a solvent in or immediately before the polishing step of the substrate.
摘要翻译：公开了一种在表面区域中研磨含有Ru或Ru化合物的基板的表面的方法，所述方法包括具有含有四价铈离子的研磨液的研磨工序。抛光液是通过在基板的研磨步骤之前或之前向溶剂中加入具有四价铈离子或其溶液的化合物而制备的。

2. 发明授权

US06429134B1 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06429134B1
公开(公告)日：2002-08-06
申请号：US09606149
申请日：2000-06-29
申请人： Takeo Kubota , Hiroyuki Yano , Kenro Nakamura
发明人： Takeo Kubota , Hiroyuki Yano , Kenro Nakamura
IPC分类号： H01L21302
CPC分类号： H01L21/31053 , H01L21/3212 , H01L21/76224 , H01L21/7684
摘要： A method of manufacturing a semiconductor device, which comprises the steps of providing a substrate having a groove on the surface thereof, forming a burying film on the substrate to thereby fill the groove with the burying film, performing a first polishing step to polish the burying film by means of a CMP method, the polishing being suspended before the substrate is exposed, and performing a second polishing step to polish the burying film by means of a CMP method until part of the burying film which is disposed outside the groove is removed. The time to finish polishing of the second polishing step is determined based on a film thickness of the burying film which is left remained after finishing the first polishing step. The first polishing step may be performed under a condition which differs from that of the second polishing step.
摘要翻译：一种制造半导体器件的方法，包括以下步骤：在其表面上提供具有沟槽的衬底，在衬底上形成掩埋膜，从而用掩埋膜填充沟槽，执行第一抛光步骤以抛光掩埋通过CMP方法将所述抛光悬浮在所述基板被暴露之前，并且进行第二抛光步骤，以通过CMP方法对所述掩埋膜进行抛光，直到除去设置在所述凹槽外部的掩埋膜的一部分。基于在完成第一研磨步骤后残留的掩埋膜的膜厚度来确定第二抛光步骤的抛光的时间。可以在与第二研磨工序不同的条件下进行第一研磨工序。

3. 发明申请

US20050254998A1 Reactive detection chip and spotter suitable for manufacturing the chip 审中-公开
标题翻译：无源检测芯片和检测器适合制造芯片
公开(公告)号：US20050254998A1
公开(公告)日：2005-11-17
申请号：US11066434
申请日：2005-02-28
申请人： Kenro Nakamura , Masahito Abe , Naoaki Ogure
发明人： Kenro Nakamura , Masahito Abe , Naoaki Ogure
IPC分类号： B01J19/00 , B01L3/02 , B01L99/00 , G01N21/64 , G01N31/22
CPC分类号： B01L3/0268 , B01J19/0046 , B01J2219/00367 , B01J2219/00378 , B01J2219/00481 , B01J2219/00484 , B01J2219/00493 , B01J2219/00497 , B01J2219/005 , B01J2219/00527 , B01J2219/00576 , B01J2219/00585 , B01J2219/00596 , B01J2219/00648 , B01J2219/00659 , B01J2219/00691 , B01J2219/00722 , B01L9/52 , B01L13/02 , B01L2300/0838 , B01L2400/021 , G01N21/6452
摘要： A reactive detection chip having spots formed by immobilizing a plurality of porous particles in a cluster onto a substrate, the porous particles having probe molecules bound to surfaces of the porous particles and surfaces of pores in the particles including pores, wherein the porous particles are transparent to incident light, and have been immobilized in a single-layered state onto the substrate, is provided. A spotter suitable for spotting a liquid containing low dispersibility particles in manufacturing the reactive detection chip is also provided. In the reactive detection chip, the number of probes can be stably controlled, and a three-dimensional array of the probes uniformizes the supply of a sample to the probes. Thus, the magnitude of signal components is stabilized, and signal components are stably increased, so that the S/N ratio is increased, and the detection capability of the DNA chip can be enhanced. The use of the spotter enables the chip to be manufactured more efficiently.
摘要翻译：一种反应性检测芯片，其具有通过将多个多孔颗粒固定在基板上形成的点，所述多孔颗粒具有结合到所述多孔颗粒的表面的颗粒和包括孔的颗粒中的孔的表面，其中所述多孔颗粒是透明的提供入射光，并且已经以单层状态固定在基板上。还提供了适合于在制造无功检测芯片时检测含有低分散性颗粒的液体的检测器。在反应检测芯片中，可以稳定地控制探针的数量，并且探针的三维阵列将样品的供给均匀化到探针。因此，信号分量的大小稳定，信号分量稳定增加，从而提高S / N比，提高DNA芯片的检测能力。使用该检测器可以更有效地制造芯片。

4. 发明授权

US06620336B2 Polishing pad, polishing apparatus and polishing method 失效
标题翻译：抛光垫，抛光装置和抛光方法
公开(公告)号：US06620336B2
公开(公告)日：2003-09-16
申请号：US09816169
申请日：2001-03-26
申请人： Kenro Nakamura
发明人： Kenro Nakamura
IPC分类号： B44C122
CPC分类号： B24B37/20 , B23H5/08 , B24B37/046 , H01L21/3212
摘要： A polishing pad for use in polishing a surface of a substrate comprises a pad main body having a polishing surface and a plurality of electrode portions formed within the pad main body and mutually spaced apart in a plane direction of the pad main body. Each electrode portion is formed of a conductive portion and an insulating portion formed on the conductive portion.
摘要翻译：用于抛光衬底表面的抛光垫包括具有抛光表面的焊盘主体和形成在焊盘主体内并在焊盘主体的平面方向上相互间隔开的多个电极部分。每个电极部分由形成在导电部分上的导电部分和绝缘部分形成。

5. 发明授权

US6096631A Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US6096631A
公开(公告)日：2000-08-01
申请号：US081010
申请日：1998-05-19
申请人： Kenro Nakamura , Rempei Nakata , Yusuke Kohyama , Nobuo Hayasaka
发明人： Kenro Nakamura , Rempei Nakata , Yusuke Kohyama , Nobuo Hayasaka
IPC分类号： H01L21/3205 , H01L21/304 , H01L21/321 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76877 , H01L21/3212 , H01L21/7684
摘要： The present invention provides a method of manufacturing a semiconductor device, including the steps of forming a first film on an entire surface of a substrate having a recessed portion, including a bottom surface and a side wall of the recessed portion, without completely filling the recessed portion, forming a second film on an entire surface of the first film such that the recessed portion, on the bottom surface and the side wall of which the first film is formed, is completely filled, and polishing the first and second films by a chemical-mechanical polishing method such that the substrate is exposed and the first and second films in the recessed portion remain.
摘要翻译：本发明提供一种制造半导体器件的方法，包括以下步骤：在具有凹部的基板的整个表面上形成第一膜，该凹部包括凹部的底面和侧壁，而不完全填充凹部在所述第一膜的整个表面上形成第二膜，使得形成所述第一膜的所述底面和所述第一膜的所述侧壁上的凹部被完全填充，并且通过化学品对所述第一膜和所述第二膜进行抛光 - 机械抛光方法，使得基板被暴露，并且凹部中的第一和第二膜保留。

6. 发明申请

US20080188167A1 Substrate processing apparatus 审中-公开
公开(公告)号：US20080188167A1
公开(公告)日：2008-08-07
申请号：US12078560
申请日：2008-04-01
申请人： You Ishii , Masayuki Nakanishi , Kenro Nakamura
发明人： You Ishii , Masayuki Nakanishi , Kenro Nakamura
IPC分类号： B24B5/00
CPC分类号： B24B9/065 , B24B21/002
摘要： A substrate processing apparatus has a polishing tape and a polishing head for pressing the polishing tape against a peripheral portion of a semiconductor wafer. The substrate processing apparatus polishes the wafer due to sliding contact of the polishing tape and the wafer. The polishing head has an elastic body for supporting the polishing tape. The substrate processing apparatus has an air cylinder for pressing the polishing head so that the elastic body of the polishing head presses the polishing tape against the predetermined portion of the wafer under a constant force.

7. 发明授权

US06239032B1 Polishing method 失效
标题翻译：抛光方法
公开(公告)号：US06239032B1
公开(公告)日：2001-05-29
申请号：US09207629
申请日：1998-12-09
申请人： Kenro Nakamura , Hiroyuki Yano
发明人： Kenro Nakamura , Hiroyuki Yano
IPC分类号： B44C122
CPC分类号： C09G1/02 , C09K3/1463 , H01L21/31053
摘要： A silicon nitride film is formed on a base layer having a silicon oxide film and a trench, in such a manner that the trench of the base layer is filled with the silicon nitride film. Subsequently, the silicon nitride film is selectively polished with reference to the silicon oxide film, with the silicon oxide film used as a stopper. The silicon nitride film is polished in a chemical mechanical polishing process that uses slurry containing a phosphoric acid and silica whose particle diameter is less than 10 nm, or slurry containing a phosphoric acid derivative and silica whose particle diameter is less than 10 nm. As a result of this selective polishing, the silicon nitride film selectively remains inside the trench.
摘要翻译：在具有氧化硅膜和沟槽的基底层上形成氮化硅膜，使得基底层的沟槽填充有氮化硅膜。随后，相对于氧化硅膜选择性地研磨氮化硅膜，其中氧化硅膜用作塞子。在使用含有磷酸和粒径小于10nm的二氧化硅的浆料的化学机械抛光工艺或者粒径小于10nm的磷酸衍生物和二氧化硅的浆料中进行氮化硅膜的研磨。作为这种选择抛光的结果，氮化硅膜选择性地保留在沟槽内。

8. 发明授权

US07367873B2 Substrate processing apparatus 有权
标题翻译：基板加工装置
公开(公告)号：US07367873B2
公开(公告)日：2008-05-06
申请号：US10364359
申请日：2003-02-12
申请人： You Ishii , Masayuki Nakanishi , Kenro Nakamura
发明人： You Ishii , Masayuki Nakanishi , Kenro Nakamura
IPC分类号： B24B5/00 , B24B9/00 , B24B49/00
CPC分类号： B24B9/065 , B24B21/002
摘要： A substrate processing apparatus has a polishing tape and a polishing head for pressing the polishing tape against a peripheral portion of a semiconductor wafer. The substrate processing apparatus polishes the wafer due to sliding contact of the polishing tape and the wafer. The polishing head has an elastic body for supporting the polishing tape. The substrate processing apparatus has an air cylinder for pressing the polishing head so that the elastic body of the polishing head presses the polishing tape against the predetermined portion of the wafer under a constant force.
摘要翻译：基板处理装置具有研磨带和用于将研磨带压靠在半导体晶片的周边部分上的研磨头。基板处理装置由于研磨带和晶片的滑动接触而抛光晶片。抛光头具有用于支撑研磨带的弹性体。基板处理装置具有用于按压抛光头的气缸，使得抛光头的弹性体以恒定的力将抛光带压在晶片的预定部分上。

9. 发明授权

US07351131B2 Method for manufacturing semiconductor device and polishing apparatus 失效
标题翻译：半导体器件和抛光装置的制造方法
公开(公告)号：US07351131B2
公开(公告)日：2008-04-01
申请号：US11178318
申请日：2005-07-12
申请人： Kenro Nakamura , Naoto Miyashita , Takashi Yoda , Katsuya Okumura
发明人： Kenro Nakamura , Naoto Miyashita , Takashi Yoda , Katsuya Okumura
IPC分类号： B24B1/00
CPC分类号： H01L21/304 , B24B9/065 , B24B21/002 , B24B21/06 , H01L21/321 , Y10S134/902
摘要： In manufacturing a semiconductor device, a part of an element is formed on the surface of a substrate, and at least a periphery of the substrate is polished using a polishing member stretched around the periphery of the substrate so that a polishing face of the polishing member is slid on a polishing target surface of the periphery.
摘要翻译：在半导体器件的制造中，元件的一部分形成在基板的表面上，并且使用在基板周围进行拉伸的研磨部件来研磨基板的至少周边，使得研磨部件的研磨面在周边的抛光对象表面上滑动。

10. 发明授权

US07066787B2 Substrate processing apparatus 有权
标题翻译：基板加工装置
公开(公告)号：US07066787B2
公开(公告)日：2006-06-27
申请号：US10765147
申请日：2004-01-28
申请人： Masayuki Nakanishi , You Ishii , Kenro Nakamura
发明人： Masayuki Nakanishi , You Ishii , Kenro Nakamura
IPC分类号： B24B49/00 , B24B51/00 , B24B7/00
CPC分类号： B24B9/065 , B24B21/002
摘要： A substrate processing apparatus is used for removing surface irregularities occurring on a peripheral portion (a bevel portion, an edge portion, and a notch) of a substrate, such as a semiconductor wafer, and films deposited as a contaminant on the peripheral portion of such a substrate. The substrate processing apparatus includes an edge-portion polisher for pressing a polishing tape against an edge portion of a substrate and causing relative movement between the polishing tape and the substrate to polish the edge portion of the substrate, and a bevel-portion polisher for pressing a polishing tape against a bevel portion of the substrate and causing relative movement between this polishing tape and the substrate to polish the bevel portion of the substrate.
摘要翻译：基板处理装置用于去除诸如半导体晶片的基板的外围部分（斜面部分，边缘部分和凹口）上出现的表面凹凸，以及作为污染物沉积在其周边部分上的薄膜底物。基板处理装置包括：边缘部分抛光机，用于将研磨带压靠在基板的边缘部分上，并引起研磨带与基板之间的相对运动以抛光基板的边缘部分;以及斜面部分抛光机，用于按压抛光带抵靠基板的斜面部分，并引起该抛光带与基板之间的相对移动以抛光基板的斜面部分。

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