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    • 1. 发明申请
    • Clean, dense yttrium oxide coating protecting semiconductor processing apparatus
    • 清洁,致密的氧化钇涂层保护半导体加工设备
    • US20050037193A1
    • 2005-02-17
    • US10898113
    • 2004-07-22
    • Jennifer SunSenh ThachJim DempsterLi Xu
    • Jennifer SunSenh ThachJim DempsterLi Xu
    • C23C16/44C23C28/00B32B15/04
    • C30B35/00C23C4/11C23C4/18C23C14/00C23C16/4404C23C28/042Y10S134/902Y10T428/26
    • Disclosed herein is a method for applying plasma-resistant coatings for use in semiconductor processing apparatus. The coatings are applied over a substrate which typically comprises an aluminum alloy of the 2000 series or the 5000 through 7000 series. The coating typically comprises an oxide or a fluoride of Y, Sc, La, Ce, Eu, Dy, or the like, or yttrium-aluminum-garnet (YAG). The coating may further comprise about 20 volume % or less of Al2O3. The coatings are typically applied to a surface of an aluminum alloy substrate or an anodized aluminum alloy substrate using a technique selected from the group consisting of thermal/flame spraying, plasma spraying, sputtering, and chemical vapor deposition (CVD). To provide the desired corrosion resistance, it is necessary to place the coating in compression. This is accomplished by controlling deposition conditions during application of the coating.
    • 本文公开了一种用于施加用于半导体处理装置的耐等离子体涂层的方法。 将涂层施加在通常包括2000系列或5000至7000系列的铝合金的基底上。 涂层通常包含Y,Sc,La,Ce,Eu,Dy等的氧化物或氟化物,或钇 - 铝 - 石榴石(YAG)。 涂层可以进一步包含约20体积%或更少的Al 2 O 3。 涂层通常使用选自热/火焰喷涂,等离子喷涂,溅射和化学气相沉积(CVD)的技术施加到铝合金基板或阳极氧化铝合金基板的表面上。 为了提供所需的耐腐蚀性,必须将涂层置于压缩状态。 这是通过在施加涂层期间控制沉积条件来实现的。
    • 5. 发明授权
    • System level in-situ integrated dielectric etch process particularly useful for copper dual damascene
    • 系统级原位集成电介质蚀刻工艺特别适用于铜双镶嵌
    • US06949203B2
    • 2005-09-27
    • US10379439
    • 2003-03-03
    • Chang-Lin HsiehDiana Xiaobing MaBrian Sy Yuan ShiehGerald Zheyao YinJennifer SunSenh ThachLee LuoClaes H. Bjorkman
    • Chang-Lin HsiehDiana Xiaobing MaBrian Sy Yuan ShiehGerald Zheyao YinJennifer SunSenh ThachLee LuoClaes H. Bjorkman
    • H01L21/00H01L21/311H01L21/768
    • H01L21/76832H01J37/32458H01L21/31116H01L21/31138H01L21/67184H01L21/67207H01L21/67219H01L21/6723H01L21/76802H01L21/76804H01L21/76807
    • An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. In one embodiment the first chamber includes an interior surface that has been roughened to at least 100 Ra and the second chamber includes an interior surface that has a roughness of less than about 32 Ra. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a barrier layer and a feature in the substrate to be contacted into the first chamber where the dielectric layer is etched in a process that encourages polymer formation over the roughened interior surface of the chamber. The substrate is then transferred from the first chamber to the second chamber under vacuum conditions and, in the second chamber, is exposed to a reactive plasma such as oxygen to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the barrier layer is etched through to the feature to be contacted in the second chamber of the multichamber substrate processing system using a process that discourages polymer formation over the relatively smooth interior surface of the second chamber. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps. In some embodiments the interior surface of the first chamber has a roughness between 100 and 200 Ra and in other embodiments the roughness of the first chamber's interior surface is between 110 and 160 Ra.
    • 在具有第一和第二蚀刻室的多室衬底处理系统中执行的集成原位蚀刻工艺。 在一个实施例中,第一室包括已经被粗糙化至少100个的内表面,而第二室包括具有小于约32μm的粗糙度的内表面, / SUB>。 该方法包括在向下的方向上转移其上形成有图案的光致抗蚀剂掩模,电介质层,阻挡层和衬底中的特征的衬底,以接触第一室,其中介电层被刻蚀在鼓励聚合物的过程中 在室的粗糙内表面上形成。 然后在真空条件下将衬底从第一室转移到第二室,并且在第二室中暴露于诸如氧的反应性等离子体以剥离沉积在衬底上的光致抗蚀剂掩模。 在光致抗蚀剂掩模被剥离之后,通过阻止在第二室的相对光滑的内表面上聚合物形成的工艺,阻挡层被蚀刻到多室基板处理系统的第二室中以接触的特征。 所有三个蚀刻步骤都是在系统级原位工艺中进行的,因此基板不会在台阶之间暴露于环境中。 在一些实施例中,第一室的内表面具有在100和200之间的粗糙度,而在其它实施例中,第一室的内表面的粗糙度在110和160之间, SUB>。
    • 8. 发明申请
    • Process kit for erosion resistance enhancement
    • 防腐蚀加工工艺套件
    • US20050016684A1
    • 2005-01-27
    • US10627213
    • 2003-07-25
    • Jennifer SunAnanda KumarSenh Thach
    • Jennifer SunAnanda KumarSenh Thach
    • H01L21/3065H01J37/32C23F1/00
    • H01J37/32477H01J37/32642
    • A process kit is described that resists plasma erosion, preserves the spatial uniformity of plasma properties, reduces particle generation in the chamber, and significantly enhances the lifetime of the process kit. A layer of polymer material covers the top surface of the process kit. The polymer material is fluorocarbon-based and not reactive with the species in the plasma. The polymer material not only protects the process kit from progressive erosion, but also prevents the generation of particles in the chamber. The polymer material has similar permittivity to that of the process kit and therefore maintains the spatial uniformity of plasma properties, e.g., etch rate, near the wafer perimeter. The thickness of the layer is controlled between 0.5 and 1.5 mm such that the difference between its coefficient of thermal expansion and that of the process kit will not cause the layer to peel off the process kit's top surface.
    • 描述了一种防止等离子体侵蚀的过程套件,保持了等离子体性质的空间均匀性,减少了腔室中的颗粒产生,并显着提高了工艺套件的使用寿命。 一层聚合物材料覆盖了工艺套件的顶面。 聚合物材料是基于碳氟化合物的,并且不与等离子体中的物质反应。 聚合物材料不仅可保护工艺套件免受逐渐侵蚀,还可防止腔室中产生颗粒。 聚合物材料具有与处理试剂盒相似的介电常数,因此在晶片周边附近保持等离子体特性(例如蚀刻速率)的空间均匀性。 将该层的厚度控制在0.5至1.5mm之间,使得其热膨胀系数与处理套件的热导率差不会导致该层从工艺套件的顶部表面剥离。
    • 9. 发明申请
    • GAS DISTRIBUTION SHOWERHEAD WITH COATING MATERIAL FOR SEMICONDUCTOR PROCESSING
    • 具有涂层材料的气体分布式淋浴器用于半导体加工
    • US20110198034A1
    • 2011-08-18
    • US13011839
    • 2011-01-21
    • Jennifer SunSenh ThachRen-Guan DuanThomas Graves
    • Jennifer SunSenh ThachRen-Guan DuanThomas Graves
    • H01L21/00C23C4/12C23C16/455C23C16/50C23F1/08
    • H01J37/3244C23C4/02C23C4/11C23C4/18
    • Described herein are exemplary methods and apparatuses for fabricating a gas distribution showerhead assembly in accordance with one embodiment. In one embodiment, a method includes providing a gas distribution plate having a first set of through-holes for delivering processing gases into a semiconductor processing chamber. The first set of through-holes is located on a backside of the plate (e.g., Aluminum substrate). The method includes spraying (e.g., plasma spraying) a coating material (e.g., Ytrria based material) onto a cleaned surface of the gas distribution plate. The method includes removing (e.g., surface grinding) a portion of the coating material from the surface to reduce a thickness of the coating material. The method includes forming (e.g., UV laser drilling, machining) a second set of through-holes in the coating material such that the through-holes are aligned with the first-set of through-holes.
    • 这里描述了根据一个实施例的用于制造气体分配喷头组件的示例性方法和装置。 在一个实施例中,一种方法包括提供具有第一组通孔的气体分配板,用于将处理气体输送到半导体处理室中。 第一组通孔位于板的背面(例如铝基板)上。 该方法包括将涂层材料(例如,基于Ytrria的材料)喷雾(例如,等离子体喷涂)到气体分配板的清洁表面上。 该方法包括从表面去除(例如,表面研磨)涂层材料的一部分以减小涂层材料的厚度。 该方法包括在涂层材料中形成(例如UV激光钻孔,加工)第二组通孔,使得通孔与第一组通孔对齐。