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1. 发明授权

US06812524B2 Field effect controlled semiconductor component 有权
标题翻译：场效应控制半导体元件
公开(公告)号：US06812524B2
公开(公告)日：2004-11-02
申请号：US10013999
申请日：2001-12-11
申请人： Dirk Ahlers , Jens-Peer Stengl , Jenoe Tihanyi , Hans Weber , Gerald Deboy , Helmut Strack , Armin Willmeroth
发明人： Dirk Ahlers , Jens-Peer Stengl , Jenoe Tihanyi , Hans Weber , Gerald Deboy , Helmut Strack , Armin Willmeroth
IPC分类号： H01L2976
CPC分类号： H01L29/7802 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/1095 , H01L29/41766 , H01L29/7816
摘要： A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.
摘要翻译：半导体部件包括形成在半导体本体中的第一和第二连接区域，围绕半导体主体中的第二连接区域的沟道区域以及形成在沟道区域和第一连接区域之间并且包含补偿区域的漂移路径。补偿区相对于漂移区具有互补导电类型并且包括至少两个段。选择两个相邻段之间的距离，使得这些段之间的穿通电压位于对应于位于额定电流和额定电流两倍之间的电流处的漂移路径上的电压降所假定的电压范围的电压范围当前。

2. 发明授权

US06667514B2 Semiconductor component with a charge compensation structure and associated fabrication 有权
标题翻译：具有电荷补偿结构和相关制造的半导体元件
公开(公告)号：US06667514B2
公开(公告)日：2003-12-23
申请号：US10190119
申请日：2002-07-03
申请人： Dirk Ahlers , Gerald Deboy , Hans Weber , Armin Willmeroth
发明人： Dirk Ahlers , Gerald Deboy , Hans Weber , Armin Willmeroth
IPC分类号： H01L2976
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/41766
摘要： A semiconductor component includes a charge compensation structure wherein locations with a maximum local field strength are positioned in a compensation edge region of the charge compensation structure. Thus, an electrical parameter such as the on resistance of the semiconductor component can be substantially improved without influencing or impairing further parameters such as the breakdown voltage and the robustness with respect to TRAPATT oscillations. Methods of fabricating a semiconductor component with a charge compensation structure are also provided.
摘要翻译：半导体部件包括电荷补偿结构，其中具有最大局部场强的位置位于电荷补偿结构的补偿边缘区域中。因此，可以显着地改善诸如半导体部件的导通电阻的电参数，而不影响或削弱诸如击穿电压和相对于TRAPATT振荡的鲁棒性的其它参数。还提供了制造具有电荷补偿结构的半导体部件的方法。

3. 发明申请

US20130193525A1 Semiconductor Arrangement with Active Drift Zone 有权
公开(公告)号：US20130193525A1
公开(公告)日：2013-08-01
申请号：US13362038
申请日：2012-01-31
申请人： Rolf Weis , Gerald Deboy , Michael Treu , Armin Willmeroth , Hans Weber
发明人： Rolf Weis , Gerald Deboy , Michael Treu , Armin Willmeroth , Hans Weber
IPC分类号： H01L27/06
CPC分类号： H01L27/0207 , H01L21/84 , H01L21/845 , H01L27/06 , H01L27/0629 , H01L27/088 , H01L27/0886 , H01L27/1211 , H01L29/4236 , H01L29/78 , H03K17/063 , H03K17/102
摘要： A semiconductor device arrangement includes a first semiconductor device having a load path and a plurality of second semiconductor devices, each having a load path between a first and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. Each of the second semiconductor devices has its control terminal connected to the load terminal of one of the other second semiconductor devices, and one of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device. Each of the second semiconductor devices has at least one device characteristic. At least one device characteristic of at least one of the second semiconductor devices is different from the corresponding device characteristic of others of the second semiconductor devices.

4. 发明授权

US06639272B2 Charge compensation semiconductor configuration 有权
公开(公告)号：US06639272B2
公开(公告)日：2003-10-28
申请号：US10113343
申请日：2002-04-01
申请人： Dirk Ahlers , Armin Willmeroth , Hans Weber
发明人： Dirk Ahlers , Armin Willmeroth , Hans Weber
IPC分类号： H01L2976
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/66712
摘要： Charge balancing is achieved in a compensation component by creating compensation regions having different thickness. In this manner, the ripple of the electric field can be chosen to have approximately the same magnitude in all of the compensation regions.

5. 发明授权

US07038272B2 Method for forming a channel zone of a transistor and NMOS transistor 失效
标题翻译：用于形成晶体管和NMOS晶体管的沟道区的方法
公开(公告)号：US07038272B2
公开(公告)日：2006-05-02
申请号：US10631350
申请日：2003-07-31
申请人： Hans Weber , Dirk Ahlers , Uwe Wahl , Jenö Tihanyi , Armin Willmeroth
发明人： Hans Weber , Dirk Ahlers , Uwe Wahl , Jenö Tihanyi , Armin Willmeroth
IPC分类号： H01L29/76
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/7395 , H01L29/7816
摘要： In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer serves as a mask substrate for the subsequent doping of the channel zone. The expedient patterning of the polysilicon layer with holes in a gate region and pillars in a source region enables the channel zone to be doped more lightly. In another embodiment, the novel method is used for a channel width shading of a PMOS transistor cell.
摘要翻译：在场效应晶体管中形成沟道区的方法中，在要形成的沟道区之上形成多晶硅层。多晶硅层用作用于随后掺杂沟道区的掩模基板。在栅极区域中具有空穴的多晶硅层的有利图案化以及源极区域中的柱状物使得能够更容易地掺杂沟道区。在另一个实施例中，新颖的方法用于PMOS晶体管单元的沟道宽度阴影。

6. 发明授权

US08866253B2 Semiconductor arrangement with active drift zone 有权
标题翻译：具有主动漂移区的半导体装置
公开(公告)号：US08866253B2
公开(公告)日：2014-10-21
申请号：US13362038
申请日：2012-01-31
申请人： Rolf Weis , Gerald Deboy , Michael Treu , Armin Willmeroth , Hans Weber
发明人： Rolf Weis , Gerald Deboy , Michael Treu , Armin Willmeroth , Hans Weber
IPC分类号： H01L27/00
CPC分类号： H01L27/0207 , H01L21/84 , H01L21/845 , H01L27/06 , H01L27/0629 , H01L27/088 , H01L27/0886 , H01L27/1211 , H01L29/4236 , H01L29/78 , H03K17/063 , H03K17/102
摘要： A semiconductor device arrangement includes a first semiconductor device having a load path and a plurality of second semiconductor devices, each having a load path between a first and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. Each of the second semiconductor devices has its control terminal connected to the load terminal of one of the other second semiconductor devices, and one of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device. Each of the second semiconductor devices has at least one device characteristic. At least one device characteristic of at least one of the second semiconductor devices is different from the corresponding device characteristic of others of the second semiconductor devices.
摘要翻译：半导体器件布置包括具有负载路径的第一半导体器件和多个第二半导体器件，每个第二半导体器件具有在第一和第二负载端子与控制端子之间的负载路径。第二半导体器件的负载路径串联连接并与第一半导体器件的负载路径串联连接。每个第二半导体器件的控制端子连接到其它第二半导体器件之一的负载端子，并且其中一个第二半导体器件的控制端子连接到第一半导体器件的负载端子之一。每个第二半导体器件具有至少一个器件特性。第二半导体器件中的至少一个的至少一个器件特征与第二半导体器件中的其它器件的相应器件特性不同。

7. 发明授权

US06831327B2 Vertically structured power semiconductor component 有权
标题翻译：垂直结构的功率半导体元件
公开(公告)号：US06831327B2
公开(公告)日：2004-12-14
申请号：US09838743
申请日：2001-04-19
申请人： Gerald Deboy , Jens-Peer Stengl , Hans Weber , Armin Willmeroth
发明人： Gerald Deboy , Jens-Peer Stengl , Hans Weber , Armin Willmeroth
IPC分类号： H01L2994
CPC分类号： H01L29/7802 , H01L29/0619 , H01L29/0634 , H01L29/0847 , H01L29/0878 , H01L29/402 , H01L29/7395 , H01L29/7811
摘要： A vertically structured semiconductor power component is described. A layer thickness of a substrate of the power module between a pn junction and a metallized back is chosen in such a manner that a space charge region produced in the semiconductor component extends as far as the back when a blocking voltage between a source and a drain electrode is applied before a field strength produced by the applied blocking voltage reaches a critical value.
摘要翻译：描述了垂直结构的半导体功率部件。选择在pn结和金属化反射层之间的功率模块的衬底的层厚度，使得当半导体组件中产生的空间电荷区域在源极和漏极之间的阻断电压在施加的阻挡电压产生的场强达到临界值之前施加电极。

8. 发明授权

US07193293B2 Semiconductor component with a compensation layer, a depletion zone, and a complementary depletion zone, circuit configuration with the semiconductor component, and method of doping the compensation layer of the semiconductor component 有权
标题翻译：具有补偿层，耗尽区和互补耗尽区的半导体元件，具有半导体元件的电路配置，以及掺杂半导体元件的补偿层的方法
公开(公告)号：US07193293B2
公开(公告)日：2007-03-20
申请号：US10141834
申请日：2002-05-09
申请人： Hans Weber , Dirk Ahlers , Gerald Deboy
发明人： Hans Weber , Dirk Ahlers , Gerald Deboy
IPC分类号： H01L29/00
CPC分类号： H01L29/7816 , H01L21/26506 , H01L29/0634 , H01L29/167 , H01L29/66712 , H01L29/7802 , H01L2924/0002 , H03K17/08142 , H01L2924/00
摘要： A semiconductor component, which functions according to the principle of charge carrier compensation, has incompletely ionized dopants that are additionally provided in a semiconductor body of the semiconductor component. When a reverse voltage is applied, the degree of compensation changes as a function of time and the breakdown voltage of the semiconductor component increases in a manner governed by the degree of compensation. The invention furthermore relates to a circuit configuration and to a method for doping a compensation layer according to the invention.
摘要翻译：根据电荷载流子补偿的原理起作用的半导体元件具有不完全电离的掺杂物，其被附加地设置在半导体元件的半导体本体中。当施加反向电压时，补偿程度随着时间的推移而变化，半导体组件的击穿电压以补偿程度为基础的增加。本发明还涉及根据本发明的电路配置和掺杂补偿层的方法。

9. 发明授权

US06630698B1 High-voltage semiconductor component 有权
标题翻译：高压半导体元件
公开(公告)号：US06630698B1
公开(公告)日：2003-10-07
申请号：US09786022
申请日：2001-11-09
申请人： Gerald Deboy , Dirk Ahlers , Helmut Strack , Michael Rueb , Hans Weber
发明人： Gerald Deboy , Dirk Ahlers , Helmut Strack , Michael Rueb , Hans Weber
IPC分类号： H01L2980
CPC分类号： H01L29/7816 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/41766 , H01L29/4232 , H01L29/4236 , H01L29/4238 , H01L29/7801 , H01L29/7802 , H01L29/7825
摘要： The invention relates to a high-voltage semiconductor component comprising semiconductor areas (4, 5) of alternating, different conductivity types which are arranged in a semiconductor body in an alternating manner. In the semiconductor body said semiconductor areas extend from at least one first zone (6) to near a second zone (1) and are variably doped so that the electric field increases progressively from one zone to the other (6, 1)
摘要翻译：本发明涉及一种高电压半导体元件，其包括以交替方式布置在半导体本体中的交替不同导电类型的半导体区域（4,5）。在半导体体中，所述半导体区域从至少一个第一区域（6）延伸到靠近第二区域（1）并且可变地掺杂，使得电场从一个区域逐渐增加到另一个区域（6,1）

10. 发明申请

US20120305993A1 TRANSISTOR WITH CONTROLLABLE COMPENSATION REGIONS 有权
标题翻译：具有可控制补偿区的晶体管
公开(公告)号：US20120305993A1
公开(公告)日：2012-12-06
申请号：US13484490
申请日：2012-05-31
申请人： Armin Willmeroth , Franz Hirler , Hans Weber , Michael Treu
发明人： Armin Willmeroth , Franz Hirler , Hans Weber , Michael Treu
IPC分类号： H01L27/088
CPC分类号： H01L29/7813 , H01L27/088 , H01L27/098 , H01L29/0634 , H01L29/407 , H01L29/41766 , H01L29/42356 , H01L29/7803 , H01L29/7831
摘要： A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.
摘要翻译：半导体器件包括栅极端子，至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件，所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件，所述负载路径与所述负载路径串联连接的MOSFET器件在负载端子之间。所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管，所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间，并且所述控制端子耦合到晶体管器件的至少一个控制端子。

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