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1. 发明授权

US09245760B2 Methods of forming epitaxial layers on a porous semiconductor layer 有权
标题翻译：在多孔半导体层上形成外延层的方法
公开(公告)号：US09245760B2
公开(公告)日：2016-01-26
申请号：US12895664
申请日：2010-09-30
申请人： Anton Mauder , Hans-Joachim Schulze , Hans-Joerg Timme , Franz Hirler , Francisco Javier Santos Rodriguez
发明人： Anton Mauder , Hans-Joachim Schulze , Hans-Joerg Timme , Franz Hirler , Francisco Javier Santos Rodriguez
IPC分类号： H01L21/20 , H01L21/306 , H01L21/02 , H01L21/78 , H01L29/78
CPC分类号： H01L29/2003 , H01L21/0237 , H01L21/02381 , H01L21/0245 , H01L21/02513 , H01L21/02521 , H01L21/02532 , H01L21/0254 , H01L21/0262 , H01L21/306 , H01L21/30621 , H01L21/3065 , H01L21/324 , H01L21/78 , H01L29/045 , H01L29/45 , H01L29/7846 , H01L29/7848
摘要： In one embodiment, a method of forming a semiconductor device includes forming a first porous semiconductor layer over a top surface of a substrate. A first epitaxial layer is formed over the first porous semiconductor layer. A circuitry is formed within and over the first epitaxial layer. The circuitry is formed without completely oxidizing the first epitaxial layer.
摘要翻译：在一个实施例中，形成半导体器件的方法包括在衬底的顶表面上形成第一多孔半导体层。在第一多孔半导体层上形成第一外延层。在第一外延层内和上方形成电路。在不完全氧化第一外延层的情况下形成电路。

2. 发明授权

US08901642B2 Charge compensation semiconductor device 有权
标题翻译：充电补偿半导体器件
公开(公告)号：US08901642B2
公开(公告)日：2014-12-02
申请号：US13414037
申请日：2012-03-07
申请人： Hans Weber , Franz Hirler
发明人： Hans Weber , Franz Hirler
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/167 , H01L29/32 , H01L29/407 , H01L29/408 , H01L29/41766 , H01L29/66727
摘要： A semiconductor device includes a semiconductor body having a first surface defining a vertical direction and a source metallization arranged on the first surface. In a vertical cross-section the semiconductor body further includes: a drift region of a first conductivity type; at least two compensation regions of a second conductivity type each of which forms a pn-junction with the drift region and is in low resistive electric connection with the source metallization; a drain region of the first conductivity type having a maximum doping concentration higher than a maximum doping concentration of the drift region, and a third semiconductor layer of the first conductivity type arranged between the drift region and the drain region and includes at least one of a floating field plate and a floating semiconductor region of the second conductivity type forming a pn-junction with the third semiconductor layer.
摘要翻译：半导体器件包括具有限定垂直方向的第一表面和布置在第一表面上的源极金属化的半导体本体。在垂直横截面中，半导体主体还包括：第一导电类型的漂移区; 至少两个第二导电类型的补偿区域，每个补偿区域与漂移区域形成pn结并与源极金属化处于低电阻电连接; 具有高于漂移区的最大掺杂浓度的最大掺杂浓度的第一导电类型的漏极区和布置在漂移区和漏极区之间的第一导电类型的第三半导体层，并且包括以下中的至少一个：浮置场板和第二导电类型的浮置半导体区域形成与第三半导体层的pn结。

3. 发明授权

US08884360B2 Semiconductor device with improved robustness 有权
标题翻译：半导体器件具有改进的鲁棒性
公开(公告)号：US08884360B2
公开(公告)日：2014-11-11
申请号：US13404161
申请日：2012-02-24
申请人： Ralf Siemieniec , Oliver Blank , Anton Mauder , Franz Hirler
发明人： Ralf Siemieniec , Oliver Blank , Anton Mauder , Franz Hirler
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0619 , H01L29/0623 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/41741 , H01L29/41766 , H01L29/66727 , H01L29/66734 , H01L29/7811
摘要： A semiconductor device includes a first contact in low Ohmic contact with a source region of the device and a first portion of a body region of the device formed in an active area of the device, and a second contact in low Ohmic contact with a second portion of the body region formed in a peripheral area of the device. The minimum width of the second contact at a first surface of the device is larger than the minimum width of the first contact at the first surface so that maximum current density during commutating the semiconductor device is reduced and thus the risk of device damage during hard commutating is also reduced.
摘要翻译：半导体器件包括与器件的源极区域的低欧姆接触的第一接触和形成在器件的有源区域中的器件的体区的第一部分，以及与第二部分的低欧姆接触的第二接触形成在装置的周边区域中的身体区域。器件第一表面处的第二触点的最小宽度大于第一表面处的第一接触的最小宽度，使得在半导体器件的整流期间的最大电流密度降低，并且因此在硬整流期间器件损坏的风险也减少了。

4. 发明授权

US08853776B2 Power transistor with controllable reverse diode 有权
标题翻译：功率晶体管具有可控反向二极管
公开(公告)号：US08853776B2
公开(公告)日：2014-10-07
申请号：US13238576
申请日：2011-09-21
申请人： Franz Hirler , Lutz Goergens , Martin Feldtkeller
发明人： Franz Hirler , Lutz Goergens , Martin Feldtkeller
IPC分类号： H01L29/772 , H01L29/739 , H01L29/78 , H01L29/06 , H01L29/40 , H01L29/417
CPC分类号： H01L29/0623 , H01L29/0696 , H01L29/407 , H01L29/41766 , H01L29/7393 , H01L29/7395 , H01L29/7396 , H01L29/7397 , H01L29/7803 , H01L29/7806 , H01L29/7813 , H01L29/7817 , H01L29/782 , H01L29/7828 , H01L29/7831 , H01L29/7832 , H01L2924/0002 , H01L2924/00
摘要： An electronic circuit includes a transistor device that can be operated in a reverse operation mode and a control circuit. The transistor device includes a source region, a drain region, a body region and a drift region, a source electrode electrically connected to the source region, a pn junction formed between the body region and the drift region, a gate electrode adjacent the body region and dielectrically insulated from the body region, and a depletion control structure adjacent the drift region. The depletion control structure has a control terminal and is configured to generate a depletion region in the drift region dependent on a drive signal received at the control terminal. The control circuit is coupled to the control terminal of the depletion control structure and configured to drive the depletion control structure to generate the depletion region when the transistor device is operated in the reverse operation mode.
摘要翻译：电子电路包括可以以反向操作模式操作的晶体管器件和控制电路。晶体管器件包括源极区域，漏极区域，体区域和漂移区域，与源极区域电连接的源极电极，在体区域和漂移区域之间形成的pn结，邻近体区域的栅电极并且与身体区域介电绝缘，以及与漂移区域相邻的耗尽控制结构。耗尽控制结构具有控制端子，并且被配置成取决于在控制端子处接收到的驱动信号而在漂移区域中产生耗尽区域。控制电路耦合到耗尽控制结构的控制端，并且被配置为当晶体管器件以反向操作模式工作时驱动耗尽控制结构以产生耗尽区。

5. 发明授权

US08829562B2 Semiconductor device including a dielectric structure in a trench 有权
标题翻译：包括在沟槽中的电介质结构的半导体器件
公开(公告)号：US08829562B2
公开(公告)日：2014-09-09
申请号：US13556335
申请日：2012-07-24
申请人： Hans-Joachim Schulze , Franz Hirler , Hans-Peter Felsl , Franz-Josef Niedernostheide
发明人： Hans-Joachim Schulze , Franz Hirler , Hans-Peter Felsl , Franz-Josef Niedernostheide
IPC分类号： H01L29/66 , H01L21/336
CPC分类号： H01L29/66 , H01L29/1095 , H01L29/407 , H01L29/408 , H01L29/42368 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/7397 , H01L29/7813
摘要： A semiconductor device includes a trench extending into a drift zone of a semiconductor body from a first surface. The semiconductor device further includes a gate electrode in the trench and a body region adjoining a sidewall of the trench. The semiconductor device further includes a dielectric structure in the trench. The dielectric structure includes a high-k dielectric in a lower part of the trench. The high-k dielectric includes a dielectric constant higher than that of SiO2. An extension of the high-k dielectric in a vertical direction perpendicular to the first surface is limited between a bottom side of the trench and a level where a bottom side of the body region adjoins the sidewall of the trench.
摘要翻译：半导体器件包括从第一表面延伸到半导体本体的漂移区的沟槽。半导体器件还包括在沟槽中的栅极电极和与沟槽的侧壁相邻的主体区域。半导体器件还包括沟槽中的电介质结构。电介质结构包括沟槽下部的高k电介质。高k电介质包括比SiO2更高的介电常数。在垂直于第一表面的垂直方向上的高k电介质的延伸在沟槽的底侧和体区的底侧与沟槽的侧壁相邻的水平之间被限制。

6. 发明授权

US08823087B2 Semiconductor device including auxiliary structure and methods for manufacturing a semiconductor device 有权
标题翻译：包括辅助结构的半导体器件和用于制造半导体器件的方法
公开(公告)号：US08823087B2
公开(公告)日：2014-09-02
申请号：US13420768
申请日：2012-03-15
申请人： Franz Hirler , Markus Zundel
发明人： Franz Hirler , Markus Zundel
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/2255 , H01L21/2257 , H01L21/26586 , H01L29/0878 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/66734
摘要： A semiconductor device includes a trench region extending into a drift zone of a semiconductor body from a surface. The semiconductor device further includes a dielectric structure including a first step and a second step along a lateral side of the trench region. The semiconductor device further includes an auxiliary structure of a first conductivity type between the first step and the second step, a gate electrode in the trench region and a body region of a second conductivity type other than the first conductivity type of the drift zone. The auxiliary structure adjoins each one of the drift zone, the body region and the dielectric structure.
摘要翻译：半导体器件包括从表面延伸到半导体本体的漂移区的沟槽区域。半导体器件还包括电介质结构，其包括沿沟槽区域的横向侧的第一步骤和第二步骤。半导体器件还包括在第一步骤和第二步骤之间的第一导电类型的辅助结构，沟槽区域中的栅极电极和除漂移区域的第一导电类型之外的第二导电类型的体区域。辅助结构邻接漂移区，体区和电介质结构中的每一个。

7. 发明授权

US08638133B2 Method and circuit for driving an electronic switch 有权
标题翻译：用于驱动电子开关的方法和电路
公开(公告)号：US08638133B2
公开(公告)日：2014-01-28
申请号：US13160809
申请日：2011-06-15
申请人： Steffen Thiele , Andreas Peter Meiser , Franz Hirler
发明人： Steffen Thiele , Andreas Peter Meiser , Franz Hirler
IPC分类号： H03K3/00
CPC分类号： H03K17/0822 , H03K17/14
摘要： Disclosed is an electronic circuit. The electronic circuit includes a transistor having a control terminal to receive a drive signal, and a load path between a first and a second load terminal. A voltage protection circuit is coupled to the transistor, has a control input, is configured to assume one of an activated state and a deactivated state as an operation state dependent on a control signal received at the control input, and is configured to limit a voltage between the load terminals or between one of the load terminals and the control terminal. A control circuit is coupled to the control input of the voltage protection circuit and is configured to deactivate the voltage protection circuit dependent on at least one operation parameter of the transistor and when a voltage across the load path or a load current through the load path is other than zero.
摘要翻译：公开了一种电子电路。电子电路包括具有用于接收驱动信号的控制端子和第一和第二负载端子之间的负载路径的晶体管。电压保护电路耦合到晶体管，具有控制输入，被配置为取决于在控制输入端接收到的控制信号而将激活状态和去激活状态中的一个作为操作状态，并且被配置为限制电压在负载端子之间或负载端子之一和控制端子之间。控制电路耦合到电压保护电路的控制输入，并且被配置为取决于晶体管的至少一个操作参数取消激活电压保护电路，并且当负载路径上的电压或通过负载路径的负载电流为除了零。

8. 发明申请

US20140001552A1 Super Junction Semiconductor Device Comprising a Cell Area and an Edge Area 有权
标题翻译：包括单元区域和边缘区域的超级结半导体器件
公开(公告)号：US20140001552A1
公开(公告)日：2014-01-02
申请号：US13539973
申请日：2012-07-02
申请人： Franz Hirler , Hans Weber , Hans-Joachim Schulze , Uwe Wahl
发明人： Franz Hirler , Hans Weber , Hans-Joachim Schulze , Uwe Wahl
IPC分类号： H01L29/772 , H01L21/20 , H01L29/02
CPC分类号： H01L29/66712 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L29/161 , H01L29/167 , H01L29/408 , H01L29/7395 , H01L29/7811 , H01L29/8611
摘要： A drift layer of a super junction semiconductor device includes first portions of a first conductivity type and second portions of a second conductivity type opposite to the first conductivity type. The first and second portions are formed both in a cell area and in an edge area surrounding the cell area, wherein an on-state or forward current through the drift layer flows through the first portions in the cell area. At least one of the first and second portions other than the first portions in the cell area includes an auxiliary structure or contains auxiliary impurities to locally reduce the avalanche rate. Locally reducing the avalanche rate increases the total voltage blocking capability of the super junction semiconductor device.
摘要翻译：超结半导体器件的漂移层包括第一导电类型的第一部分和与第一导电类型相反的第二导电类型的第二部分。第一和第二部分在单元区域和围绕单元区域的边缘区域中形成，其中通过漂移层的导通状态或正向电流流过单元区域中的第一部分。电池区域中除了第一部分之外的第一和第二部分中的至少一个包括辅助结构或包含辅助杂质以局部降低雪崩率。本地降低雪崩率提高了超结半导体器件的总电压阻断能力。

9. 发明申请

US20140001514A1 Semiconductor Device and Method for Producing a Doped Semiconductor Layer 审中-公开
标题翻译：用于制造掺杂半导体层的半导体器件和方法
公开(公告)号：US20140001514A1
公开(公告)日：2014-01-02
申请号：US13539944
申请日：2012-07-02
申请人： Hans-Joachim Schulze , Franz Hirler , Anton Mauder , Helmut Strack , Frank Kahlmann , Gerhard Miller
发明人： Hans-Joachim Schulze , Franz Hirler , Anton Mauder , Helmut Strack , Frank Kahlmann , Gerhard Miller
IPC分类号： H01L29/36 , H01L21/225
CPC分类号： H01L29/66348 , H01L21/2205 , H01L21/2658 , H01L29/0619 , H01L29/0634 , H01L29/0638 , H01L29/0878 , H01L29/102 , H01L29/1095 , H01L29/165 , H01L29/167 , H01L29/36 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/7397 , H01L29/7428 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/7816 , H01L29/861 , H01L29/872
摘要： A semiconductor device includes a device region. The device region includes at least one device region section including dopant atoms of a first doping type and with a first doping concentration of at least 1E16 cm−3 and dopant atoms of a second doping type and with a second doping concentration of at least 1E16 cm−3.
摘要翻译：半导体器件包括器件区域。器件区域包括至少一个器件区域部分，其包括第一掺杂类型的掺杂剂原子和具有至少1E16cm-3的第一掺杂浓度和第二掺杂类型的掺杂剂原子，并且具有至少1E16cm的第二掺杂浓度 -3。

10. 发明授权

US08569150B2 Method for producing a semiconductor device with a semiconductor body 有权
标题翻译：一种具有半导体本体的半导体器件的制造方法
公开(公告)号：US08569150B2
公开(公告)日：2013-10-29
申请号：US13085196
申请日：2011-04-12
申请人： Armin Willmeroth , Franz Hirler
发明人： Armin Willmeroth , Franz Hirler
IPC分类号： H01L21/20 , H01L21/38
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/41766 , H01L29/42368 , H01L29/66727 , H01L29/8083
摘要： A semiconductor device with a semiconductor body and method for its production is disclosed. The semiconductor body includes drift zones of epitaxially grown semiconductor material of a first conduction type. The semiconductor body further includes charge compensation zones of a second conduction type complementing the first conduction type, which are arranged laterally adjacent to the drift zones. The charge compensation zones are provided with a laterally limited charge compensation zone doping, which is introduced into the epitaxially grown semiconductor material. The epitaxially grown semiconductor material includes 20 to 80 atomic % of the doping material of the drift zones and a doping material balance of 80 to 20 atomic % introduced by ion implantation and diffusion.
摘要翻译：公开了一种半导体器件及其制造方法。半导体本体包括第一导电类型的外延生长的半导体材料的漂移区。半导体本体还包括与第一导电类型相互补充的第二导电类型的电荷补偿区，它们被布置成横向邻近漂移区。电荷补偿区带有横向有限的电荷补偿区掺杂，其被引入外延生长的半导体材料中。外延生长的半导体材料包括漂移区的掺杂材料的20至80原子％和通过离子注入和扩散引入的80至20原子％的掺杂材料平衡。

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