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1. 发明授权

US6096663A Method of forming a laterally-varying charge profile in silicon carbide substrate 失效
标题翻译：在碳化硅衬底中形成横向变化的电荷分布的方法
公开(公告)号：US6096663A
公开(公告)日：2000-08-01
申请号：US119282
申请日：1998-07-20
申请人： Dev Alok , Nikhil Taskar , Theodore Letavic
发明人： Dev Alok , Nikhil Taskar , Theodore Letavic
IPC分类号： H01L21/266 , C04B28/02 , H01L21/04 , H01L21/265 , H01L21/316
CPC分类号： H01L21/0465 , C04B35/565
摘要： A method of forming a laterally-varying charge profile in a silicon carbide substrate includes the steps of forming a silicon nitride layer on a polysilicon layer formed on the silicon carbide substrate, and patterning the silicon nitride layer to provide a plurality of silicon nitrite layer segments which are spaced apart in the lateral direction and which are provided with openings therebetween which are of varying widths. The polysilicon layer is oxidized using the layer segments as an oxidation mask to form a silicon dioxide layer of varying thickness from the polysilicon layer and to form a polysilicon layer portion therebeneath of varying thickness. The silicon dioxide layer and silicon nitride layer segments are removed, and a dopant is ion implanted into the silicon carbide substrate using the polysilicon layer portion of varying thickness as an implantation mask to form a laterally-varying charge profile in the silicon carbide substrate. This method provides an effective and commercially-feasible technique for forming various high-power lateral semiconductor devices, including MOSFET, JFET, diode and IGBT structures, with excellent high-temperature and high-power operating characteristics.
摘要翻译：在碳化硅衬底中形成横向变化的电荷分布的方法包括以下步骤：在形成在碳化硅衬底上的多晶硅层上形成氮化硅层，以及对氮化硅层进行构图以提供多个亚硝酸硅层段它们在横向方向上间隔开，并且在其间设有不同宽度的开口。使用层段作为氧化掩模来氧化多晶硅层，以从多晶硅层形成具有不同厚度的二氧化硅层，并形成其厚度变化的多晶硅层部分。去除二氧化硅层和氮化硅层段，并且使用不同厚度的多晶硅层部分将掺杂剂离子注入到碳化硅衬底中作为注入掩模，以在碳化硅衬底中形成横向变化的电荷分布。该方法提供了一种有效和商业上可行的技术，用于形成包括MOSFET，JFET，二极管和IGBT结构的各种高功率横向半导体器件，具有优异的高温和高功率工作特性。

2. 发明授权

US06407014B1 Method achieving higher inversion layer mobility in novel silicon carbide semiconductor devices 失效
标题翻译：在新型碳化硅半导体器件中实现更高反型层迁移率的方法
公开(公告)号：US06407014B1
公开(公告)日：2002-06-18
申请号：US09464862
申请日：1999-12-16
申请人： Dev Alok
发明人： Dev Alok
IPC分类号： H01L21302
CPC分类号： H01L29/7802 , H01L21/02532 , H01L21/02667 , H01L21/0445 , H01L21/049 , H01L21/2022 , H01L29/1608 , H01L29/66068 , Y10S438/966 , Y10S438/969
摘要： The invention provides a method for the production of high quality thermally grown oxide on top of silicon carbide. The high quality oxide is obtained by selectively removing the carbon from the silicon carbide in the areas where oxide formation is desired or required. The method includes the steps of: (a) amorphizing the silicon carbide in at least one region of a monocrystalline silicon carbide substrate by ion implantation; (b) removing at least an effective amount of the carbon resulting from amorphizing the silicon carbide with an etchant effective to selectively remove carbon from the amorphized silicon carbide to produce an amorphous silicon-rich region; and (c) forming an oxide on the etched surface to provide a device which has an oxide region on (1) either an amorphous silicon-rich region which is (i) predominantly or entirely amorphous silicon or (ii) a mixture of predominantly amorphous silicon in combination with minor amounts of amorphous silicon carbide and /or silicon dioxide or (2) a monocrystalline silicon region; wherein (1) or (2) is present on a region of a silicon carbide substrate, or (3) a region of a silicon carbide substrate.
摘要翻译：本发明提供了一种在碳化硅顶部生产高质量热生长氧化物的方法。通过在需要或需要氧化物形成的区域中选择性地除去碳化硅中的碳而获得高质量的氧化物。该方法包括以下步骤：（a）通过离子注入使单晶碳化硅衬底的至少一个区域中的碳化硅非晶化;（b）除去至少有效量的由蚀刻剂使碳化硅非晶化所产生的碳有效地从非晶化碳化硅中选择性地除去碳以产生无定形富硅区域; 和（c）在蚀刻表面上形成氧化物以提供在（1）无定形富硅区域上具有氧化物区域的器件，所述非晶硅富集区域是（i）主要或全部非晶硅，或（ii）主要为非晶态的硅与少量非晶碳化硅和/或二氧化硅组合，或（2）单晶硅区;其中（1）或（2）存在于碳化硅衬底的区域上，或（3）碳化硅衬底。

3. 发明授权

US06303508B1 Superior silicon carbide integrated circuits and method of fabricating 失效
标题翻译：卓越的碳化硅集成电路及其制造方法
公开(公告)号：US06303508B1
公开(公告)日：2001-10-16
申请号：US09464861
申请日：1999-12-16
申请人： Dev Alok
发明人： Dev Alok
IPC分类号： H01L21302
CPC分类号： H01L21/02667 , H01L21/02378 , H01L21/02532 , H01L21/0445 , H01L21/2022 , H01L21/8213 , H01L21/823807 , H01L21/8249 , H01L29/267 , H01L29/66068 , H01L29/7802
摘要： The present invention provides semiconductor devices having at least one silicon region in a silicon carbide wafer in which is fabricated a low voltage semiconductor device such as for example, MOSFET devices, BiCMOS devices, Bipolar devices, etc., and on the same chip, at least one silicon carbide region in which is fabricated a high voltage (i.e., >1000V) semiconductor device using techniques well known in the art, such as for example, LDMOSFET, UMOSFET, DMOSFET, IGBT, MESFET, and JFET devices. Such devices are derived from a method for forming a silicon region on a silicon carbide substrate which comprises the steps of: providing a monocrystalline silicon carbide substrate; amorphizing at least one region of the substrate, preferably by subjecting at least a portion of a surface of the substrate to ion implantation to convert at least a portion of the substrate surface to amorphous silicon carbide producing a region of amorphous silicon carbide on a monocrystalline silicon carbide substrate; removing at least an effective amount of carbon from said amorphized region, preferably by subjecting at least a portion of the amorphous silicon carbide region to an etchant material which selectively removes carbon to produce a region of amorphous silicon on a monocrystalline silicon carbide substrate; and subjecting the monocrystalline substrate with at least a region of amorphous silicon to high temperature thermal anneal to produce a region of monocrystalline silicon on said monocrystalline silicon carbide substrate.
摘要翻译：本发明提供了在碳化硅晶片中具有至少一个硅区域的半导体器件，其中制造了诸如MOSFET器件，BiCMOS器件，双极器件等的低电压半导体器件，并且在同一芯片上至少一个碳化硅区域，其中使用本领域公知的技术，例如LDMOSFET，UMOSFET，DMOSFET，IGBT，MESFET和JFET器件制造高电压（即> 1000V）半导体器件。这种器件源于在碳化硅衬底上形成硅区域的方法，该方法包括以下步骤：提供单晶碳化硅衬底; 优选通过使衬底的表面的至少一部分进行离子注入来将基板表面的至少一部分转化为非晶碳化硅，从而在单晶硅上产生非晶碳化硅的区域，使基底的至少一个区域非晶化碳化物基体; 从所述非晶化区域去除至少有效量的碳，优选通过使非晶碳化硅区域的至少一部分经受选择性地除去碳以在单晶碳化硅衬底上产生非晶硅区域的蚀刻剂材料; 以及使具有非晶硅的至少一个区域的所述单晶衬底经受高温热退火，以在所述单晶碳化硅衬底上产生单晶硅的区域。

4. 发明授权

US5318915A Method for forming a p-n junction in silicon carbide 失效
标题翻译：在碳化硅中形成p-n结的方法
公开(公告)号：US5318915A
公开(公告)日：1994-06-07
申请号：US8203
申请日：1993-01-25
申请人： Bantval J. Baliga , Dev Alok , Mohit Bhatnagar
发明人： Bantval J. Baliga , Dev Alok , Mohit Bhatnagar
IPC分类号： H01L21/04 , H01L21/20
CPC分类号： H01L21/046 , Y10S438/931
摘要： A method for forming a p-n junction in silicon carbide includes the steps of amorphizing a portion of a monocrystalline silicon carbide substrate, implanting dopant ions into the amorphous portion of the substrate and then recrystallizing the amorphous portion to thereby form a substantially monocrystalline region including the dopant ions. In particular, the amorphizing step includes the steps of masking an area on the face of the monocrystalline silicon carbide substrate and then directing electrically inactive ions to the masked area so that an amorphous region in the substrate is formed. Accordingly, the amorphous region has sidewalls extending to the face that are substantially orthogonal to the bottom edge of the amorphous region. Once the amorphized region is defined, electrically active dopant ions are implanted into the amorphous region. The dopant ions are then diffused into the amorphous region and become uniformly distributed. Next, the doped amorphized region is recrystallized to obtain a substantially monocrystalline doped region. If the region surrounding the recrystallized region are of opposite conductivity type, a vertically walled p-n junction is formed.
摘要翻译：用于在碳化硅中形成pn结的方法包括以下步骤：将单晶碳化硅衬底的一部分非晶化，将掺杂剂离子注入到衬底的非晶部分中，然后使非晶部分重结晶，从而形成包括掺杂剂的基本单晶区域离子。特别地，非晶化步骤包括以下步骤：掩蔽单晶碳化硅衬底的表面上的区域，然后将非活性离子引导到掩蔽区域，从而形成衬底中的非晶区域。因此，非晶区域具有延伸到基本上正交于非晶区域的底部边缘的面的侧壁。一旦定义了非晶化区域，则将电活性掺杂剂离子注入非晶区域。然后掺杂剂离子扩散到非晶区域并变得均匀分布。接下来，掺杂的非晶化区域被重结晶以获得基本单晶掺杂区域。如果再结晶区域周围的区域具有相反的导电型，则形成垂直壁的p-n结。

5. 发明授权

US06559068B2 Method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor 有权
标题翻译：一种提高碳化硅金属氧化物半导体场效应晶体管的反层迁移率的方法
公开(公告)号：US06559068B2
公开(公告)日：2003-05-06
申请号：US09894089
申请日：2001-06-28
申请人： Dev Alok , Emil Arnold , Richard Egloff , Satyendranath Mukherjee
发明人： Dev Alok , Emil Arnold , Richard Egloff , Satyendranath Mukherjee
IPC分类号： H01L21469
CPC分类号： H01L21/049
摘要： A method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor (MOSFET) is provided. Specifically, the present invention provides a method for applying an oxide layer to a silicon carbide substrate so that the oxide-substrate interface of the resulting SiC MOSFET is improved. The method includes forming the oxide layer in the presence of metallic impurities.
摘要翻译：提供了一种用于提高碳化硅金属氧化物半导体场效应晶体管（MOSFET）中的反型层迁移率的方法。具体地，本发明提供了一种将氧化物层施加到碳化硅衬底上，使得所得SiC MOSFET的氧化物 - 衬底界面得到改善的方法。该方法包括在金属杂质存在下形成氧化物层。

6. 发明授权

US06373076B1 Passivated silicon carbide devices with low leakage current and method of fabricating 失效
标题翻译：具有低漏电流的钝化碳化硅器件及其制造方法
公开(公告)号：US06373076B1
公开(公告)日：2002-04-16
申请号：US09455663
申请日：1999-12-07
申请人： Dev Alok , Emil Arnold
发明人： Dev Alok , Emil Arnold
IPC分类号： H01L310256
CPC分类号： H01L29/6606 , H01L21/0445 , H01L21/045 , H01L21/0495 , H01L29/1608 , H01L29/872 , Y10S438/931
摘要： Semiconductor power devices with improved electrical characteristics are disclosed including rectifying contacts on a specially prepared semiconductor surface with little or no additional exposure to other chemical treatments, with oxide passivation and edge termination at a face of the semiconductor substrate adjacent to and surrounding the power device. The edge termination region is preferably formed by implanting electrically inactive ions, such as argon, into the substrate face at sufficient energy and dose to amorphize a portion of the substrate face and preferably self-aligned to the device. The passivated, edge-terminated devices exhibit improved characteristics relative to passivated devices with characteristics approaching those of the native semiconductor with the additional advantages of passivation protection. Methods for making and using the devices are also disclosed.
摘要翻译：公开了具有改善的电特性的半导体功率器件，其包括在特别制备的半导体表面上的整流触点，其中少量或不附加暴露于其它化学处理，其中氧化物钝化和边缘终端位于邻近并围绕功率器件的半导体衬底的表面。优选地，边缘终止区域通过以足够的能量和剂量将电惰性离子（例如氩）注入衬底面而形成，以使衬底面的一部分非晶化，并且优选地与器件自对准。钝化的边缘终端器件相对于具有接近本地半导体的特性的钝化器件具有改进的特性，具有钝化保护的附加优点。还公开了制造和使用装置的方法。

7. 发明授权

US5449925A Voltage breakdown resistant monocrystalline silicon carbide semiconductor devices 失效
标题翻译：耐压击穿单晶碳化硅半导体器件
公开(公告)号：US5449925A
公开(公告)日：1995-09-12
申请号：US238228
申请日：1994-05-04
申请人： Bantval J. Baliga , Dev Alok
发明人： Bantval J. Baliga , Dev Alok
IPC分类号： H01L21/04 , H01L21/265 , H01L21/329 , H01L29/06 , H01L29/24 , H01L29/47 , H01L29/861 , H01L29/872 , H01L29/417 , H01L29/43
CPC分类号： H01L29/1608 , H01L29/6606 , H01L29/861 , H01L29/872 , Y10S438/931
摘要： Voltage breakdown resistant monocrystalline silicon carbide semiconductor devices are obtained by forming an amorphous silicon carbide termination region in a monocrystalline silicon carbide substrate, at a face thereof, adjacent and surrounding a silicon carbide device. The amorphous termination region is preferably formed by implanting electrically inactive ions, such as argon, into the substrate face at sufficient energy and dose to amorphize the substrate face. The device contact or contacts act as an implantation mask to provide a self-aligned termination region for the device. The terminated devices may exhibit voltage breakdown resistance which approaches the ideal value for silicon carbide.
摘要翻译：耐压击穿的单晶碳化硅半导体器件通过在单晶碳化硅衬底的表面上形成与碳化硅器件相邻并围绕的非晶碳化硅终止区来获得。优选通过以足够的能量和剂量将电惰性离子（例如氩）注入到衬底面中来形成无定形终止区域以使衬底面非晶化。器件触点或触点用作注入掩模，以为器件提供自对准的端接区域。端接器件可能具有接近碳化硅理想值的耐电压击穿电阻。

8. 发明授权

US5436174A Method of forming trenches in monocrystalline silicon carbide 失效
标题翻译：在单晶碳化硅中形成沟槽的方法
公开(公告)号：US5436174A
公开(公告)日：1995-07-25
申请号：US008719
申请日：1993-01-25
申请人： Bantval J. Baliga , Dev Alok
发明人： Bantval J. Baliga , Dev Alok
IPC分类号： H01L21/04 , H01L21/76 , H01L21/266
CPC分类号： H01L21/7602 , H01L21/0475 , Y10S148/148 , Y10S438/924 , Y10S438/931
摘要： A trench is formed in a monocrystalline silicon carbide substrate by amorphizing a portion of the monocrystalline silicon carbide substrate to define an amorphous silicon carbide region therein. The amorphous silicon carbide region is then removed, to produce a trench in the monocrystalline silicon carbide substrate corresponding to the removed amorphous silicon carbide region. The substrate may be amorphized by implanting ions into a masked substrate so that the implanted ions convert the unmasked portions of the substrate into amorphous silicon carbide. The amorphous silicon carbide may be etched using at least one etchant which etches amorphous silicon carbide relatively quickly and etches monocrystalline silicon carbide relatively slowly, such as hydrofluoric acid and nitric acid. The amorphizing and removing steps may be repeatedly performed to form deep trenches.
摘要翻译：通过将单晶碳化硅衬底的一部分非晶化以在其中限定非晶碳化硅区域，在单晶碳化硅衬底中形成沟槽。然后去除非晶碳化硅区域，以在对应于去除的非晶碳化硅区域的单晶碳化硅衬底中产生沟槽。衬底可以通过将离子注入到掩模衬底中而非晶化，使得注入的离子将衬底的未掩模部分转化为非晶碳化硅。可以使用至少一种相当快地蚀刻非晶碳化硅的蚀刻剂来蚀刻非晶碳化硅，并相对缓慢地蚀刻单晶碳化硅，例如氢氟酸和硝酸。可以重复进行非晶化和去除步骤以形成深沟槽。

9. 发明授权

US06620697B1 Silicon carbide lateral metal-oxide semiconductor field-effect transistor having a self-aligned drift region and method for forming the same 失效
标题翻译：具有自对准漂移区域的碳化硅横向金属氧化物半导体场效应晶体管及其形成方法
公开(公告)号：US06620697B1
公开(公告)日：2003-09-16
申请号：US09961982
申请日：2001-09-24
申请人： Dev Alok , Rik Jos
发明人： Dev Alok , Rik Jos
IPC分类号： H01L21336
CPC分类号： H01L29/1608 , H01L29/66068 , H01L29/7835 , Y10S438/931
摘要： A silicon carbide lateral metal-oxide-semiconductor field-effect transistor (SiC LMOSFET) having a self-aligned drift region and method for forming the same is provided. Specifically, the SiC LMOSFET includes a source region, a drift region and a drain region. The source and drain regions are implanted using non self-aligned technology (i.e., prior to formation of the gate electrode and the gate oxide layer), while the drift region is implanted using self-aligned technology (i.e., after formation of the gate electrode and the gate oxide layer). By self-aligning the drift region to the gate electrode, the overlap between the two is minimized, which reduces the capacitance of the device. When capacitance is reduced, performance is improved.
摘要翻译：提供了具有自对准漂移区域的碳化硅横向金属氧化物半导体场效应晶体管（SiC LMOSFET）及其形成方法。具体地，SiC LMOSFET包括源极区，漂移区和漏极区。使用非自对准技术（即，在形成栅极和栅极氧化物层之前）注入源极和漏极区域，而使用自对准技术（即，在形成栅极电极之后）和栅极氧化物层）。通过将漂移区域自对准到栅电极，两者之间的重叠被最小化，这降低了器件的电容。当电容降低时，性能得到改善。

10. 发明授权

US06504184B2 Superior silicon carbide integrated circuits and method of fabricating 失效
标题翻译：卓越的碳化硅集成电路及其制造方法
公开(公告)号：US06504184B2
公开(公告)日：2003-01-07
申请号：US09952196
申请日：2001-09-14
申请人： Dev Alok
发明人： Dev Alok
IPC分类号： H01L2900
CPC分类号： H01L21/02667 , H01L21/02378 , H01L21/02532 , H01L21/0445 , H01L21/2022 , H01L21/8213 , H01L21/823807 , H01L21/8249 , H01L29/267 , H01L29/66068 , H01L29/7802
摘要： The present invention provides semiconductor devices having at least one silicon region in a silicon carbide wafer in which is fabricated a low voltage semiconductor device such as for example, MOSFET devices, BiCMOS devices, Bipolar devices, etc., and on the same chip, at least one silicon carbide region in which is fabricated a high voltage (i.e., >1000V) semiconductor device using techniques well known in the art, such as for example, LDMOSFET, UMOSFET, DMOSFET, IGBT, MESFET, and JFET devices. Such devices are derived from a method for forming a silicon region on a silicon carbide substrate which comprises the steps of: providing a monocrystalline silicon carbide substrate; amorphizing at least one region of the substrate, preferably by subjecting at least a portion of a surface of the substrate to ion implantation to convert at least a portion of the substrate surface to amorphous silicon carbide producing a region of amorphous silicon carbide on a monocrystalline silicon carbide substrate; removing at least an effective amount of carbon from said amorphized region, preferably by subjecting at least a portion of the amorphous silicon carbide region to an etchant material which selectively removes carbon to produce a region of amorphous silicon on a monocrystalline silicon carbide substrate; and subjecting the monocrystalline substrate with at least a region of amorphous silicon to high temperature thermal anneal to produce a region of monocrystalline silicon on said monocrystalline silicon carbide substrate.
摘要翻译：本发明提供了在碳化硅晶片中具有至少一个硅区域的半导体器件，其中制造了诸如MOSFET器件，BiCMOS器件，双极器件等的低电压半导体器件，并且在同一芯片上至少一个碳化硅区域，其中使用本领域公知的技术，例如LDMOSFET，UMOSFET，DMOSFET，IGBT，MESFET和JFET器件制造高电压（即> 1000V）半导体器件。这样的器件来源于在碳化硅衬底上形成硅区域的方法，该方法包括以下步骤：提供单晶碳化硅衬底;将基底的至少一个区域非晶化，优选通过使至少一部分表面的所述衬底到离子注入以将所述衬底表面的至少一部分转化为非晶碳化硅，在单晶碳化硅衬底上产生非晶碳化硅区域;从所述非晶化区域去除至少有效量的碳，优选通过使至少一部分非晶碳化硅区域到蚀刻剂材料，其选择性地去除碳以在单晶碳化硅衬底上产生非晶硅区域; 并且将具有至少一个非晶硅区域的单晶衬底施加到高温热退火以在所述单晶碳化硅衬底上产生单晶硅的区域。

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