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1. 发明授权

US07485916B2 Dynamic control of capacitance elements in field effect structures 有权
标题翻译：场效应结构中电容元件的动态控制
公开(公告)号：US07485916B2
公开(公告)日：2009-02-03
申请号：US10572924
申请日：2004-09-21
申请人： John Petruzzello , Theodore Letavic , Benoit Dufort
发明人： John Petruzzello , Theodore Letavic , Benoit Dufort
IPC分类号： H01L29/94
CPC分类号： H01L29/404 , B06B1/0292 , H01L28/82 , H01L29/402 , H01L29/7817 , H01L29/7824
摘要： A field effect device includes at least one segmented field plate, each of the at least one segmented field plates having a plurality of segments that each form a plate of a capacitor, wherein the field effect device is connected to an electronic element that dynamically connects selected segments to selectively set a gate-to-drain and a drain-to-source capacitance. An ultrasonic device includes a transducer coupled to a switching device that switches the transducer between a transmit mode and a receive mode switching device, wherein the switching device includes the field effect device.
摘要翻译：场效应装置包括至少一个分段场板，所述至少一个分段场板中的每一个具有多个段，每个段形成电容器的板，其中所述场效应器件连接到电子元件，所述电子元件动态地连接所选择的以选择性地设置栅极到漏极和漏极到源极的电容。超声波装置包括耦合到切换装置的换能器，其在发射模式和接收模式切换装置之间切换换能器，其中切换装置包括场效应装置。

2. 发明申请

US20080272428A1 Semiconductor Device Structure With a Tapered Field Plate and Cylindrical Drift Region Geometry 有权
标题翻译：具有锥形场板和圆柱漂移区几何的半导体器件结构
公开(公告)号：US20080272428A1
公开(公告)日：2008-11-06
申请号：US11815861
申请日：2006-02-07
申请人： Theodore Letavic , John Petruzzello
发明人： Theodore Letavic , John Petruzzello
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/407 , H01L29/42368 , H01L29/7397
摘要： A vertically oriented self terminating discrete trench MOS device (1) that includes a cylindrical drift region (18) that extend downward from a surface region to a substrate (11) and a dielectric region (20) that exponentially tapers outward from the cylindrical drift region as the drift region approaches the substrate.
摘要翻译：一种垂直定向的自终端离散沟槽MOS器件（1），其包括从表面区域向下延伸到衬底（11）的圆柱形漂移区域（18）和从所述圆柱形漂移区域向外指数地渐缩的电介质区域随着漂移区域接近衬底。

3. 发明申请

US20050085023A1 Dual gate oxide high-voltage semiconductor device and method for forming the same 有权
标题翻译：双栅氧化物高压半导体器件及其形成方法
公开(公告)号：US20050085023A1
公开(公告)日：2005-04-21
申请号：US11003991
申请日：2004-12-03
申请人： Theodore Letavic , Mark Simpson
发明人： Theodore Letavic , Mark Simpson
IPC分类号： H01L29/786 , H01L21/28 , H01L29/423 , H01L29/78 , H01L21/84
CPC分类号： H01L29/7824 , H01L21/28247 , H01L29/42368
摘要： A dual gate oxide high-voltage semiconductor device and method for forming the same are provided. Specifically, a device formed according to the present invention includes a semiconductor substrate, a buried oxide layer formed over the substrate, a silicon layer formed over the buried oxide layer, and a top oxide layer formed over the silicon layer. Adjacent an edge of the top oxide layer, a dual gate oxide is formed. The dual gate oxide allows both specific-on-resistance and breakdown voltage of the device to be optimized.
摘要翻译：提供一种双栅极氧化物高压半导体器件及其制造方法。具体地，根据本发明形成的器件包括半导体衬底，在衬底上形成的掩埋氧化物层，形成在掩埋氧化物层上的硅层和形成在硅层上的顶部氧化物层。邻近顶部氧化物层的边缘，形成双栅氧化物。双栅氧化物允许优化器件的导通电阻和击穿电压。

4. 发明授权

US06346451B1 Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode 有权
标题翻译：具有栅电极和场板电极的材料薄膜绝缘体上硅（SOI）器件
公开(公告)号：US06346451B1
公开(公告)日：2002-02-12
申请号：US09343912
申请日：1999-06-30
申请人： Mark Simpson , Theodore Letavic
发明人： Mark Simpson , Theodore Letavic
IPC分类号： H01L21331
CPC分类号： H01L29/66681 , H01L21/266 , H01L29/0653 , H01L29/0847 , H01L29/402 , H01L29/404 , H01L29/42368 , H01L29/66674 , H01L29/66772 , H01L29/7813 , H01L29/7824 , H01L29/78624
摘要： A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region, and a drain region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by an insulation region. In order to provide improved breakdown voltage characteristics, a dielectric layer is provided over at least a part of the insulation region and the gate electrode, and a field plate electrode is provided over at least a part of the dielectric layer which is in direct contact with the insulation region, with the field plate electrode being connected to an electrode of the lateral transistor device.
摘要翻译：横向薄膜绝缘体上硅（SOI）器件包括半导体衬底，衬底上的掩埋绝缘层和掩埋绝缘层上的SOI层中的横向晶体管器件，并具有第一导电类型的源极区形成在与第一导电类型相反的第二导电类型的体区中。第一导电类型的横向漂移区域设置在身体区域附近，并且第一导电类型的漏极区域通过漂移区域与身体区域横向间隔设置。栅极电极设置在主体区域的一部分上，在该区域中，在操作期间形成沟道区域并且延伸超过与身体区域相邻的横向漂移区域的一部分，栅电极至少与身体区域基本绝缘，漂移区域由绝缘区域。为了提供改进的击穿电压特性，在绝缘区域和栅极电极的至少一部分上提供电介质层，并且在电介质层的至少一部分上设置场板电极，该电介质层直接与绝缘区域，其中场板电极连接到横向晶体管器件的电极。

5. 发明授权

US06313489B1 Lateral thin-film silicon-on-insulator (SOI) device having a lateral drift region with a retrograde doping profile, and method of making such a device 有权
标题翻译：具有具有逆向掺杂分布的横向漂移区域的横向薄膜绝缘体上硅（SOI）器件，以及制造这种器件的方法
公开(公告)号：US06313489B1
公开(公告)日：2001-11-06
申请号：US09440767
申请日：1999-11-16
申请人： Theodore Letavic , Mark Simpson , Richard Egloff , Andrew Mark Warwick
发明人： Theodore Letavic , Mark Simpson , Richard Egloff , Andrew Mark Warwick
IPC分类号： H01L3300
CPC分类号： H01L29/66681 , H01L29/0847 , H01L29/402 , H01L29/42368 , H01L29/66674 , H01L29/7824
摘要： A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region and forms a lightly-doped drain region, and a drain contact region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by a surface insulation region. In order to increase breakdown voltage and/or reduce “on” resistance, the lateral drift region is provided with at least a portion with a retrograde doping profile. This may advantageously be done by doping the semiconductor substrate, oxidizing the substrate to form the buried insulating layer, forming the SOI layer on the buried insulating layer, and thermally diffusing dopant from the buried insulating layer into the SOI layer.
摘要翻译：横向薄膜绝缘体上硅（SOI）器件包括半导体衬底，衬底上的掩埋绝缘层和掩埋绝缘层上的SOI层中的横向晶体管器件，并具有第一导电类型的源极区形成在与第一导电类型相反的第二导电类型的体区中。第一导电类型的横向漂移区域设置在身体区域附近并形成轻掺杂漏极区域，并且第一导电类型的漏极接触区域通过漂移区域与身体区域横向间隔开地设置。栅极电极设置在身体区域的一部分上，其中在操作期间形成沟道区，并且在与身体区域相邻的横向漂移区域的一部分上延伸，栅电极至少与身体区域基本绝缘，漂移区域由表面绝缘区域。为了增加击穿电压和/或降低“导通”电阻，横向漂移区域设置有具有逆向掺杂分布的至少一部分。这可以有利地通过掺杂半导体衬底，氧化衬底以形成掩埋绝缘层，在掩埋绝缘层上形成SOI层，并将掺杂剂从掩埋绝缘层热扩散到SOI层中。

6. 发明授权

US06191453B1 Lateral insulated-gate bipolar transistor (LIGBT) device in silicon-on-insulator (SOI) technology 有权
标题翻译：绝缘体上硅（SOI）技术中的侧绝缘栅双极晶体管（LIGBT）器件
公开(公告)号：US06191453B1
公开(公告)日：2001-02-20
申请号：US09459628
申请日：1999-12-13
申请人： John Petruzzello , Theodore Letavic , J. Van Zwol
发明人： John Petruzzello , Theodore Letavic , J. Van Zwol
IPC分类号： H01L2976
CPC分类号： H01L29/7394 , H01L29/0696 , H01L29/42368
摘要： A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a Lateral Insulated Gate Bipolar Transistor (LIGBT) device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first and a body contact region of the second conductivity type in the body region and connected to the source region. A lateral drift region of a first conductivity type is provided adjacent the body region and forms a lightly-doped drain region, and a drain contact region of the first conductivity type is provided laterally spaced apart from the body region by the drift region with an anode region of the second conductivity type in the drain region and connected to the drain contact region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by a surface insulation region. Improved device performance is achieved by making a dimension of the source region in a direction normal to a direction of current flow between the source region and the drain contact region greater than a corresponding dimension of the drain contact region and of the anode region.
摘要翻译：横向薄膜绝缘体上硅（SOI）器件包括半导体衬底，衬底上的掩埋绝缘层和掩埋绝缘层上的SOI层中的侧绝缘栅双极晶体管（LIGBT）器件，并具有源极第一导电类型的区域形成在体区中与第二导电类型的第一导电类型的本体区域相反的第二导电类型的本体区域中并且连接到源极区域。第一导电类型的横向漂移区域设置在身体区域附近，并形成轻掺杂的漏极区域，并且第一导电类型的漏极接触区域通过漂移区域与体区域横向间隔开，阳极通过阳极区域，并且连接到漏极接触区域。栅极电极设置在主体区域的一部分上，在该区域中，在操作期间形成沟道区域并且延伸超过与身体区域相邻的横向漂移区域的一部分，栅电极至少与身体区域基本绝缘，漂移区域由表面绝缘区域。通过使源区域的尺寸沿垂直于源极区域和漏极接触区域之间的电流方向的方向大于漏极接触区域和阳极区域的对应尺寸来实现，从而实现改进的器件性能。

7. 发明授权

US6133591A Silicon-on-insulator (SOI) hybrid transistor device structure 失效
标题翻译：绝缘体上硅（SOI）混合晶体管器件结构
公开(公告)号：US6133591A
公开(公告)日：2000-10-17
申请号：US122407
申请日：1998-07-24
申请人： Theodore Letavic , Satyen Mukherjee , Arno Emmerik , J. Van Zwol
发明人： Theodore Letavic , Satyen Mukherjee , Arno Emmerik , J. Van Zwol
IPC分类号： H01L27/08 , H01L29/06 , H01L29/08 , H01L29/739 , H01L29/78 , H01L29/786 , H01L33/00 , H01L29/74 , H01L31/111
CPC分类号： H01L29/7394 , H01L29/0696 , H01L29/0834
摘要： A silicon-on-insulator (SOI) hybrid transistor device structure includes a substrate, a buried insulating layer on the substrate, and a hybrid transistor device structure formed in a semiconductor surface layer on the buried insulating layer. The hybrid transistor device structure may advantageously include at least one MOS transistor structure and at least one conductivity modulation transistor structure electrically connected in parallel. In a particularly advantageous configuration, the MOS transistor structure may be an LDMOS transistor structure and the conductivity modulation transistor structure may be an LIGB transistor structure, with the hybrid transistor device being formed in a closed geometry configuration. This closed geometry configuration may have both substantially curved segments and substantially straight segments, with MOS structures being formed in the curved segments and conductivity modulation transistor structures being formed in the straight segments. Hybrid transistor device structures in accordance with the invention feature excellent operating characteristics in high current, high voltage circuit applications, and in particular in source-follower circuit applications.
摘要翻译：绝缘体上硅（SOI）混合晶体管器件结构包括衬底，衬底上的掩埋绝缘层以及形成在掩埋绝缘层上的半导体表面层中的混合晶体管器件结构。混合晶体管器件结构可以有利地包括至少一个MOS晶体管结构和并联电连接的至少一个导电调制晶体管结构。在特别有利的配置中，MOS晶体管结构可以是LDMOS晶体管结构，并且导电调制晶体管结构可以是LIGB晶体管结构，其中混合晶体管器件形成为封闭的几何结构。这种闭合的几何构型可以具有基本上弯曲的段和基本上直的段，其中MOS结构形成在弯曲段中，并且导电调制晶体管结构形成在直段中。根据本发明的混合晶体管器件结构在高电流，高压电路应用中尤其是源极跟随器电路应用中具有优异的工作特性。

8. 发明授权

US07989881B2 Semiconductor device structure with a tapered field plate and cylindrical drift region geometry 有权
标题翻译：具有锥形场板和圆柱漂移区几何形状的半导体器件结构
公开(公告)号：US07989881B2
公开(公告)日：2011-08-02
申请号：US11815861
申请日：2006-02-07
申请人： Theodore Letavic , John Petruzzello
发明人： Theodore Letavic , John Petruzzello
IPC分类号： H01L29/66
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/407 , H01L29/42368 , H01L29/7397
摘要： A vertically oriented self terminating semiconductor device such as a discrete trench MOS device (10, 38) that includes a cylindrical drift region (18) that extend downward from a surface region to a substrate (11) and a dielectric region (20) that exponentially tapers outward from the cylindrical drift region as the drift region approaches the substrate. A field plate electrode (12) is disposed on the dielectric region. Alternatively, the gate electrode (40, 46) may be disposed on the dielectric region, optionally with an underlying field plate electrode (48).
摘要翻译：垂直定向的自终端半导体器件，例如分立沟槽MOS器件（10,38），其包括从表面区域向下延伸到衬底（11）的圆柱形漂移区域（18），以及电介质区域（20）随着漂移区域接近基板，圆柱形漂移区域向外逐渐变细。场电极（12）设置在电介质区域上。或者，栅电极（40,46）可以设置在电介质区域上，可选地具有下面的场板电极（48）。

9. 发明申请

US20070114608A1 Lateral thin-film soi device having a field plate with isolated metallic regions 有权
标题翻译：具有带隔离金属区域的场板的横向薄膜设备
公开(公告)号：US20070114608A1
公开(公告)日：2007-05-24
申请号：US10574065
申请日：2004-09-27
申请人： Theodore Letavic
发明人： Theodore Letavic
IPC分类号： H01L27/12
CPC分类号： H01L29/78624 , H01L29/404 , H01L29/405 , H01L29/41733 , H01L29/7835
摘要： In a lateral thin-film Silicon-On-Insulator (SOI) device, a field plate is provided to extend substantially over a lateral drift region to protect the device from package and surface charge effects. In particular, the field plate comprises a layer of plural metallic regions which are isolated laterally from one another by spacing so as to assume a lateral electric field profile which is established by a volume doping gradient in the silicon drift region.
摘要翻译：在横向薄膜绝缘体上硅（SOI）器件中，提供场板基本上在横向漂移区域上延伸以保护器件免受封装和表面电荷的影响。特别地，场板包括多个金属区域的层，它们通过间隔彼此侧向隔离，以便呈现通过硅漂移区域中的体积掺杂梯度建立的横向电场分布。

10. 发明申请

US20060163654A1 Silicon-on-insulator device 有权
标题翻译：绝缘体上硅器件
公开(公告)号：US20060163654A1
公开(公告)日：2006-07-27
申请号：US10560067
申请日：2004-06-08
申请人： Theodore Letavic , John Petruzzello
发明人： Theodore Letavic , John Petruzzello
IPC分类号： H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L29/7824 , H01L27/1203 , H01L29/0615 , H01L29/063 , H01L29/1095
摘要： A Silicon on Insulator (SOI) device is disclosed wherein an extension of P-type doping (303) is implanted between the buried oxide layer of the device and the SOI layer. The extension is of a size and shape to permit the source (309) to be biased at a voltage significantly less than the handler wafer (304) and drain, a condition under which prior art SOI devices may not properly operate.
摘要翻译：公开了一种绝缘体上硅（SOI）器件，其中P型掺杂（303）的扩展被注入在器件的掩埋氧化物层和SOI层之间。延伸部具有尺寸和形状，以允许源极（309）以比处理器晶片（304）显着更小的电压偏置和漏极，这是现有技术的SOI器件可能无法正常工作的状态。

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