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1. 发明授权

US08557624B2 Pixel sensor cells with a split-dielectric transfer gate 失效
标题翻译：具有分离电介质传输门的像素传感器单元
公开(公告)号：US08557624B2
公开(公告)日：2013-10-15
申请号：US13005650
申请日：2011-01-13
申请人： Brent A. Anderson , Andres Bryant , William F. Clark, Jr. , John Joseph Ellis-Monaghan , Edward J. Nowak
发明人： Brent A. Anderson , Andres Bryant , William F. Clark, Jr. , John Joseph Ellis-Monaghan , Edward J. Nowak
IPC分类号： H01L21/00 , H01L31/113 , G06F17/50 , H01L31/18
CPC分类号： H01L27/14614 , H01L27/14689
摘要： Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. A transistor in the pixel sensor cell has a gate structure that includes a gate dielectric with a thick region and a thin region. A gate electrode of the gate structure is formed on the thick region of the gate dielectric and the thin region of the gate dielectric. The thick region of the gate dielectric and the thin region of the gate dielectric provide the transistor with an asymmetric threshold voltage.
摘要翻译：像素传感器单元，制造像素传感器单元的方法以及像素传感器单元的设计结构。像素传感器单元中的晶体管具有包括具有厚区域和薄区域的栅极电介质的栅极结构。栅极结构的栅电极形成在栅极电介质的厚区域和栅极电介质的薄区域上。栅极电介质的厚区域和栅极电介质的薄区为晶体管提供非对称阈值电压。

2. 发明授权

US08299505B2 Pixel sensor cell with a dual work function gate electode 有权
标题翻译：具有双功能门电极的像素传感器单元
公开(公告)号：US08299505B2
公开(公告)日：2012-10-30
申请号：US13029670
申请日：2011-02-17
申请人： Brent A. Anderson , Andres Bryant , William F. Clark, Jr. , John Joseph Ellis-Monaghan , Edward J. Nowak
发明人： Brent A. Anderson , Andres Bryant , William F. Clark, Jr. , John Joseph Ellis-Monaghan , Edward J. Nowak
IPC分类号： H01L27/148
CPC分类号： H01L27/14614
摘要： Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. The pixel sensor cell has a gate structure that includes a gate dielectric and a gate electrode on the gate dielectric. The gate electrode includes a layer with first and second sections that have a juxtaposed relationship on the gate dielectric. The second section of the gate electrode is comprised of a conductor, such as doped polysilicon or a metal. The first section of the gate electrode is comprised of a metal having a higher work function than the conductor comprising the second section so that the gate structure has an asymmetric threshold voltage.
摘要翻译：像素传感器单元，制造像素传感器单元的方法以及像素传感器单元的设计结构。像素传感器单元具有在栅极电介质上包括栅极电介质和栅电极的栅极结构。栅极电极包括具有在栅极电介质上具有并置关系的第一和第二部分的层。栅电极的第二部分由诸如掺杂多晶硅或金属的导体组成。栅电极的第一部分由具有比包括第二部分的导体更高的功函的金属组成，使得栅极结构具有非对称阈值电压。

3. 发明授权

US08580601B2 Pixel sensor cell with a dual work function gate electrode 有权
标题翻译：具有双功能栅极电极的像素传感器单元
公开(公告)号：US08580601B2
公开(公告)日：2013-11-12
申请号：US13571986
申请日：2012-08-10
申请人： Brent A. Anderson , Andres Bryant , William F. Clark, Jr. , John Joseph Ellis-Monaghan , Edward J. Nowak
发明人： Brent A. Anderson , Andres Bryant , William F. Clark, Jr. , John Joseph Ellis-Monaghan , Edward J. Nowak
IPC分类号： H01L21/00
CPC分类号： H01L27/14614
摘要： Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. The pixel sensor cell has a gate structure that includes a gate dielectric and a gate electrode on the gate dielectric. The gate electrode includes a layer with first and second sections that have a juxtaposed relationship on the gate dielectric. The second section of the gate electrode is comprised of a conductor, such as doped polysilicon or a metal. The first section of the gate electrode is comprised of a metal having a higher work function than the conductor comprising the second section so that the gate structure has an asymmetric threshold voltage.
摘要翻译：像素传感器单元，制造像素传感器单元的方法以及像素传感器单元的设计结构。像素传感器单元具有在栅极电介质上包括栅极电介质和栅电极的栅极结构。栅极电极包括具有在栅极电介质上具有并置关系的第一和第二部分的层。栅电极的第二部分由诸如掺杂多晶硅或金属的导体组成。栅电极的第一部分由具有比包括第二部分的导体更高的功函的金属组成，使得栅极结构具有非对称阈值电压。

4. 发明授权

US07521280B1 Method for forming an optical image sensor with an integrated metal-gate reflector 失效
标题翻译：用集成金属门反射器形成光学图像传感器的方法
公开(公告)号：US07521280B1
公开(公告)日：2009-04-21
申请号：US12184125
申请日：2008-07-31
申请人： Brent Alan Anderson , John Joseph Ellis-Monaghan , Edward J. Nowak
发明人： Brent Alan Anderson , John Joseph Ellis-Monaghan , Edward J. Nowak
IPC分类号： H01L21/00
CPC分类号： H01L27/14689 , H01L27/14625 , H01L27/14632
摘要： A method according to one embodiment includes forming a photosensitive region on an substrate; forming at least one dielectric layer upon the photosensitive region; simultaneously forming and patterning a metal layer upon the photosensitive region; wherein a first portion of the metal layer is formed upon the photosensitive region and serves as an optical reflector; wherein a second portion of the metal layer is formed in a transfer gate region and serves as a metal gate electrode for a transfer gate transistor.
摘要翻译：根据一个实施例的方法包括在基底上形成感光区域; 在所述光敏区域上形成至少一个电介质层; 同时在感光区域上形成和图案化金属层; 其中所述金属层的第一部分形成在所述光敏区域上并且用作光学反射器; 其中所述金属层的第二部分形成在转移栅极区中并且用作转移栅极晶体管的金属栅电极。

5. 发明授权

US06605981B2 Apparatus for biasing ultra-low voltage logic circuits 有权
公开(公告)号：US06605981B2
公开(公告)日：2003-08-12
申请号：US09842544
申请日：2001-04-26
申请人： Andres Bryant , Peter Edwin Cottrell , John Joseph Ellis-Monaghan , Mark B. Ketchen , Edward Joseph Nowak
发明人： Andres Bryant , Peter Edwin Cottrell , John Joseph Ellis-Monaghan , Mark B. Ketchen , Edward Joseph Nowak
IPC分类号： G05F302
CPC分类号： G05F3/205 , H01L27/0218
摘要： An apparatus for biasing ultra-low voltage logic circuits is disclosed. An integrated circuit device includes multiple transistors and a global body bias circuit. The global body bias circuit includes a first transistor and second transistors connected in series between a power supply and a second power supply or ground. The gate and source of the first transistor are connected to the first power supply. The gate and source of the second transistor are connected to the second power supply. The drains and bodies of the first and second transistors are connected together to form an output connected to the bodies of the other transistors within the integrated circuit device.

6. 发明授权

US08298876B2 Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices 有权
标题翻译：在半导体器件和应变归一化半导体器件中归一化应变的方法
公开(公告)号：US08298876B2
公开(公告)日：2012-10-30
申请号：US12622464
申请日：2009-11-20
申请人： Bruce Balch , Kerry Bernstein , John Joseph Ellis-Monaghan , Nazmul Habib
发明人： Bruce Balch , Kerry Bernstein , John Joseph Ellis-Monaghan , Nazmul Habib
IPC分类号： H01L21/00 , H01L21/84 , H01L21/336 , H01L21/8234 , H01L21/8238
CPC分类号： H01L21/823807 , H01L29/7843
摘要： A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing strain in channel regions of the first and second field effect transistors; and selectively thinning the stress layer over at least a portion of the second field effect transistor.
摘要翻译：一种在半导体器件和归一化应变半导体器件中归一化应变的方法。该方法包括：形成集成电路的第一和第二场效应晶体管; 在所述第一和第二场效应晶体管上形成应力层，所述应力层在所述第一和第二场效应晶体管的沟道区域中引起应变; 以及在所述第二场效应晶体管的至少一部分上选择性地稀薄所述应力层。

7. 发明授权

US07923750B2 Pixel sensor cell, methods and design structure including optically transparent gate 有权
标题翻译：像素传感器单元，方法和设计结构包括光学透明门
公开(公告)号：US07923750B2
公开(公告)日：2011-04-12
申请号：US12139524
申请日：2008-06-16
申请人： James William Adkisson , Rajendran Krishnasamy , John Joseph Ellis-Monaghan , Solomon Mulugeta , Charles Francis Musante , Richard J. Rassel
发明人： James William Adkisson , Rajendran Krishnasamy , John Joseph Ellis-Monaghan , Solomon Mulugeta , Charles Francis Musante , Richard J. Rassel
IPC分类号： H01L31/062 , H01L31/113 , H01L31/00 , H01L29/74 , H01L31/111
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14612
摘要： A pixel sensor cell, a method for fabricating or operating the pixel sensor cell and a design structure for fabricating the pixel sensor cell each include a semiconductor substrate that includes a photoactive region separated from a floating diffusion region by a channel region. At least one gate dielectric is located upon the semiconductor substrate at least in-part interposed between the photoactive region and the floating diffusion region, and at least one optically transparent gate is located upon the gate dielectric and at least in-part over the channel region. Preferably, the at least one gate dielectric is also located over the photoactive region and the at least one optically transparent gate is also located at least in-part over the photoactive region, to provide enhanced charge transfer capabilities within the pixel sensor cell, which is typically a CMOS pixel sensor cell.
摘要翻译：像素传感器单元，用于制造或操作像素传感器单元的方法和用于制造像素传感器单元的设计结构各自包括半导体衬底，其包括通过沟道区域与浮动扩散区域分离的光活性区域。至少一个栅极介质至少部分地位于半导体衬底之间，介于光活性区域和浮动扩散区域之间，并且至少一个光学透明栅极位于栅极电介质上并且至少部分地位于沟道区域上。优选地，至少一个栅极电介质也位于光活性区域之上，并且至少一个光学透明栅极也至少部分地位于光活性区域上，以在像素传感器单元内提供增强的电荷转移能力，其是通常是CMOS像素传感器单元。

8. 发明授权

US08238032B2 Variable focus point lens 有权
标题翻译：可变焦点镜头
公开(公告)号：US08238032B2
公开(公告)日：2012-08-07
申请号：US12708561
申请日：2010-02-19
申请人： John Joseph Ellis-Monaghan , Jeffrey Peter Gambino , Kirk David Peterson , Jed Hickory Rankin
发明人： John Joseph Ellis-Monaghan , Jeffrey Peter Gambino , Kirk David Peterson , Jed Hickory Rankin
IPC分类号： G02B3/12
CPC分类号： G02B3/14
摘要： A variable focal point lens includes a transparent tank, which comprises a transparent enclosure containing a transparent flexible membrane separating the inner volume of the transparent tank into an upper tank portion and a lower tank portion. The upper tank portion and the lower tank portion contain liquids having different indices of refraction. The transparent flexible membrane is electrostatically displaced to change the thicknesses of the first tank portion and the second tank portion in the path of the light, thereby shifting the focal point of the lens axially and/or laterally. The electrostatic displacement of the membrane may be effected by a fixed charge in the membrane and an array of enclosure-side conductive structures on the transparent enclosure, or an array of membrane-side conductive structures on the transparent membrane and an array of enclosure-side conductive structures.
摘要翻译：可变焦点透镜包括透明容器，透明容器包括透明的外壳，该透明外壳包含将透明容器的内部容积分隔成上部容器部分和下部容器部分的透明柔性膜。上罐部分和下罐部分含有不同折射率的液体。透明柔性膜被静电移位以改变光路中的第一罐部分和第二罐部分的厚度，从而轴向和/或横向地移动透镜的焦点。膜的静电位移可以通过膜中的固定电荷和透明外壳上的封闭侧导电结构阵列，或透明膜上的膜侧导电结构阵列和外壳侧阵列导电结构。

9. 发明申请

US20090309143A1 PIXEL SENSOR CELL, METHODS AND DESIGN STRUCTURE INCLUDING OPTICALLY TRANSPARENT GATE 有权
公开(公告)号：US20090309143A1
公开(公告)日：2009-12-17
申请号：US12139524
申请日：2008-06-16
申请人： James William Adkisson , Rajendran Krishnasamy , John Joseph Ellis-Monaghan , Solomon Mulugeta , Charles Francis Musante , Richard J. Rassel
发明人： James William Adkisson , Rajendran Krishnasamy , John Joseph Ellis-Monaghan , Solomon Mulugeta , Charles Francis Musante , Richard J. Rassel
IPC分类号： H01L27/146
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14612
摘要： A pixel sensor cell, a method for fabricating or operating the pixel sensor cell and a design structure for fabricating the pixel sensor cell each include a semiconductor substrate that includes a photoactive region separated from a floating diffusion region by a channel region. At least one gate dielectric is located upon the semiconductor substrate at least in-part interposed between the photoactive region and the floating diffusion region, and at least one optically transparent gate is located upon the gate dielectric and at least in-part over the channel region. Preferably, the at least one gate dielectric is also located over the photoactive region and the at least one optically transparent gate is also located at least in-part over the photoactive region, to provide enhanced charge transfer capabilities within the pixel sensor cell, which is typically a CMOS pixel sensor cell.

10. 发明申请

US20080265422A1 STRUCTURE FOR CHARGE DISSIPATION DURING FABRICATION OF INTEGRATED CIRCUITS AND ISOLATION THEREOF 有权
标题翻译：集成电路制造过程中的充电结构及其隔离结构
公开(公告)号：US20080265422A1
公开(公告)日：2008-10-30
申请号：US12166362
申请日：2008-07-02
申请人： John Joseph Ellis-Monaghan , Jeffrey Peter Gambino , Timothy Dooling Sullivan , Steven Howard Voldman
发明人： John Joseph Ellis-Monaghan , Jeffrey Peter Gambino , Timothy Dooling Sullivan , Steven Howard Voldman
IPC分类号： H01L23/48
CPC分类号： H01L27/0248 , Y10S438/926
摘要： A structure for dissipating charge during fabrication of an integrated circuit. The structure includes: a substrate contact in a semiconductor substrate; one or more wiring levels over the substrate; one or more electrically conductive charge dissipation structures extending from a top surface of an uppermost wiring level of the one or more wiring levels through each lower wiring level of the one or more wiring levels to and in electrical contact with the substrate contact; and circuit structures in the substrate and in the one or more wiring layers, the charge dissipation structures not electrically contacting any the circuit structures in any of the one or more wiring levels, the one or more charge dissipation structures dispersed between the circuit structures.
摘要翻译：用于在集成电路制造期间耗散电荷的结构。该结构包括：半导体衬底中的衬底接触; 衬底上的一个或多个布线层; 一个或多个导电电荷耗散结构，其从所述一个或多个布线层的最上层布线层的顶表面延伸通过所述一个或多个布线层的每个下布线层与所述基板接触电接触; 以及在基板中和在一个或多个布线层中的电路结构，电荷耗散结构在电路结构之间分散的一个或多个电荷耗散结构不会电接触任何一个或多个布线层中的任何一个电路结构。

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