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1. 发明授权

US4463801A Air induction control system for vehicle air conditioners 失效
标题翻译：车用空调进气控制系统
公开(公告)号：US4463801A
公开(公告)日：1984-08-07
申请号：US348300
申请日：1982-02-12
申请人： Akiro Yoshimi , Takeshi Kuwajima , Fumio Ootsuka , Takeo Matsushima
发明人： Akiro Yoshimi , Takeshi Kuwajima , Fumio Ootsuka , Takeo Matsushima
IPC分类号： B60H1/00 , B60H3/00 , F25B1/00
CPC分类号： B60H1/00849
摘要： A vehicle air conditioner control apparatus for supplying into the passenger compartment of a vehicle a flow of air which is temperature controlled in accordance with air conditioner control conditions, automatically controls an air change-over damper in response to a manual setting device for selectively commanding the induction of outside air, the induction of inside air and the induction of outside and inside air into an air duct and in response to a signal indicative of an absolute temperature of air inducted into the air duct, which is computed and generated in accordance with the outputs of a plurality of sensors.
摘要翻译：一种车辆空调控制装置，用于向车辆的乘客室供应根据空调控制条件进行温度控制的空气流，响应于手动设置装置自动控制换气阻尼器，用于选择性地命令感应外部空气，感应内部空气以及将外部和内部空气感应到空气管道中，并且响应于指示引入空气管道的空气的绝对温度的信号，该信号是根据多个传感器的输出。

2. 发明授权

US4486837A Apparatus for controlling operation of automobile air conditioner 失效
标题翻译：用于控制汽车空调的运行的装置
公开(公告)号：US4486837A
公开(公告)日：1984-12-04
申请号：US348299
申请日：1982-02-12
申请人： Yasuhumi Kojima , Akiro Yoshimi , Michihiko Kamiya , Fumio Ootsuka , Takeo Matsushima
发明人： Yasuhumi Kojima , Akiro Yoshimi , Michihiko Kamiya , Fumio Ootsuka , Takeo Matsushima
IPC分类号： B60H1/00 , F24F11/02 , G05D23/19 , G06F15/20 , B60H3/00
CPC分类号： G05D23/1917 , B60H1/00964
摘要： An apparatus for controlling the operation of an automobile air conditioner comprises mode switches which permit selection between a manual control mode and an automatic control mode for the control of the flow rate of the conditioned air, and a digital computer incorporating therein a memory which memorizes the selected control mode in accordance with signals received from the mode switches. The digital computer is constituted to give instructions to control members of the air conditioner for controlling in accordance with the values stored in the memory, and to set in the memory a value representing the automatic control mode so as to operate the air conditioner in the automatic control mode when a main switch of the air conditioner is turned on.
摘要翻译：用于控制汽车空调的操作的装置包括模式开关，其允许在手动控制模式和用于控制调节空气的流量的自动控制模式之间进行选择;以及数字计算机，其内装有存储器根据从模式开关接收的信号选择控制模式。数字计算机构成为根据存储在存储器中的值来控制空调的控制部件的指令，并且在存储器中设置表示自动控制模式的值，以便将空调器自动运行当空调的主开关打开时的控制模式。

3. 发明授权

US4456055A Automotive air conditioner having coating power control device 失效
标题翻译：汽车空调具有涂层功率控制装置
公开(公告)号：US4456055A
公开(公告)日：1984-06-26
申请号：US347025
申请日：1982-02-08
申请人： Akiro Yoshimi , Michihiko Kamiya , Yasuhumi Kojima , Fumio Ootsuka , Takeo Matsushima
发明人： Akiro Yoshimi , Michihiko Kamiya , Yasuhumi Kojima , Fumio Ootsuka , Takeo Matsushima
IPC分类号： B60H1/00 , F24F11/02 , F24F11/08 , G05D23/19 , F28F13/00
CPC分类号： G05D23/1917 , B60H1/00814 , F24F11/08
摘要： An automotive air conditioner device includes an air duct, a blower motor for producing an air stream to be supplied to an automotive passenger compartment through the air duct, a heat exchanger having a heater and a cooling device, and an electronic control device. The electronic control device includes various sensors, a microcomputer for executing computation processings of output signals from the various sensors in accordance with a predetermined program and producing a first and a second control signal, a drive circuit responsive to the first control signal for changing a temperature adjusting value of the heat exchanger and another drive circuit responsive to the second control signal for changing the cooling power of the cooling device, thereby to control the air temperature within the automotive passenger compartment at a desired value.
摘要翻译：一种汽车空调装置，包括：空气管道，用于产生通过空气管道供应到汽车乘客室的空气流的鼓风机电动机，具有加热器和冷却装置的热交换器，以及电子控制装置。电子控制装置包括各种传感器，微型计算机，用于根据预定程序执行来自各种传感器的输出信号的计算处理并产生第一和第二控制信号;响应于第一控制信号的驱动电路，用于改变温度根据所述第二控制信号调节所述热交换器和另一个驱动电路的值，以改变所述冷却装置的冷却功率，从而将所述汽车乘客室内的空气温度控制在期望值。

4. 发明授权

US4291749A Method and apparatus for controlling compartment temperature of a vehicle 失效
标题翻译：用于控制车辆的车厢温度的方法和装置
公开(公告)号：US4291749A
公开(公告)日：1981-09-29
申请号：US98598
申请日：1979-11-29
申请人： Fumio Ootsuka , Morimasa Ninomiya , Norio Maehara , Akiro Yoshimi
发明人： Fumio Ootsuka , Morimasa Ninomiya , Norio Maehara , Akiro Yoshimi
IPC分类号： B60H1/00 , F24F11/02 , G05D23/19 , F25B29/00
CPC分类号： G05D23/1925 , B60H1/0075
摘要： A temperature control method and apparatus responsive to various control conditions to determine the desired amount of temperature control to cause the compartment temperature of a vehicle to approach a desired value. They comprise a first step of producing a first control condition in response to the amount of light incident to the vehicle compartment and a second step of producing a second control condition in response to the amount of heat radiation incident to the vehicle compartment, and a third step whereby the second control condition is adjusted by the first control condition so as to compensate the amount of temperature control in accordance with the adjusted control condition.
摘要翻译：一种温度控制方法和装置，其响应各种控制条件来确定所需的温度控制量以使车辆的车厢温度接近所需的值。它们包括响应于入射到车厢的光量而产生第一控制条件的第一步骤和响应于入射到车厢的热辐射量产生第二控制条件的第二步骤，以及第三步骤从而通过第一控制条件来调整第二控制条件，以便根据调节的控制条件来补偿温度控制量。

5. 发明授权

US07075157B2 Method of manufacturing a semiconductor integrated circuit device 失效
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US07075157B2
公开(公告)日：2006-07-11
申请号：US10834020
申请日：2004-04-29
申请人： Kenichi Kikushima , Fumio Ootsuka , Kazushige Sato
发明人： Kenichi Kikushima , Fumio Ootsuka , Kazushige Sato
IPC分类号： H01L29/76
CPC分类号： H01L27/11 , H01L27/1104 , Y10S257/903 , Y10S257/904
摘要： Disclosed is a semiconductor integrated circuit device (e.g., an SRAM) having memory cells each of a flip-flop circuit constituted by and a pair of load MISFETs, the MISFETs being cross-connected by a pair of local wiring lines, and having transfer MISFETs, wherein gate electrodes of all of the MISFETs are provided in a first level conductive layer, and the pair of local wiring lines are provided respectively in second and third level conductive layers. The local wiring lines can overlap and have a dielectric therebetween so as to form a capacitance element, to increase alpha particle soft error resistance. Moreover, by providing the pair of local wiring lines respectively in different levels, integration of the device can be increased. Side wall spacers can be provided on the sides of the gate electrodes of the MISFETs and on the sides of the local wiring lines, and connection holes to semiconductor regions of these MISFETs are self-aligned to both the gate electrodes and the local wiring lines, whereby capacitor area can be increased and integration of the device can also be increased.
摘要翻译：公开了一种半导体集成电路器件（例如，SRAM），其具有由一对负载MISFET构成的触发电路和每一个负载MISFET的存储单元，MISFET通过一对局部布线交叉连接，并具有传输MISFET 其中，所有MISFET的栅极设置在第一层导电层中，并且所述一对局部布线分别设置在第二和第三层导电层中。局部布线可以重叠并在其间具有电介质以形成电容元件，以增加α粒子的软阻抗。此外，通过分别在不同级别设置一对局部布线，可以提高装置的集成度。可以在MISFET的栅电极的侧面和局部布线的侧面上设置侧壁间隔物，并且到这些MISFET的半导体区域的连接孔与栅电极和局部布线两者自对准，从而可以增加电容器面积并且还可以增加器件的集成。

6. 发明授权

US07041549B2 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07041549B2
公开(公告)日：2006-05-09
申请号：US10855467
申请日：2004-05-28
申请人： Fumio Ootsuka
发明人： Fumio Ootsuka
IPC分类号： H01L21/8238
CPC分类号： H01L29/6659 , H01L21/26506 , H01L21/26513 , H01L21/2658 , H01L21/2686 , H01L21/2807 , H01L21/28088 , H01L21/823807 , H01L21/823864 , H01L29/1083 , H01L29/665 , H01L29/6656
摘要： In a method for manufacturing a semiconductor device, a gate insulating film and a gate electrode are first formed on a substrate. Next, Ge ions, Si ions, or the like are implanted to make the surface of the substrate amorphous, using the gate electrode as a mask. Thereafter, impurities such as B ions or the like, for forming a doped region, are implanted into the amorphous area of the substrate, using the gate electrode as a mask. Furthermore, the doped region is irradiated with visible light for a short period of time.
摘要翻译：在半导体装置的制造方法中，首先在基板上形成栅极绝缘膜和栅电极。接下来，使用栅电极作为掩模，注入Ge离子，Si离子等，使基板的表面成为非晶体。此后，使用栅电极作为掩模，将用于形成掺杂区域的B离子等杂质注入基片的非晶区域。此外，掺杂区域在短时间内被可见光照射。

7. 发明授权

US06894334B2 Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same 失效
标题翻译：半导体集成电路装置及其制造方法及其制造装置
公开(公告)号：US06894334B2
公开(公告)日：2005-05-17
申请号：US10376329
申请日：2003-03-03
申请人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
发明人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
IPC分类号： G03F7/20 , G03F9/00 , H01L21/02 , H01L21/285 , H01L21/336 , H01L21/76 , H01L21/768 , H01L21/8238 , H01L21/8242 , H01L23/29 , H01L23/495 , H01L23/525 , H01L23/532 , H01L23/544 , H01L27/092 , H01L27/10 , H01L27/108 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/10852 , G03F7/70333 , G03F9/70 , H01L21/28512 , H01L21/76 , H01L21/76801 , H01L21/76804 , H01L21/76831 , H01L21/76834 , H01L21/76838 , H01L21/76843 , H01L21/76877 , H01L21/823807 , H01L23/291 , H01L23/4951 , H01L23/5258 , H01L23/532 , H01L23/544 , H01L24/45 , H01L24/48 , H01L27/0922 , H01L27/0928 , H01L27/10808 , H01L28/40 , H01L2223/54473 , H01L2224/05554 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01021 , H01L2924/01029 , H01L2924/01039 , H01L2924/01079 , H01L2924/04941 , H01L2924/12036 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , Y10S257/90 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.
摘要翻译：这里公开了一种半导体集成电路器件制造工艺，用于在由分离绝缘膜和沟道阻挡区域形成的无源区域围绕的衬底的这些有源区的主表面上形成MISFET，包括：形成步骤通过不可氧化掩模的第一掩模和顺序地在衬底的有源区的主表面上的蚀刻掩模; 分别通过比第一掩模的不可氧化掩模和蚀刻掩模更薄的不可氧化掩模在第一掩模的侧壁上自对准形成第二掩模的步骤; 通过使用第一掩模和第二掩模蚀刻衬底的非活性区的主表面的步骤; 通过使用第一掩模和第二掩模的氧化在衬底的无活性区域的主表面上形成元件分离绝缘膜的步骤; 以及通过在第一掩模之后将杂质引入到包括基板的有源区域和非活性区域的全部表面部分中而在基板的元件分离绝缘膜下方的主表面部分上形成沟道阻挡区域的步骤，面具已被删除。

8. 发明授权

US06762444B2 Semiconductor integrated circuit device and a method of manufacturing the same 失效
标题翻译：半导体集成电路器件及其制造方法
公开(公告)号：US06762444B2
公开(公告)日：2004-07-13
申请号：US10308001
申请日：2002-12-03
申请人： Fumio Ootsuka , Yusuke Nonaka , Satoshi Shimamoto , Sohei Omori , Hideto Kazama
发明人： Fumio Ootsuka , Yusuke Nonaka , Satoshi Shimamoto , Sohei Omori , Hideto Kazama
IPC分类号： H01L21336
CPC分类号： H01L27/11 , H01L27/1104
摘要： In order to improve the performance of a semiconductor integrated circuit device wherein a capacitor provided between storage nodes of an SRAM and a device having an analog capacitor are formed on a single substrate, a plug is formed in a silicon oxide film on a pair of n channel type MISFETs in a memory cell forming area, and a local wiring LIc for connecting respective gate electrodes and drains of the pair of n channel type MISFETs is formed over the silicon oxide film and the plug. Thereafter, a capacitive insulating film and an upper electrode are further formed over the local wiring LIc. According to the same process step as the local wiring, capacitive insulating film and upper electrode formed in the memory cell forming area, a local wiring LIc, a capacitive insulating film and an upper electrode are formed over a silicon oxide film in an analog capacitor forming area and a plug in the silicon oxide film.
摘要翻译：为了提高半导体集成电路器件的性能，其中在单个衬底上形成在SRAM的存储节点和具有模拟电容器的器件之间提供的电容器，在一对n上的氧化硅膜中形成插头存储单元形成区域中的沟道型MISFET以及用于连接该n沟道型MISFET的各个栅电极和漏极的局部布线LIc形成在氧化硅膜和插塞上。此后，在本地布线LIc上进一步形成电容绝缘膜和上电极。根据与形成在存储单元形成区域中的局部布线，电容绝缘膜和上电极，局部布线LIc，电容绝缘膜和上电极相同的处理步骤，形成在模拟电容器形成中的氧化硅膜上区域并插入氧化硅膜。

9. 发明授权

US06661063B2 Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US06661063B2
公开(公告)日：2003-12-09
申请号：US09796616
申请日：2001-03-02
申请人： Kenichi Kikushima , Fumio Ootsuka , Kazushige Sato
发明人： Kenichi Kikushima , Fumio Ootsuka , Kazushige Sato
IPC分类号： H01L2976
CPC分类号： H01L27/11 , H01L27/1104 , Y10S257/903
摘要： Disclosed is a semiconductor integrated circuit device (e.g., an SRAM) having memory cells each of a flip-flop circuit constituted by a pair of drive MISFETs and a pair of load MISFETs, the MISFETs being cross-connected by a pair of local wiring lines, and having transfer MISFETs, wherein gate electrodes of all of the MISFETs are provided in a first level conductive layer, and the pair of local wiring lines are provided respectively in second and third level conductive layers. The local wiring lines can overlap and have a dielectric therebetween so as to form a capacitance element, to increase alpha particle soft error resistance. Moreover, by providing the pair of local wiring lines respectively in different levels, integration of the device can be increased. Side wall spacers can be provided on the sides of the gate electrodes of the MISFETs and on the sides of the local wiring lines, and connection holes to semiconductor regions of these MISFETs are self-aligned to both the gate electrodes and the local wiring lines, whereby capacitor area can be increased and integration of the device can also be increased.
摘要翻译：公开了一种半导体集成电路器件（例如，SRAM），其具有由一对驱动MISFET和一对负载MISFET构成的触发电路的存储单元，MISFET通过一对局部布线交叉连接并且具有转移MISFET，其中所有MISFET的栅极设置在第一级导电层中，并且该对局部布线分别设置在第二和第三层导电层中。局部布线可以重叠并在其间具有电介质以形成电容元件，以增加α粒子的软阻抗。此外，通过分别在不同级别设置一对局部布线，可以提高装置的集成度。可以在MISFET的栅电极的侧面和局部布线的侧面上设置侧壁间隔物，并且到这些MISFET的半导体区域的连接孔与栅电极和局部布线两者自对准，从而可以增加电容器面积并且还可以增加器件的集成。

10. 发明授权

US06548847B2 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A FIRST WIRING STRIP EXPOSED THROUGH A CONNECTING HOLE, A TRANSITION-METAL FILM IN THE CONNECTING HOLE AND AN ALUMINUM WIRING STRIP THEREOVER, AND A TRANSITION-METAL NITRIDE FILM BETWEEN THE ALUMINUM WIRING STRIP AND THE TRANSITION-METAL FILM 失效
标题翻译：具有通过连接孔暴露的第一布线的半导体集成电路器件，连接孔中的过渡金属膜和铝导线之间的过渡金属膜以及铝导线和过渡金属膜之间的过渡金属氮化物膜
公开(公告)号：US06548847B2
公开(公告)日：2003-04-15
申请号：US09899921
申请日：2001-07-09
申请人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
发明人： Jun Sugiura , Osamu Tsuchiya , Makoto Ogasawara , Fumio Ootsuka , Kazuyoshi Torii , Isamu Asano , Nobuo Owada , Mitsuaki Horiuchi , Tsuyoshi Tamaru , Hideo Aoki , Nobuhiro Otsuka , Seiichirou Shirai , Masakazu Sagawa , Yoshihiro Ikeda , Masatoshi Tsuneoka , Toru Kaga , Tomotsugu Shimmyo , Hidetsugu Ogishi , Osamu Kasahara , Hiromichi Enami , Atsushi Wakahara , Hiroyuki Akimori , Sinichi Suzuki , Keisuke Funatsu , Yoshinao Kawasaki , Tunehiko Tubone , Takayoshi Kogano , Ken Tsugane
IPC分类号： H01L2976
CPC分类号： H01L27/10852 , G03F7/70333 , G03F9/70 , H01L21/28512 , H01L21/76 , H01L21/76801 , H01L21/76804 , H01L21/76831 , H01L21/76834 , H01L21/76838 , H01L21/76843 , H01L21/76877 , H01L21/823807 , H01L23/291 , H01L23/4951 , H01L23/5258 , H01L23/532 , H01L23/544 , H01L24/45 , H01L24/48 , H01L27/0922 , H01L27/0928 , H01L27/10808 , H01L28/40 , H01L2223/54473 , H01L2224/05554 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/73215 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01021 , H01L2924/01029 , H01L2924/01039 , H01L2924/01079 , H01L2924/04941 , H01L2924/12036 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , Y10S257/90 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.
摘要翻译：这里公开了一种半导体集成电路器件制造工艺，用于在由分离绝缘膜和沟道阻挡区域形成的无源区域围绕的衬底的这些有源区的主表面上形成MISFET，其包括：形成步骤通过不可氧化掩模的第一掩模和顺序地在衬底的有源区的主表面上的蚀刻掩模; 分别通过比第一掩模的不可氧化掩模和蚀刻掩模更薄的不可氧化掩模在第一掩模的侧壁上自对准形成第二掩模的步骤; 通过使用第一掩模和第二掩模蚀刻衬底的非活性区的主表面的步骤; 通过使用第一掩模和第二掩模的氧化在衬底的无活性区域的主表面上形成元件分离绝缘膜的步骤; 以及通过在第一掩模之后将杂质引入到包括基板的有源区域和非活性区域的全部表面部分中而在基板的元件分离绝缘膜下方的主表面部分上形成沟道阻挡区域的步骤，面具已被删除。

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