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    • 4. 发明授权
    • Electrical test system including coaxial cables
    • 电测试系统包括同轴电缆
    • US07538566B2
    • 2009-05-26
    • US11926172
    • 2007-10-29
    • Young-Soo AnSe-Jang OhJung-Hyun Nam
    • Young-Soo AnSe-Jang OhJung-Hyun Nam
    • G01R31/02G01R31/28
    • G01R31/2889
    • An electrical test system includes a test head, a performance board, a probe card and coaxial cables. The performance board includes a first side and an opposite second side, where the first side of the performance board is electrically connected to the test head and the second side of the performance board includes first coaxial cable connection portions. The probe card includes a first side and an opposite second side, where the first side of the probe card includes second coaxial cable connection portions and the second side includes a wafer test probes. The coaxial cables respectively electrically connect the first coaxial cable connection portions of the performance board to the second coaxial cable connection portions of the probe card.
    • 电气测试系统包括测试头,演奏板,探针卡和同轴电缆。 所述性能板包括第一侧和相对的第二侧,其中所述性能板的第一侧电连接到所述测试头,并且所述性能板的第二侧包括第一同轴电缆连接部分。 探针卡包括第一侧和相对的第二侧,其中探针卡的第一侧包括第二同轴电缆连接部分,并且第二侧包括晶片测试探针。 同轴电缆分别将性能板的第一同轴电缆连接部分电连接到探针卡的第二同轴电缆连接部分。
    • 7. 发明授权
    • Interface structure of wafer test equipment
    • 晶圆测试设备的接口结构
    • US08026733B2
    • 2011-09-27
    • US12455445
    • 2009-06-02
    • Sang-hoon LeeChang-woo KoYoung-soo AnSe-jang Oh
    • Sang-hoon LeeChang-woo KoYoung-soo AnSe-jang Oh
    • G01R31/20
    • G01R31/2889G01R1/07378
    • A wafer test equipment system includes a performance board connected to a tester head of a tester. A universal block printed circuit board is positioned on the performance board, directly connecting a plurality of normal signal lines to a probe card and dividing each of a plurality of power signal lines into multiple paths and connecting them to the probe card. A cable assembly transfers the normal signal lines and the power signal lines between the universal block printed circuit board and the tester head. The cable assembly is soldered directly to the universal block printed circuit board in a perpendicular direction through a center portion of the performance board. A probe card is removably secured to the performance board including the universal block printed circuit board. The probe card includes an interposer on an upper surface thereof, a ceramic multi-layer substrate positioned below the interposer, and a plurality of needles positioned below the ceramic multi-layer substrate on a lower surface thereof opposite the upper surface.
    • 晶片测试设备系统包括连接到测试仪测试头的性能板。 通用块印刷电路板位于性能板上,将多条正常信号线直接连接到探针卡,并将多条电源信号线分成多个路径并将其连接到探针卡。 电缆组件将通用块印刷电路板和测试仪头之间的正常信号线和功率信号线传送。 电缆组件通过执行板的中心部分沿垂直方向直接焊接到通用块印刷电路板。 探针卡可移除地固定到包括通用块印刷电路板的性能板上。 探针卡在其上表面包括插入件,位于插入件下方的陶瓷多层基板和位于陶瓷多层基板的下方与表面相反的多个针。
    • 8. 发明申请
    • Semiconductor memory device
    • 半导体存储器件
    • US20100118615A1
    • 2010-05-13
    • US12590417
    • 2009-11-06
    • Jong-Hak WonYoung-Soo AnJung-Hyeon Kim
    • Jong-Hak WonYoung-Soo AnJung-Hyeon Kim
    • G11C7/12G11C7/10
    • G11C7/08G11C5/025G11C7/1012G11C7/12G11C2207/002
    • A semiconductor memory device includes a sub memory cell array region having memory cells each connected between word lines extending in a first direction and bit lines extending in a second direction that is orthogonal to the first direction of extension of the word lines and a sub word line driver region disposed at a side of the sub memory cell array region in the first direction and including sub word line drivers that activate the word lines. A sensing region is disposed at a side of the sub memory cell array region in the second direction and including an equalizer that precharges the bit line in response to a signal transferred through a drive signal line and at least one first control signal driver that activates an inverted control signal line in response to a signal transferred through a control signal line. A conjunction region disposed at an intersection between the sub word line driver region and the sensing region, in which the inverted control signal line is connected to the drive signal line.
    • 半导体存储器件包括具有存储单元的子存储单元阵列区域,每个存储单元分别连接在沿第一方向延伸的字线和沿着与字线的第一延伸方向正交的第二方向延伸的位线和一个子字线 驱动器区域,设置在副存储单元阵列区域的第一方向的一侧,并且包括激活字线的子字线驱动器。 感测区域设置在副存储单元阵列区域的第二方向的一侧,并且包括响应于通过驱动信号线传送的信号而对位线进行预充电的均衡器,以及至少一个第一控制信号驱动器,其激活 响应于通过控制信号线传送的信号的反相控制信号线。 配置在副字线驱动器区域和感测区域之间的交叉点处的连接区域,其中反相控制信号线连接到驱动信号线。