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    • 4. 发明授权
    • Socket pin and socket for electrical testing of semiconductor packages
    • 用于半导体封装电气测试的插座针和插座
    • US06396294B2
    • 2002-05-28
    • US09430997
    • 1999-11-01
    • Young-soo AnYoung-moon LeeJae-il LeeHyo-geun Chae
    • Young-soo AnYoung-moon LeeJae-il LeeHyo-geun Chae
    • G01R104
    • G01R1/0466
    • A socket pin and a socket for electrical testing of a semiconductor package suppress electrical open/short defects due to contact failure and reduce manufacturing costs. The socket pin includes: an upper portion that connects to a lead of the semiconductor package, for exchanging a signal between the semiconductor package and a tester; a body connected to the upper portion, for buffering at two points, a downward force applied by the lead of the semiconductor package to the upper portion; a lower portion connected to the body of the socket pin, the lower portion being elastically durable to the force from the upper portion and the body; and a lower socket pin connected to the lower portion, which acts as a path for transmitting or receiving an electrical signal.
    • 用于半导体封装的电气测试的插座销和插座抑制由于接触故障引起的电开路/短路缺陷并降低制造成本。 插座销包括:连接到半导体封装的引线的上部,用于在半导体封装和测试器之间交换信号; 连接到上部的主体,用于在两个点处缓冲由半导体封装的引线施加到上部的向下的力; 连接到所述插座销的主体的下部,所述下部弹性地抵抗来自所述上部和所述主体的力; 以及连接到下部的下插座销,其作为用于发送或接收电信号的路径。
    • 5. 发明申请
    • Interface structure of wafer test equipment
    • 晶圆测试设备的接口结构
    • US20100117673A1
    • 2010-05-13
    • US12455445
    • 2009-06-02
    • Sang-hoon LeeChang-woo KoYoung-soo AnSe-jang Oh
    • Sang-hoon LeeChang-woo KoYoung-soo AnSe-jang Oh
    • G01R31/02
    • G01R31/2889G01R1/07378
    • A wafer test equipment system includes a performance board connected to a tester head of a tester. A universal block printed circuit board is positioned on the performance board, directly connecting a plurality of normal signal lines to a probe card and dividing each of a plurality of power signal lines into multiple paths and connecting them to the probe card. A cable assembly transfers the normal signal lines and the power signal lines between the universal block printed circuit board and the tester head. The cable assembly is soldered directly to the universal block printed circuit board in a perpendicular direction through a center portion of the performance board. A probe card is removably secured to the performance board including the universal block printed circuit board. The probe card includes an interposer on an upper surface thereof, a ceramic multi-layer substrate positioned below the interposer, and a plurality of needles positioned below the ceramic multi-layer substrate on a lower surface thereof opposite the upper surface.
    • 晶片测试设备系统包括连接到测试仪测试头的性能板。 通用块印刷电路板位于性能板上,将多条正常信号线直接连接到探针卡,并将多条电源信号线分成多个路径并将其连接到探针卡。 电缆组件将通用块印刷电路板和测试仪头之间的正常信号线和功率信号线传送。 电缆组件通过执行板的中心部分沿垂直方向直接焊接到通用块印刷电路板。 探针卡可移除地固定到包括通用块印刷电路板的性能板上。 探针卡在其上表面包括插入件,位于插入件下方的陶瓷多层基板和位于陶瓷多层基板的下方与表面相反的多个针。
    • 6. 发明授权
    • Interface structure of wafer test equipment
    • 晶圆测试设备的接口结构
    • US08026733B2
    • 2011-09-27
    • US12455445
    • 2009-06-02
    • Sang-hoon LeeChang-woo KoYoung-soo AnSe-jang Oh
    • Sang-hoon LeeChang-woo KoYoung-soo AnSe-jang Oh
    • G01R31/20
    • G01R31/2889G01R1/07378
    • A wafer test equipment system includes a performance board connected to a tester head of a tester. A universal block printed circuit board is positioned on the performance board, directly connecting a plurality of normal signal lines to a probe card and dividing each of a plurality of power signal lines into multiple paths and connecting them to the probe card. A cable assembly transfers the normal signal lines and the power signal lines between the universal block printed circuit board and the tester head. The cable assembly is soldered directly to the universal block printed circuit board in a perpendicular direction through a center portion of the performance board. A probe card is removably secured to the performance board including the universal block printed circuit board. The probe card includes an interposer on an upper surface thereof, a ceramic multi-layer substrate positioned below the interposer, and a plurality of needles positioned below the ceramic multi-layer substrate on a lower surface thereof opposite the upper surface.
    • 晶片测试设备系统包括连接到测试仪测试头的性能板。 通用块印刷电路板位于性能板上,将多条正常信号线直接连接到探针卡,并将多条电源信号线分成多个路径并将其连接到探针卡。 电缆组件将通用块印刷电路板和测试仪头之间的正常信号线和功率信号线传送。 电缆组件通过执行板的中心部分沿垂直方向直接焊接到通用块印刷电路板。 探针卡可移除地固定到包括通用块印刷电路板的性能板上。 探针卡在其上表面包括插入件,位于插入件下方的陶瓷多层基板和位于陶瓷多层基板的下方与表面相反的多个针。