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1. 发明授权

US07884628B2 Interposer and probe card having the same 有权
标题翻译：内插器和探针卡具有相同的功能
公开(公告)号：US07884628B2
公开(公告)日：2011-02-08
申请号：US12285962
申请日：2008-10-17
申请人： Young-Soo An , Sang-Hoon Lee , Se-Jang Oh
发明人： Young-Soo An , Sang-Hoon Lee , Se-Jang Oh
IPC分类号： G01R31/02
CPC分类号： G01R31/2889 , H01R12/714
摘要： An interposer may include a first base, at least one first signal line in the first base, and at least one first ground line in the first base, wherein the ground line surrounds the at least one first signal line. The at least one first signal line and the at least one first ground line may be exposed through an upper surface of the first base. The at least one first signal line may be configured to conduct a test current through the first base. An interposer may also include a second base below the first base and may include a printed circuit board between the first base and the second base. A probe card may include a multilayer substrate having at least one contact needle, a coaxial board having at least one coaxial signal cable and the above described interposer between the multilayer substrate and the coaxial board.
摘要翻译：插入器可以包括第一基极，第一基极中的至少一个第一信号线和第一基极中的至少一个第一接地线，其中接地线包围至少一个第一信号线。所述至少一个第一信号线和所述至少一个第一接地线可以通过所述第一基座的上表面暴露。所述至少一个第一信号线可以被配置为进行穿过所述第一基座的测试电流。插入器还可以包括位于第一基座下方的第二基座，并且可以包括在第一基座和第二基座之间的印刷电路板。探针卡可以包括具有至少一个接触针的多层衬底，具有至少一个同轴信号电缆的同轴板以及多层衬底和同轴板之间的上述插入器。

2. 发明授权

US07880490B2 Wireless interface probe card for high speed one-shot wafer test and semiconductor testing apparatus having the same 有权
标题翻译：无线接口探针卡，用于高速单片晶圆测试和半导体测试装置
公开(公告)号：US07880490B2
公开(公告)日：2011-02-01
申请号：US12200716
申请日：2008-08-28
申请人： Sang-Hoon Lee , Kwang-Yong Lee , Se-Jang Oh , Young-Soo An
发明人： Sang-Hoon Lee , Kwang-Yong Lee , Se-Jang Oh , Young-Soo An
IPC分类号： G01R31/28
CPC分类号： G01R31/2889 , G01R31/3025
摘要： A wireless interface probe card includes a substrate member and a transmission member. The substrate member has a plurality of probe terminals arranged at a constant pitch. The probe terminals may directly contact a plurality of pads arranged at a constant pitch on each of a plurality of semiconductor chips arranged on a wafer to perform a test of the semiconductor chips arranged on the wafer. The transmission member is arranged on the substrate member, wirelessly receives a test signal and provides the received test signal to the pads of the wafer through the probe terminals, and wirelessly and externally transmits an electrical characteristic signal provided from the pads of the wafer through the probe terminals.
摘要翻译：无线接口探针卡包括基板部件和传输部件。基板构件具有以恒定间距排列的多个探针端子。探针端子可以直接接触布置在晶片上的多个半导体芯片中的每一个上以恒定间距布置的多个焊盘，以对布置在晶片上的半导体芯片进行测试。传输构件布置在基板构件上，无线地接收测试信号，并通过探针端子将接收到的测试信号提供给晶片的焊盘，并且通过以下方式无线地和外部地传输从晶片的焊盘提供的电特性信号探头端子。

3. 发明申请

US20100117673A1 Interface structure of wafer test equipment 有权
标题翻译：晶圆测试设备的接口结构
公开(公告)号：US20100117673A1
公开(公告)日：2010-05-13
申请号：US12455445
申请日：2009-06-02
申请人： Sang-hoon Lee , Chang-woo Ko , Young-soo An , Se-jang Oh
发明人： Sang-hoon Lee , Chang-woo Ko , Young-soo An , Se-jang Oh
IPC分类号： G01R31/02
CPC分类号： G01R31/2889 , G01R1/07378
摘要： A wafer test equipment system includes a performance board connected to a tester head of a tester. A universal block printed circuit board is positioned on the performance board, directly connecting a plurality of normal signal lines to a probe card and dividing each of a plurality of power signal lines into multiple paths and connecting them to the probe card. A cable assembly transfers the normal signal lines and the power signal lines between the universal block printed circuit board and the tester head. The cable assembly is soldered directly to the universal block printed circuit board in a perpendicular direction through a center portion of the performance board. A probe card is removably secured to the performance board including the universal block printed circuit board. The probe card includes an interposer on an upper surface thereof, a ceramic multi-layer substrate positioned below the interposer, and a plurality of needles positioned below the ceramic multi-layer substrate on a lower surface thereof opposite the upper surface.
摘要翻译：晶片测试设备系统包括连接到测试仪测试头的性能板。通用块印刷电路板位于性能板上，将多条正常信号线直接连接到探针卡，并将多条电源信号线分成多个路径并将其连接到探针卡。电缆组件将通用块印刷电路板和测试仪头之间的正常信号线和功率信号线传送。电缆组件通过执行板的中心部分沿垂直方向直接焊接到通用块印刷电路板。探针卡可移除地固定到包括通用块印刷电路板的性能板上。探针卡在其上表面包括插入件，位于插入件下方的陶瓷多层基板和位于陶瓷多层基板的下方与表面相反的多个针。

4. 发明申请

US20090066350A1 WIRELESS INTERFACE PROBE CARD FOR HIGH SPEED ONE-SHOT WAFER TEST AND SEMICONDUCTOR TESTING APPARATUS HAVING THE SAME 有权
标题翻译：用于高速单波长测试的无线接口探测卡和具有相同功能的半导体测试设备
公开(公告)号：US20090066350A1
公开(公告)日：2009-03-12
申请号：US12200716
申请日：2008-08-28
申请人： Sang-Hoon LEE , Kwang-Yong LEE , Se-Jang OH , Young-Soo AN
发明人： Sang-Hoon LEE , Kwang-Yong LEE , Se-Jang OH , Young-Soo AN
IPC分类号： G01R1/073
CPC分类号： G01R31/2889 , G01R31/3025
摘要： A wireless interface probe card includes a substrate member and a transmission member. The substrate member has a plurality of probe terminals arranged at a constant pitch. The probe terminals may directly contact a plurality of pads arranged at a constant pitch on each of a plurality of semiconductor chips arranged on a wafer to perform a test of the semiconductor chips arranged on the wafer. The transmission member is arranged on the substrate member, wirelessly receives a test signal and provides the received test signal to the pads of the wafer through the probe terminals, and wirelessly and externally transmits an electrical characteristic signal provided from the pads of the wafer through the probe terminals.
摘要翻译：无线接口探针卡包括基板部件和传输部件。基板构件具有以恒定间距排列的多个探针端子。探针端子可以直接接触布置在晶片上的多个半导体芯片中的每一个上以恒定间距布置的多个焊盘，以对布置在晶片上的半导体芯片进行测试。传输构件布置在基板构件上，无线地接收测试信号，并通过探针端子将接收到的测试信号提供给晶片的焊盘，并且通过以下方式无线地和外部地传输从晶片的焊盘提供的电特性信号探头端子。

5. 发明授权

US06625766B1 Tester of semiconductor memory device and test method thereof 失效
标题翻译：半导体存储器件测试仪及其测试方法
公开(公告)号：US06625766B1
公开(公告)日：2003-09-23
申请号：US09512158
申请日：2000-02-24
申请人： Se-Jang Oh , Ki-Sang Kang
发明人： Se-Jang Oh , Ki-Sang Kang
IPC分类号： G11C2900
CPC分类号： G11C29/20 , G11C2029/0405
摘要： A test method of a tester of a semiconductor memory device which includes recording a test pattern into the semiconductor memory device, reading the recorded test pattern to compare with a expected pattern, detecting information on a defect of the semiconductor memory device with a result of the comparison and interpreting the information on the defect of the semiconductor memory device, the method comprising the steps of: setting up minimum and maximum values relevant to a desired capacity of the semiconductor memory device to be tested; counting up from the preset minimum to the preset maximum values; generating a carry signal by comparing the preset maximum value with the counted value when the counted value gets to the preset maximum value; and resetting a value to be counted if the carry signal is generated, to thereby generate addresses of the semiconductor memory device, and a tester of the semiconductor memory device comprising: minimum and maximum address registering means for saving minimum and maximum address values relevant to a desired capacity of the semiconductor memory device to be tested; address counting means for increasingly counting from the minimum value to generate addresses; and carry signal generating means for generating carry signals, if the addresses output from the address counting means and a signal output from the maximum address registering means are the same, to thereby reset the address counting means, so that a user of the tester does not have to make a new test program, providing convenience in performing a test and improving reliability in results of the test.
摘要翻译：一种半导体存储器件的测试器的测试方法，包括将测试图案记录到半导体存储器件中，读取记录的测试图案以与预期图案进行比较，检测关于半导体存储器件的缺陷的信息，结果是比较和解释关于半导体存储器件的缺陷的信息，该方法包括以下步骤：设置与要测试的半导体存储器件的期望容量相关的最小值和最大值; 从预设最小值到预设最大值; 当计数值达到预设最大值时，通过将预设最大值与计数值进行比较来产生进位信号; 并且如果产生进位信号，则重置要计数的值，从而生成半导体存储器件的地址，以及半导体存储器件的测试器，包括：最小和最大地址寄存装置，用于保存与a相关的最小和最大地址值要测试的半导体存储器件的期望容量; 地址计数装置，用于从最小值逐渐计数以产生地址; 以及用于产生进位信号的进位信号产生装置，如果从地址计数装置输出的地址和从最大地址登记装置输出的信号相同，从而复位地址计数装置，使得测试仪的用户不必须制定一个新的测试程序，提供方便的测试和提高测试结果的可靠性。

6. 发明授权

US06507801B1 Semiconductor device testing system 失效
标题翻译：半导体器件测试系统
公开(公告)号：US06507801B1
公开(公告)日：2003-01-14
申请号：US09697026
申请日：2000-10-25
申请人： Se-Jang Oh , Ki-Sang Kang , Jeong-Ho Bang
发明人： Se-Jang Oh , Ki-Sang Kang , Jeong-Ho Bang
IPC分类号： G06F300
CPC分类号： G01R31/31707 , G01R31/3183 , G01R31/318371
摘要： The present invention relates to a semiconductor device testing system having an advanced testing capability for performing tests on a semiconductor device. A system frame includes both normal and high-speed testing formatters, and a test head is arranged in electrical communication with the system frame. Normal PIN drivers are included to operate the testing system at a first frequency to transmit the signals required to perform tests at a normal speed. High-speed PIN drivers are also included to operate the testing system at a second frequency, higher than the first frequency, to transmit the signals required to perform tests at a higher speed. In this manner, the testing system of this invention is able-to achieve superior testing performance while reducing the overall system production cost.
摘要翻译：本发明涉及具有用于对半导体器件进行测试的先进测试能力的半导体器件测试系统。系统框架包括正常和高速测试格式化程序，测试头与系统框架电气通信。包括正常PIN驱动程序，以第一频率操作测试系统，以正常速度传输执行测试所需的信号。还包括高速PIN驱动程序，以高于第一个频率的第二个频率操作测试系统，以更高速度传输执行测试所需的信号。以这种方式，本发明的测试系统能够在降低整个系统生产成本的同时实现优异的测试性能。

7. 发明授权

US06445172B1 Wafer probing system and method of calibrating wafer probing needle using the same 有权
标题翻译：晶圆探测系统及使用其的校准晶圆探针的方法
公开(公告)号：US06445172B1
公开(公告)日：2002-09-03
申请号：US09620016
申请日：2000-07-20
申请人： Seok-ho Park , Ki-sang Kang , Se-jang Oh
发明人： Seok-ho Park , Ki-sang Kang , Se-jang Oh
IPC分类号： G01R3128
CPC分类号： G01R31/2887
摘要： A wafer probing system, and a wafer-probing needle calibrating method using the same are provided. The system comprises a main support, a wafer chuck mounted on the main support, a needle chuck for contacting one of the plurality of needles. The needle chuck is comprised of a conductive signal line, and a shield line for shielding the signal line. Further, the system includes positioning means, for determining the position of the plurality of needles, moving means, for vertically moving the needle chuck, being coupled to the support, and means for horizontally moving the support based on the determined position of the plurality of needles. With the present invention system and method, signals applied to wafer probing needles can be accurately calibrated.
摘要翻译：提供晶片探测系统，以及使用其的晶片探针校准方法。该系统包括主支撑件，安装在主支架上的晶片卡盘，用于接触多个针中的一个针的针卡盘。针卡盘由导电信号线和用于屏蔽信号线的屏蔽线组成。此外，该系统包括用于确定多个针的位置的定位装置，用于垂直移动针卡盘的移动装置，其连接到支撑件，以及用于基于所确定的多个针。利用本发明的系统和方法，可以精确校准施加到晶片探针的信号。

8. 发明申请

US20100289517A1 BUILT OFF TESTING APPARATUS 有权
标题翻译：建立测试装置
公开(公告)号：US20100289517A1
公开(公告)日：2010-11-18
申请号：US12730314
申请日：2010-03-24
申请人： Se-jang OH , Eun-jo BYUN , Cheol-jong WOO
发明人： Se-jang OH , Eun-jo BYUN , Cheol-jong WOO
IPC分类号： G01R31/26
CPC分类号： G01R31/2831 , G01R31/31915 , G01R31/31922 , G11C29/56
摘要： A built off testing apparatus coupled between a semiconductor device and an external testing apparatus to test a semiconductor device. The built off testing apparatus can include a frequency multiplying unit to generate a test clock frequency by multiplying the frequency of a clock input by the external testing apparatus according to the operation speed of the semiconductor device, an instruction decoding unit to generate test information by decoding test signals input by the external testing apparatus according to the test clock frequency, and a test execution unit to test the semiconductor device according to the test information, and can determine whether the semiconductor device is failed or not based on test data output by the semiconductor device, and can transmit resulting data to the external testing apparatus.
摘要翻译：耦合在半导体器件和外部测试装置之间的内置测试装置以测试半导体器件。内置测试装置可以包括乘法单元，用于根据半导体器件的操作速度乘以外部测试装置输入的时钟的频率来产生测试时钟频率，指令解码单元，通过解码产生测试信息根据测试时钟频率由外部测试装置输入的测试信号和测试执行单元，以根据测试信息测试半导体器件，并且可以基于由半导体输出的测试数据来确定半导体器件是否故障设备，并且可以将结果数据发送到外部测试装置。

9. 发明申请

US20100150549A1 Test interface device, test system and optical interface memory device 有权
标题翻译：测试接口设备，测试系统和光接口存储设备
公开(公告)号：US20100150549A1
公开(公告)日：2010-06-17
申请号：US12592817
申请日：2009-12-03
申请人： Sang-Hoon Lee , Eun-Jo Byun , Cheol-Jong Woo , Se-Jang Oh
发明人： Sang-Hoon Lee , Eun-Jo Byun , Cheol-Jong Woo , Se-Jang Oh
IPC分类号： H04B10/08
CPC分类号： G11C29/56 , G11C29/32 , G11C2029/2602 , G11C2029/5602
摘要： A test interface device includes a serializer, an optical transmitter, an optical receiver, and a deserializer. The serializer receives parallel test signals from automatic test equipment, and serializes the parallel test signals into a serial test signal. The optical transmitter converts the serial test signal into an optical test signal. The optical receiver receives the optical test signal from the optical transmitter, and converts the optical test signal into the serial test signal. The deserializer deserializes the serial test signal into the parallel test signals, and transmits the parallel test signals to a device under test. As a result, signal transfer speed may be improved and optical resource usage may be reduced.
摘要翻译：测试接口设备包括串行器，光发送器，光接收器和解串器。串行器从自动测试设备接收并行测试信号，将并行测试信号串行化为串行测试信号。光发射机将串行测试信号转换为光学测试信号。光接收机从光发射机接收光测试信号，并将光测试信号转换为串行测试信号。解串器将串行测试信号反序列化为并行测试信号，并将并行测试信号发送到被测设备。结果，可以提高信号传送速度，并且可以减少光学资源的使用。

10. 发明申请

US20090102500A1 Interposer and probe card having the same 有权
标题翻译：内插器和探针卡具有相同的功能
公开(公告)号：US20090102500A1
公开(公告)日：2009-04-23
申请号：US12285962
申请日：2008-10-17
申请人： Young-Soo An , Sang-Hoon Lee , Se-Jang Oh
发明人： Young-Soo An , Sang-Hoon Lee , Se-Jang Oh
IPC分类号： G01R31/26 , H01R12/00
CPC分类号： G01R31/2889 , H01R12/714
摘要： An interposer may include a first base, at least one first signal line in the first base, and at least one first ground line in the first base, wherein the ground line surrounds the at least one first signal line. The at least one first signal line and the at least one first ground line may be exposed through an upper surface of the first base. The at least one first signal line may be configured to conduct a test current through the first base. An interposer may also include a second base below the first base and may include a printed circuit board between the first base and the second base. A probe card may include a multilayer substrate having at least one contact needle, a coaxial board having at least one coaxial signal cable and the above described interposer between the multilayer substrate and the coaxial board.
摘要翻译：插入器可以包括第一基极，第一基极中的至少一个第一信号线和第一基极中的至少一个第一接地线，其中接地线包围至少一个第一信号线。所述至少一个第一信号线和所述至少一个第一接地线可以通过所述第一基座的上表面暴露。所述至少一个第一信号线可以被配置为进行穿过所述第一基座的测试电流。插入器还可以包括位于第一基座下方的第二基座，并且可以包括在第一基座和第二基座之间的印刷电路板。探针卡可以包括具有至少一个接触针的多层衬底，具有至少一个同轴信号电缆的同轴板以及多层衬底和同轴板之间的上述插入器。

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