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1. 发明授权

US08300349B2 Systems and methods for format efficient calibration for servo data based harmonics calculation 失效
标题翻译：基于伺服数据的谐波计算格式有效校准的系统和方法
公开(公告)号：US08300349B2
公开(公告)日：2012-10-30
申请号：US12851425
申请日：2010-08-05
申请人： George Mathew , Suharli Tedja , Hongwei Song , Robert A. Greene , Yuan Xing Lee
发明人： George Mathew , Suharli Tedja , Hongwei Song , Robert A. Greene , Yuan Xing Lee
IPC分类号： G11B21/02 , G11B5/09
CPC分类号： G11B5/6029 , G11B20/10018 , G11B20/10481 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for servo data based harmonics calculation. For example, a method for calculating harmonics is disclosed that includes: providing a data processing circuit; receiving a first data set derived from a data source during a servo data processing period; performing a first harmonics calculation using the first data set to yield a first harmonics ratio; receiving a second data set derived from a source other than the previously mentioned data source during a user data processing period; performing a second harmonics calculation using the second data set to yield a second harmonics ratio; and calculating a ratio of the first harmonics ratio to the second harmonics ratio.
摘要翻译：本发明的各种实施例提供了用于基于伺服数据的谐波计算的系统和方法。例如，公开了一种用于计算谐波的方法，包括：提供数据处理电路; 在伺服数据处理期间接收从数据源导出的第一数据组; 使用所述第一数据组执行第一谐波计算以产生第一谐波比; 在用户数据处理期间接收从除了前述数据源之外的源得到的第二数据集; 使用所述第二数据组执行二次谐波计算以产生第二谐波比; 以及计算所述第一谐波比与所述第二谐波比的比率。

2. 发明授权

US5859564A Differential amplifier circuit for use in a read channel for a magnetic recording system 失效
标题翻译：用于磁记录系统的读通道的差分放大器电路
公开(公告)号：US5859564A
公开(公告)日：1999-01-12
申请号：US892776
申请日：1997-07-15
申请人： Jeffrey Lee Sonntag , Suharli Tedja
发明人： Jeffrey Lee Sonntag , Suharli Tedja
IPC分类号： G11B5/02 , G11B20/10 , H03F1/32 , H03F3/16 , H03F3/45
CPC分类号： G11B20/10009 , H03F1/3211 , H03F1/3223 , H03F3/45479 , H03F3/4565 , H03F3/45708 , H03F3/45937 , H03F3/45955 , H03F2203/45524
摘要： Briefly, in accordance with one embodiment of the invention, a circuit includes: at least one differential amplifier. The differential amplifier is coupled in a circuit configuration so that the differential output voltage signal of the differential amplifier circuit includes a scalable second-order harmonic component of the differential input voltage signal applied to the differential amplifier circuit. Briefly, in accordance with another embodiment of the invention, a method of applying a differential input voltage signal to a differential amplifier circuit to produce a differential output voltage signal includes the step of: driving the differential amplifier circuit so that the differential output voltage signal of the differential amplifier circuit includes a second-order harmonic component of the differential input voltage signal.
摘要翻译：简而言之，根据本发明的一个实施例，电路包括：至少一个差分放大器。差分放大器以电路配置耦合，使得差分放大器电路的差分输出电压信号包括施加到差分放大器电路的差分输入电压信号的可扩展二阶谐波分量。简而言之，根据本发明的另一实施例，将差分输入电压信号施加到差分放大器电路以产生差分输出电压信号的方法包括以下步骤：驱动差分放大器电路，使得差分输出电压信号差分放大器电路包括差分输入电压信号的二次谐波分量。

3. 发明申请

US20140068532A1 INTEGRATED CIRCUIT CHARACTERIZATION BASED ON MEASURED AND STATIC APPARENT RESISTANCES 有权
标题翻译：基于测量和稳定电阻的集成电路特性
公开(公告)号：US20140068532A1
公开(公告)日：2014-03-06
申请号：US13603972
申请日：2012-09-05
申请人： Suharli Tedja , Swarupchandra Kamerkar , Vineet Sreekumar , Yadvinder Singh
发明人： Suharli Tedja , Swarupchandra Kamerkar , Vineet Sreekumar , Yadvinder Singh
IPC分类号： G06F17/50
CPC分类号： G01R31/31924 , G01R31/3004 , G01R31/3008
摘要： First and second apparent resistance measures are determined for an integrated circuit and utilized to characterize the integrated circuit. The first apparent resistance measure is determined for the integrated circuit based on a first voltage drop and a first current that are measured using test equipment. The second apparent resistance measure is determined for the integrated circuit based on a second voltage drop and a second current that are obtained using static analysis of a corresponding integrated circuit design. The integrated circuit is characterized based on a comparison of the first and second apparent resistance measures. For example, characterizing the integrated circuit may comprise validating the static analysis of the integrated circuit design based on the comparison of the first and second apparent resistance measures, or determining a quality measure of the integrated circuit based on the comparison of the first and second apparent resistance measures.
摘要翻译：确定集成电路的第一和第二表观电阻措施，并用于表征集成电路。基于使用测试设备测量的第一电压降和第一电流，确定集成电路的第一视在电阻测量。基于使用对应的集成电路设计的静态分析获得的第二电压降和第二电流来确定集成电路的第二视在电阻测量。基于第一和第二表观电阻测量的比较来表征集成电路。例如，表征集成电路可以包括基于第一和第二视在电阻测量的比较来验证集成电路设计的静态分析，或者基于第一和第二表观的比较来确定集成电路的质量测量抵抗措施。

4. 发明申请

US20120056612A1 Systems and Methods for Phase Compensated Harmonic Sensing in Fly Height Control 有权
标题翻译：飞行高度控制中相位补偿谐波检测的系统与方法
公开(公告)号：US20120056612A1
公开(公告)日：2012-03-08
申请号：US12875734
申请日：2010-09-03
申请人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
发明人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
IPC分类号： G01R25/00
CPC分类号： G11B5/6029
摘要： Various embodiments of the present invention provide systems and methods for phase compensated harmonic sensing. For example, a circuit for harmonics calculation is disclosed that includes a phase difference estimation circuit and a phase offset compensation circuit. The harmonic calculation circuit is operable to calculate a first harmonic based on a periodic data pattern and a second harmonic based on the periodic data pattern. The phase difference estimation circuit operable to calculate a phase difference between the first harmonic and the second harmonic. The phase offset compensation circuit operable to align the second harmonic with the first harmonic to yield an aligned harmonic.
摘要翻译：本发明的各种实施例提供了用于相位补偿谐波感测的系统和方法。例如，公开了一种用于谐波计算的电路，其包括相位差估计电路和相位偏移补偿电路。谐波计算电路可操作以基于周期性数据模式和基于周期性数据模式的二次谐波计算第一谐波。所述相位差估计电路可操作以计算所述一次谐波和所述第二谐波之间的相位差。相位偏移补偿电路可操作以将二次谐波与第一谐波对准以产生对准的谐波。

5. 发明授权

US08605381B2 Systems and methods for phase compensated harmonic sensing in fly height control 有权
标题翻译：飞行高度控制中相位补偿谐波感测的系统和方法
公开(公告)号：US08605381B2
公开(公告)日：2013-12-10
申请号：US12875734
申请日：2010-09-03
申请人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
发明人： George Mathew , Pradeep Padukone , Hongwei Song , Suharli Tedja
IPC分类号： G11B21/02 , G11B27/36
CPC分类号： G11B5/6029
摘要： Various embodiments of the present invention provide systems and methods for phase compensated harmonic sensing. For example, a circuit for harmonics calculation is disclosed that includes a phase difference estimation circuit and a phase offset compensation circuit. The harmonic calculation circuit is operable to calculate a first harmonic based on a periodic data pattern and a second harmonic based on the periodic data pattern. The phase difference estimation circuit operable to calculate a phase difference between the first harmonic and the second harmonic. The phase offset compensation circuit operable to align the second harmonic with the first harmonic to yield an aligned harmonic.
摘要翻译：本发明的各种实施例提供了用于相位补偿谐波感测的系统和方法。例如，公开了一种用于谐波计算的电路，其包括相位差估计电路和相位偏移补偿电路。谐波计算电路可操作以基于周期性数据模式和基于周期性数据模式的二次谐波计算第一谐波。所述相位差估计电路可操作以计算所述一次谐波和所述第二谐波之间的相位差。相位偏移补偿电路可操作以将二次谐波与第一谐波对准以产生对准的谐波。

6. 发明申请

US20050088205A1 COMPOSITE SOURCE FOLLOWER 失效
标题翻译：复合源产品
公开(公告)号：US20050088205A1
公开(公告)日：2005-04-28
申请号：US10694246
申请日：2003-10-27
申请人： Sateh Jalaleddine , Suharli Tedja
发明人： Sateh Jalaleddine , Suharli Tedja
IPC分类号： H03F3/50 , H03K3/00 , H03K5/02 , H03K5/153 , H03K5/24
CPC分类号： H03F3/505 , H03F2203/5031 , H03K5/023 , H03K5/2481
摘要： A folded cascode device senses the drain current of a source follower, and a current mirror device multiplies the sensed drain current for application to an output load. The source follower and the current mirror device are preferably of the same type (e.g., both NMOS). The resulting composite source follower provides relatively wide bandwidth at relatively low power. The folded cascode allows (NMOS) source and sink control. Using current mirror feedback reduces the stability problems associated with other solutions that rely on a voltage feedback stage. Composite source followers of the present invention can be used in any traditional buffer applications, such as in operational amplifiers, regulators, or high-speed signal paths.
摘要翻译：折叠共源共栅器件感测源极跟随器的漏极电流，并且电流镜装置将感测到的漏极电流乘以输出负载。源极跟随器和电流镜装置优选地具有相同类型（例如，两个NMOS）。所得到的复合源跟随器在相对低的功率下提供相对宽的带宽。折叠的共源共栅允许（NMOS）源极和漏极控制。使用电流镜反馈减少了与依赖于电压反馈级的其他解决方案相关的稳定性问题。本发明的复合源跟随器可以用于任何传统的缓冲器应用中，例如在运算放大器，调节器或高速信号路径中。

7. 发明授权

US08832634B2 Integrated circuit characterization based on measured and static apparent resistances 有权
标题翻译：基于测量和静态表观电阻的集成电路表征
公开(公告)号：US08832634B2
公开(公告)日：2014-09-09
申请号：US13603972
申请日：2012-09-05
申请人： Suharli Tedja , Swarupchandra Kamerkar , Vineet Sreekumar , Yadvinder Singh
发明人： Suharli Tedja , Swarupchandra Kamerkar , Vineet Sreekumar , Yadvinder Singh
IPC分类号： G06F17/50
CPC分类号： G01R31/31924 , G01R31/3004 , G01R31/3008
摘要： First and second apparent resistance measures are determined for an integrated circuit and utilized to characterize the integrated circuit. The first apparent resistance measure is determined for the integrated circuit based on a first voltage drop and a first current that are measured using test equipment. The second apparent resistance measure is determined for the integrated circuit based on a second voltage drop and a second current that are obtained using static analysis of a corresponding integrated circuit design. The integrated circuit is characterized based on a comparison of the first and second apparent resistance measures. For example, characterizing the integrated circuit may comprise validating the static analysis of the integrated circuit design based on the comparison of the first and second apparent resistance measures, or determining a quality measure of the integrated circuit based on the comparison of the first and second apparent resistance measures.
摘要翻译：确定集成电路的第一和第二表观电阻措施，并用于表征集成电路。基于使用测试设备测量的第一电压降和第一电流，确定集成电路的第一视在电阻测量。基于使用对应的集成电路设计的静态分析获得的第二电压降和第二电流来确定集成电路的第二视在电阻测量。基于第一和第二表观电阻测量的比较来表征集成电路。例如，表征集成电路可以包括基于第一和第二视在电阻测量的比较来验证集成电路设计的静态分析，或者基于第一和第二表观的比较来确定集成电路的质量测量抵抗措施。

8. 发明申请

US20120033316A1 Systems and Methods for Format Efficient Calibration for Servo Data Based Harmonics Calculation 失效
标题翻译：基于伺服数据的谐波计算格式有效校准的系统和方法
公开(公告)号：US20120033316A1
公开(公告)日：2012-02-09
申请号：US12851425
申请日：2010-08-05
申请人： George Mathew , Suharli Tedja , Hongwei Song , Robert A. Greene , Yuan Xing Lee
发明人： George Mathew , Suharli Tedja , Hongwei Song , Robert A. Greene , Yuan Xing Lee
IPC分类号： G11B27/36
CPC分类号： G11B5/6029 , G11B20/10018 , G11B20/10481 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for servo data based harmonics calculation. For example, a method for calculating harmonics is disclosed that includes: providing a data processing circuit; receiving a first data set derived from a data source during a servo data processing period; performing a first harmonics calculation using the first data set to yield a first harmonics ratio; receiving a second data set derived from a source other than the previously mentioned data source during a user data processing period; performing a second harmonics calculation using the second data set to yield a second harmonics ratio; and calculating a ratio of the first harmonics ratio to the second harmonics ratio.
摘要翻译：本发明的各种实施例提供了用于基于伺服数据的谐波计算的系统和方法。例如，公开了一种用于计算谐波的方法，包括：提供数据处理电路; 在伺服数据处理期间接收从数据源导出的第一数据组; 使用所述第一数据组执行第一谐波计算以产生第一谐波比; 在用户数据处理期间接收从除了前述数据源之外的源得到的第二数据集; 使用所述第二数据组执行二次谐波计算以产生第二谐波比; 以及计算所述第一谐波比与所述第二谐波比的比率。

9. 发明授权

US06924674B2 Composite source follower 失效
标题翻译：复合源跟随器
公开(公告)号：US06924674B2
公开(公告)日：2005-08-02
申请号：US10694246
申请日：2003-10-27
申请人： Sateh M. Jalaleddine , Suharli Tedja
发明人： Sateh M. Jalaleddine , Suharli Tedja
IPC分类号： H03F3/50 , H03K3/00 , H03K5/02 , H03K5/153 , H03K5/24
CPC分类号： H03F3/505 , H03F2203/5031 , H03K5/023 , H03K5/2481
摘要： A folded cascode device senses the drain current of a source follower, and a current mirror device multiplies the sensed drain current for application to an output load. The source follower and the current mirror device are preferably of the same type (e.g., both NMOS). The resulting composite source follower provides relatively wide bandwidth at relatively low power. The folded cascode allows (NMOS) source and sink control. Using current mirror feedback reduces the stability problems associated with other solutions that rely on a voltage feedback stage. Composite source followers of the present invention can be used in any traditional buffer applications, such as in operational amplifiers, regulators, or high-speed signal paths.
摘要翻译：折叠共源共栅器件感测源极跟随器的漏极电流，并且电流镜装置将感测到的漏极电流乘以输出负载。源极跟随器和电流镜装置优选地具有相同类型（例如，两个NMOS）。所得到的复合源跟随器在相对低的功率下提供相对宽的带宽。折叠的共源共栅允许（NMOS）源极和漏极控制。使用电流镜反馈减少了与依赖于电压反馈级的其他解决方案相关的稳定性问题。本发明的复合源跟随器可以用于任何传统的缓冲器应用中，例如在运算放大器，调节器或高速信号路径中。

10. 发明授权

US06275090B1 Adaptive resistor trimming circuit 失效
标题翻译：自适应电阻微调电路
公开(公告)号：US06275090B1
公开(公告)日：2001-08-14
申请号：US09176279
申请日：1997-04-09
申请人： Harley Franklin Burger, Jr. , Jeffrey Lee Sonntag , Suharli Tedja
发明人： Harley Franklin Burger, Jr. , Jeffrey Lee Sonntag , Suharli Tedja
IPC分类号： G06F500
CPC分类号： H01L27/0802
摘要： An integrated circuit includes a self-calibrating resistor circuit comprising a resistor string, a comparator, a state machine, a reference voltage source, and a reference current source. The current source typically comprises a voltage reference, typically a bandgap reference, and a temperature-independent resistor having a value REXT. In operation, a reference current IREF flows through the resistor string. During a calibration period, the voltage across the string is compared to the bandgap reference voltage, VBG, by the comparator, which controls the state of the state machine. The outputs of the state machine turn on or off the resistors in the string until the voltage across the string, VR, is approximately equal to the reference voltage. The resistance of the resistor string is then equal to RBG=VBG/IREF, which is proportional to REXT, and thus is typically independent of process and temperature. The final state of the state machine that produces RBG may be used to control any resistor strings on the integrated circuit that need to be temperature and process independent. The calibration period may be repeated from time to time to track temperature variations.
摘要翻译：集成电路包括自校准电阻器电路，其包括电阻串，比较器，状态机，参考电压源和参考电流源。电流源通常包括电压参考，通常为带隙基准，以及具有值REXT的温度独立电阻。在操作中，参考电流IREF流经电阻串。在校准周期期间，通过控制状态机的状态的比较器将串上的电压与带隙参考电压VBG进行比较。状态机的输出打开或关闭串中的电阻，直到串上的电压VR近似等于参考电压。电阻串的电阻等于RBG = VBG / IREF，其与REXT成比例，因此通常与工艺和温度无关。产生RBG的状态机的最终状态可以用于控制集成电路中需要温度和处理独立性的任何电阻串。不时地重复校准周期以跟踪温度变化。

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