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1. 发明申请

US20050088205A1 COMPOSITE SOURCE FOLLOWER 失效
标题翻译：复合源产品
公开(公告)号：US20050088205A1
公开(公告)日：2005-04-28
申请号：US10694246
申请日：2003-10-27
申请人： Sateh Jalaleddine , Suharli Tedja
发明人： Sateh Jalaleddine , Suharli Tedja
IPC分类号： H03F3/50 , H03K3/00 , H03K5/02 , H03K5/153 , H03K5/24
CPC分类号： H03F3/505 , H03F2203/5031 , H03K5/023 , H03K5/2481
摘要： A folded cascode device senses the drain current of a source follower, and a current mirror device multiplies the sensed drain current for application to an output load. The source follower and the current mirror device are preferably of the same type (e.g., both NMOS). The resulting composite source follower provides relatively wide bandwidth at relatively low power. The folded cascode allows (NMOS) source and sink control. Using current mirror feedback reduces the stability problems associated with other solutions that rely on a voltage feedback stage. Composite source followers of the present invention can be used in any traditional buffer applications, such as in operational amplifiers, regulators, or high-speed signal paths.
摘要翻译：折叠共源共栅器件感测源极跟随器的漏极电流，并且电流镜装置将感测到的漏极电流乘以输出负载。源极跟随器和电流镜装置优选地具有相同类型（例如，两个NMOS）。所得到的复合源跟随器在相对低的功率下提供相对宽的带宽。折叠的共源共栅允许（NMOS）源极和漏极控制。使用电流镜反馈减少了与依赖于电压反馈级的其他解决方案相关的稳定性问题。本发明的复合源跟随器可以用于任何传统的缓冲器应用中，例如在运算放大器，调节器或高速信号路径中。

2. 发明申请

US20140312457A1 INTEGRATED CIRCUIT CHIP WITH DISCONTINUOUS GUARD RING 有权
标题翻译：集成电路芯片与不连续的保护环
公开(公告)号：US20140312457A1
公开(公告)日：2014-10-23
申请号：US13864729
申请日：2013-04-17
申请人： Qiang Li , Olin L. Hartin , Sateh Jalaleddine , Radu M. Secareanu , Michael J. Zunino
发明人： Qiang Li , Olin L. Hartin , Sateh Jalaleddine , Radu M. Secareanu , Michael J. Zunino
IPC分类号： H01L27/02 , H01L21/76
CPC分类号： H01L27/0203 , H01L21/76 , H01L23/5223 , H01L23/5225 , H01L23/5227 , H01L23/585 , H01L23/645 , H01L27/08 , H01L28/10 , H01L29/402 , H01L29/404 , H01L2924/0002 , H01L2924/00
摘要： An electronic apparatus includes a semiconductor substrate, a circuit block disposed in and supported by the semiconductor substrate and comprising an inductor, and a discontinuous noise isolation guard ring surrounding the circuit block. The discontinuous noise isolation guard ring includes a metal ring supported by the semiconductor substrate and a ring-shaped region disposed in the semiconductor substrate, having a dopant concentration level, and electrically coupled to the metal ring, to inhibit noise in the semiconductor substrate from reaching the circuit. The metal ring has a first gap and the ring-shaped region has a second gap.
摘要翻译：电子设备包括半导体衬底，设置在半导体衬底中并由半导体衬底支撑并包括电感器的电路块以及围绕电路块的不连续噪声隔离保护环。不连续的噪声隔离保护环包括由半导体衬底支撑的金属环和设置在半导体衬底中的环形区域，具有掺杂剂浓度水平并且电耦合到金属环，以抑制半导体衬底中的噪声达到电路。金属环具有第一间隙，并且环形区域具有第二间隙。

3. 发明授权

US08847676B2 Image rejection for low IF receivers 有权
标题翻译：低IF接收机的图像抑制
公开(公告)号：US08847676B2
公开(公告)日：2014-09-30
申请号：US13533501
申请日：2012-06-26
申请人： Sateh Jalaleddine
发明人： Sateh Jalaleddine
IPC分类号： H03B1/00
CPC分类号： H03H11/0444 , H03D7/165 , H03D2200/0088 , H03H11/0472 , H03H2011/0494 , H03H2210/023 , H04B1/30
摘要： A system that includes a polyphase filter comprises first and second gm-C filters with first and second variable biasing and a bias controller coupled to the first and second gm-C filters and configured to offset the first variable biasing and corresponding first gm of the first gm-C filter relative to the second variable biasing and corresponding second gm of the second gm-C filter to thus improve image rejection in the system. A corresponding method includes processing a signal in a complex polyphase filter and controlling biasing of the first gm-C filter stage relative to the second gm-C filter stage to provide a mismatched gm and thereby improve rejection of the image signal.
摘要翻译：包括多相滤波器的系统包括具有第一和第二可变偏压的第一和第二gm-C滤波器，以及耦合到第一和第二gm-C滤波器的偏置控制器，并且被配置为偏移第一和第二可变偏置的第一可变偏压和相应的第一gm gm-C滤波器相对于第二变量偏置和相应的第二gm-C滤波器的第二gm，从而提高系统中的图像抑制。相应的方法包括处理复杂多相滤波器中的信号并且控制第一gm-C滤波器级相对于第二gm-C滤波器级的偏置以提供不匹配的gm，从而改善图像信号的抑制。

4. 发明申请

US20130342267A1 IMAGE REJECTION FOR LOW IF RECEIVERS 有权
标题翻译：低中频接收机的图像抑制
公开(公告)号：US20130342267A1
公开(公告)日：2013-12-26
申请号：US13533501
申请日：2012-06-26
申请人： Sateh Jalaleddine
发明人： Sateh Jalaleddine
IPC分类号： H03K5/00
CPC分类号： H03H11/0444 , H03D7/165 , H03D2200/0088 , H03H11/0472 , H03H2011/0494 , H03H2210/023 , H04B1/30
摘要： A system that includes a polyphase filter comprises first and second gm-C filters with first and second variable biasing and a bias controller coupled to the first and second gm-C filters and configured to offset the first variable biasing and corresponding first gm of the first gm-C filter relative to the second variable biasing and corresponding second gm of the second gm-C filter to thus improve image rejection in the system. A corresponding method includes processing a signal in a complex polyphase filter and controlling biasing of the first gm-C filter stage relative to the second gm-C filter stage to provide a mismatched gm and thereby improve rejection of the image signal.
摘要翻译：包括多相滤波器的系统包括具有第一和第二可变偏压的第一和第二gm-C滤波器，以及耦合到第一和第二gm-C滤波器的偏置控制器，并且被配置为偏移第一和第二可变偏置的第一可变偏压和相应的第一gm gm-C滤波器相对于第二变量偏置和相应的第二gm-C滤波器的第二gm，从而提高系统中的图像抑制。相应的方法包括处理复杂多相滤波器中的信号并且控制第一gm-C滤波器级相对于第二gm-C滤波器级的偏置以提供不匹配的gm，从而改善图像信号的抑制。

5. 发明授权

US08957496B2 Integrated circuit chip with discontinuous guard ring 有权
标题翻译：具有不连续保护环的集成电路芯片
公开(公告)号：US08957496B2
公开(公告)日：2015-02-17
申请号：US13864729
申请日：2013-04-17
申请人： Qiang Li , Olin L. Hartin , Sateh Jalaleddine , Radu M. Secareanu , Michael J. Zunino
发明人： Qiang Li , Olin L. Hartin , Sateh Jalaleddine , Radu M. Secareanu , Michael J. Zunino
IPC分类号： H01L21/70 , H01L21/76 , H01L27/02
CPC分类号： H01L27/0203 , H01L21/76 , H01L23/5223 , H01L23/5225 , H01L23/5227 , H01L23/585 , H01L23/645 , H01L27/08 , H01L28/10 , H01L29/402 , H01L29/404 , H01L2924/0002 , H01L2924/00
摘要： An electronic apparatus includes a semiconductor substrate, a circuit block disposed in and supported by the semiconductor substrate and comprising an inductor, and a discontinuous noise isolation guard ring surrounding the circuit block. The discontinuous noise isolation guard ring includes a metal ring supported by the semiconductor substrate and a ring-shaped region disposed in the semiconductor substrate, having a dopant concentration level, and electrically coupled to the metal ring, to inhibit noise in the semiconductor substrate from reaching the circuit. The metal ring has a first gap and the ring-shaped region has a second gap.
摘要翻译：电子设备包括半导体衬底，设置在半导体衬底中并由半导体衬底支撑并包括电感器的电路块以及围绕电路块的不连续噪声隔离保护环。不连续的噪声隔离保护环包括由半导体衬底支撑的金属环和设置在半导体衬底中的环形区域，具有掺杂剂浓度水平并且电耦合到金属环，以抑制半导体衬底中的噪声达到电路。金属环具有第一间隙，并且环形区域具有第二间隙。

6. 发明申请

US20070109052A1 CLASS AB ENHANCED TRANSCONDUCTANCE SOURCE FOLLOWER 失效
标题翻译： CLASS AB增强型交流电源
公开(公告)号：US20070109052A1
公开(公告)日：2007-05-17
申请号：US11612354
申请日：2006-12-18
申请人： Stephen Franck , Sateh Jalaleddine
发明人： Stephen Franck , Sateh Jalaleddine
IPC分类号： H03F3/26
CPC分类号： H03F3/505 , H03F1/0205 , H03F1/523 , H03F2200/462 , H03F2203/5012
摘要： A low voltage, high bandwidth, enhanced transconductance, source follower circuit constructed from MOS FET devices, which operates in a class AB mode. The drain current of the source follower is sensed with a folded cascode device. The sensed current is multiplied by a common source device of same type (NMOS or PMOS) as the source follower, and directed to the output load. Over limit current load at the source follower drain is sensed by a common source device of the opposite type (NMOS or PMOS), which also supplies the necessary extra current to the output load. This allows. the device to supply significantly more than the quiescent current in both sourcing and sinking the output. Average power consumption for driving a given load is significantly reduced, while maintaining the large bandwidth of traditional source follower designs, and the capability for use in either voltage regulators or in a current conveyor.
摘要翻译：一种低压，高带宽，增强的跨导，源极跟随器电路，由MOS FET器件构成，其工作在AB类模式。源极跟随器的漏极电流用折叠共源共栅器件进行感测。感测到的电流乘以与源极跟随器相同类型（NMOS或PMOS）的公共源器件，并且被引导到输出负载。源极跟随器漏极处的超限电流负载由相反类型（NMOS或PMOS）的公共源器件感测，其也向输出负载提供必要的额外电流。这允许。该器件在输出和输出中都提供明显多于静态电流。驱动给定负载的平均功耗大大降低，同时保持传统源极跟随器设计的大带宽，以及在电压调节器或当前输送机中使用的能力。

7. 发明申请

US20050134383A1 Class AB enhanced transconductance source follower 有权
标题翻译： AB类增强型跨导源跟随器
公开(公告)号：US20050134383A1
公开(公告)日：2005-06-23
申请号：US10737937
申请日：2003-12-17
申请人： Stephen Franck , Sateh Jalaleddine
发明人： Stephen Franck , Sateh Jalaleddine
IPC分类号： H03F3/18
CPC分类号： H03F3/505 , H03F1/0205 , H03F1/523 , H03F2200/462 , H03F2203/5012
摘要： A low voltage, high bandwidth, enhanced transconductance, source follower circuit constructed from MOS FET devices, which operates in a class AB mode. The drain current of the source follower is sensed with a folded cascode device. The sensed current is multiplied by a common source device of same type (NMOS or PMOS) as the source follower, and directed to the output load. Over limit current load at the source follower drain is sensed by a common source device of the opposite type (NMOS or PMOS), which also supplies the necessary extra current to the output load. This allows the device to supply significantly more than the quiescent current in both sourcing and sinking the output. Average power consumption for driving a given load is significantly reduced, while maintaining the large bandwidth of traditional source follower designs, and the capability for use in either voltage regulators or in a current conveyor.
摘要翻译：一种低压，高带宽，增强的跨导，源极跟随器电路，由MOS FET器件构成，其工作在AB类模式。源极跟随器的漏极电流用折叠共源共栅器件进行感测。感测到的电流乘以与源极跟随器相同类型（NMOS或PMOS）的公共源器件，并且被引导到输出负载。源极跟随器漏极处的超限电流负载由相反类型（NMOS或PMOS）的公共源器件感测，其也向输出负载提供必要的额外电流。这允许器件在输出中输出和吸收时提供明显高于静态电流。驱动给定负载的平均功耗大大降低，同时保持传统源极跟随器设计的大带宽，以及在电压调节器或当前输送机中使用的能力。

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