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    • 2. 发明授权
    • Electron device manufacturing method, a pattern forming method, and a photomask used for those methods
    • 电子器件制造方法,图案形成方法和用于这些方法的光掩模
    • US06750000B2
    • 2004-06-15
    • US10671666
    • 2003-09-29
    • Toshihiko TanakaNorio HasegawaHiroshi ShiraishiHidetoshi Satoh
    • Toshihiko TanakaNorio HasegawaHiroshi ShiraishiHidetoshi Satoh
    • G03F700
    • G03F1/30
    • A method of manufacturing an electron device provided with minute structure such as a semiconductor integrated circuit using projection exposure technique and phase shift mask technique, maintaining a high yield is disclosed. In an electron device manufacturing method according to the invention, a desired electron device is manufactured by printing a light shielding film pattern on a photosensitive film provided on the surface of a workpiece by a projection tool using a mask where a phase shifter having predetermined thickness is partially formed on the flat surface of a transparent plate and a light shielding film having a predetermined pattern and made of non-metal is partially provided with the film covering the end of the shifter and developing the photosensitive film. Further, concretely, the above pattern is printed using a mask where the light shielding film made of non-metal is partially extended on the surface of the shifter and the transparent plate including the end of the shifter by the projection tool. According to the electron device manufacturing method according to the invention, an electron device provided with minute structure can be precisely manufactured maintaining a high yield.
    • 公开了一种制造具有微小结构的电子器件的方法,例如使用投影曝光技术和相移掩模技术的半导体集成电路,保持高产率。 在根据本发明的电子器件制造方法中,通过使用具有预定厚度的移相器的掩模通过投影工具在设置在工件表面上的感光膜上印刷遮光膜图案来制造所需的电子器件 部分地形成在透明板的平坦表面上和具有预定图案并由非金属制成的遮光膜部分地设置有覆盖移位器的端部并显影感光膜的膜。 此外,具体地,使用由非金属制成的遮光膜在移位器的表面上部分地延伸的掩模和通过投影工具包括移位器的端部的透明板来打印上述图案。 根据本发明的电子器件制造方法,可以精确地制造具有微小结构的电子器件,保持高产率。
    • 3. 发明授权
    • Electron device manufacturing method, a pattern forming method, and a photomask used for those methods
    • 电子器件制造方法,图案形成方法和用于这些方法的光掩模
    • US06653052B2
    • 2003-11-25
    • US09810194
    • 2001-03-19
    • Toshihiko TanakaNorio HasegawaHiroshi ShiraishiHidetoshi Satoh
    • Toshihiko TanakaNorio HasegawaHiroshi ShiraishiHidetoshi Satoh
    • G03F750
    • G03F1/30
    • A method of manufacturing an electron device provided with minute structure such as a semiconductor integrated circuit using projection exposure technique and phase shift mask technique, maintaining a high yield is disclosed. In an electron device manufacturing method according to the invention, a desired electron device is manufactured by printing a light shielding film pattern on a photosensitive film provided on the surface of a workpiece by a projection tool using a mask where a phase shifter having predetermined thickness is partially formed on the flat surface of a transparent plate and a light shielding film having a predetermined pattern and made of non-metal is partially provided with the film covering the end of the shifter and developing the photosensitive film. Further, concretely, the above pattern is printed using a mask where the light shielding film made of non-metal is partially extended on the surface of the shifter and the transparent plate including the end of the shifter by the projection tool. According to the electron device manufacturing method according to the invention, an electron device provided with minute structure can be precisely manufactured maintaining a high yield.
    • 公开了一种制造具有微小结构的电子器件的方法,例如使用投影曝光技术和相移掩模技术的半导体集成电路,保持高产率。 在根据本发明的电子器件制造方法中,通过使用具有预定厚度的移相器的掩模通过投影工具在设置在工件表面上的感光膜上印刷遮光膜图案来制造所需的电子器件 部分地形成在透明板的平坦表面上和具有预定图案并由非金属制成的遮光膜部分地设置有覆盖移位器的端部并显影感光膜的膜。 此外,具体地,使用由非金属制成的遮光膜在移位器的表面上部分地延伸的掩模和通过投影工具包括移位器的端部的透明板来打印上述图案。 根据本发明的电子器件制造方法,可以精确地制造具有微小结构的电子器件,保持高产率。
    • 7. 发明授权
    • Method of fabricating semiconductor circuit devices utilizing multiple
exposures
    • US6159644A
    • 2000-12-12
    • US142077
    • 1998-09-01
    • Hidetoshi SatohYoshinori NakayamaMasahide OkumuraHiroya OhtaNorio Saitou
    • Hidetoshi SatohYoshinori NakayamaMasahide OkumuraHiroya OhtaNorio Saitou
    • G03F7/20H01J37/304G03F9/00
    • G03F7/70616G03F7/70433G03F7/70458G03F7/70633H01J37/3045H01J2237/3175Y10S430/143
    • In a semiconductor circuit device fabricating process in which a reduction image projection exposure apparatus and an electron beam exposure apparatus are in a mixed use in its exposure process, pattern position shift errors for each exposure apparatus are measured and corrected at the time of drawing by means of an electron beam drawing apparatus, thereby enhancing the alignment accuracy.First, a pattern for measuring position shifts is exposed using a stepper and the electron beam drawing apparatus. Then, the position shift errors are measured using an identical coordinate position measuring device. Accidental errors have been mixed in the measurement result at this time. On account of this, measurement data at a certain point are smoothed by taking a summation average with data on the periphery thereof, thus decreasing influences of the accidental errors. Moreover, by inverting positive or negative signs of the data on the position shift errors, the data are made into correction data. Then, the correction data are stored. When an exposure is performed by the electron beam drawing apparatus with the pattern exposed by the stepper as a reference, the correction data for the two apparatuses are transferred to the electron beam drawing apparatus, the two data are added to detected mark positions, and at positions after the addition, pattern position shifts within a wafer surface are determined. At the time of exposure, the exposure is performed at positions obtained by subtracting the correction data from the determined pattern position shifts. This method makes it possible to correct both position shift errors within the wafer surface due to the stepper and position shift errors due to the electron beam drawing apparatus, thus allowing the alignment accuracy to be enhanced. Also, this result makes it possible to enhance yield for products in the fabricating process.