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71. 发明授权

US08154081B2 Processes and apparatus having a semiconductor fin 有权
标题翻译：具有半导体散热片的方法和装置
公开(公告)号：US08154081B2
公开(公告)日：2012-04-10
申请号：US13017854
申请日：2011-01-31
申请人： Mark Fischer , T. Earl Allen , H. Montgomery Manning
发明人： Mark Fischer , T. Earl Allen , H. Montgomery Manning
IPC分类号： H01L27/12
CPC分类号： H01L29/785 , H01L29/66818 , H01L29/7853 , Y10S438/947
摘要： A process may include first etching a trench isolation dielectric through a dielectric hard mask that abuts the sidewall of a fin semiconductor. The first etch can be carried out to expose at least a portion of the sidewall, causing the dielectric hard mask to recede to a greater degree in the lateral direction than the vertical direction. The process may include second etching the fin semiconductor to achieve a thinned semiconductor fin, which has receded beneath the shadow of the laterally receded hard mask. The thinned semiconductor fin may have a characteristic dimension that can exceed photolithography limits. Electronic devices may include the thinned semiconductor fin as part of a field effect transistor.
摘要翻译：工艺可以包括首先通过与散热片半导体的侧壁邻接的电介质硬掩模蚀刻沟槽隔离电介质。可以执行第一蚀刻以暴露侧壁的至少一部分，使得电介质硬掩模在横向方向上比垂直方向更大程度地退回。该方法可以包括第二蚀刻鳍式半导体以实现减薄的半导体鳍片，其已经在横向后退的硬掩模的阴影之下退化。减薄的半导体鳍片可以具有可超过光刻极限的特征尺寸。电子器件可以包括作为场效应晶体管的一部分的变薄的半导体鳍片。

72. 发明申请

US20120061740A1 SUBRESOLUTION SILICON FEATURES AND METHODS FOR FORMING THE SAME 有权
标题翻译： SUBRASOLUTION SILICON特征及其形成方法
公开(公告)号：US20120061740A1
公开(公告)日：2012-03-15
申请号：US13302090
申请日：2011-11-22
申请人： Kevin J. Torek , Mark Fischer , Robert J. Hanson
发明人： Kevin J. Torek , Mark Fischer , Robert J. Hanson
IPC分类号： H01L27/06 , H01L29/78
CPC分类号： H01L29/7851 , H01L27/10808 , H01L27/10826 , H01L27/10879 , H01L29/66795 , H01L29/7853 , H01L29/7854
摘要： Novel etch techniques are provided for shaping silicon features below the photolithographic resolution limits. FinFET devices are defined by recessing oxide and exposing a silicon protrusion to an isotropic etch, at least in the channel region. In one implementation, the protrusion is contoured by a dry isotropic etch having excellent selectivity, using a downstream microwave plasma etch.
摘要翻译：提供了新颖的蚀刻技术，用于在低于光刻分辨率极限的条件下成形硅特征。 FinFET器件通过凹陷氧化物和至少在沟道区域中将硅突起暴露于各向同性蚀刻来限定。在一个实施方案中，使用下游微波等离子体蚀刻，通过具有优异选择性的干各向同性蚀刻来形成突起。

73. 发明申请

US20120052640A1 Methods Of Forming Pluralities Of Vertical Transistors, And Methods Of Forming Memory Arrays 有权
标题翻译：形成多个垂直晶体管的方法，以及形成记忆阵列的方法
公开(公告)号：US20120052640A1
公开(公告)日：2012-03-01
申请号：US12872705
申请日：2010-08-31
申请人： Mark Fischer , Sanh D. Tang
发明人： Mark Fischer , Sanh D. Tang
IPC分类号： H01L21/336
CPC分类号： H01L27/10876 , H01L21/823425 , H01L21/823487 , H01L27/2454 , H01L29/0653 , H01L29/42368 , H01L29/456 , H01L29/66666 , H01L29/7827 , H01L45/06 , H01L45/1233
摘要： Some embodiments include methods of forming vertical transistors. A construction may have a plurality of spaced apart fins extending upwardly from a semiconductor substrate. Each of the fins may have vertical transistor pillars, and each of the vertical transistor pillars may have a bottom source/drain region location, a channel region location over the bottom source/drain region location, and a top source/drain region location over the channel region location. Electrically conductive gate material may be formed along the fins while using oxide within spaces along the bottoms of the fins to offset the electrically conductive gate material to be above the bottom source/drain region locations of the vertical transistor pillars. The oxide may be an oxide which etches at a rate of at least about 100 Å/minute with dilute HF at room temperature. In some embodiments the oxide may be removed after the electrically conductive gate material is formed.
摘要翻译：一些实施例包括形成垂直晶体管的方法。结构可以具有从半导体衬底向上延伸的多个间隔开的翅片。每个鳍片可以具有垂直的晶体管柱，并且每个垂直晶体管柱可以具有底部源极/漏极区域位置，在底部源极/漏极区域位置上方的沟道区域位置，以及顶部源极/漏极区域渠道区域位置。导电栅极材料可以沿着鳍片形成，同时沿着鳍状物的底部在空间内使用氧化物以将导电栅极材料偏移到垂直晶体管柱的底部源极/漏极区域的上方。氧化物可以是在室温下用稀释HF以至少约100埃/分钟的速率蚀刻的氧化物。在一些实施例中，可以在形成导电栅极材料之后去除氧化物。

74. 发明申请

US20110225119A1 SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR VERSIONING CONTENT IN A DATABASE SYSTEM USING CONTENT TYPE SPECIFIC OBJECTS 有权
标题翻译：使用内容类型特定对象的数据库系统中的版本内容的系统，方法和计算机程序产品
公开(公告)号：US20110225119A1
公开(公告)日：2011-09-15
申请号：US13047697
申请日：2011-03-14
申请人： Simon Wong , Walter Macklem , Mark Fischer , Orjan Kjellberg , Olivier Pin , Sonali Agrawal , Ron Pragides , Etienne Giraudy
发明人： Simon Wong , Walter Macklem , Mark Fischer , Orjan Kjellberg , Olivier Pin , Sonali Agrawal , Ron Pragides , Etienne Giraudy
IPC分类号： G06F7/00 , G06F17/30
CPC分类号： G06F17/30309 , G06F17/30607
摘要： In accordance with embodiments, there are provided mechanisms and methods for versioning content in a database system using content type specific objects. These mechanisms and methods for versioning content in a database system using content type specific objects can enable embodiments to provide a database system which stores information associated with multiple versions of content. The ability of embodiments to provide a database system which supports content versioning can enable an efficient and comprehensive storage of content types having different features by the database system.
摘要翻译：根据实施例，提供了使用内容类型特定对象在数据库系统中对内容进行版本化的机制和方法。用于使用内容类型特定对象对数据库系统中的内容进行版本化的这些机制和方法可使实施例能够提供存储与多个内容版本相关联的信息的数据库系统。实施例提供支持内容版本化的数据库系统的能力可以实现数据库系统具有不同特征的内容类型的有效和全面的存储。

75. 发明授权

US07883959B2 Semiconductor processing methods 有权
标题翻译：半导体加工方法
公开(公告)号：US07883959B2
公开(公告)日：2011-02-08
申请号：US12855585
申请日：2010-08-12
申请人： Mark Fischer , Terrence B. McDaniel
发明人： Mark Fischer , Terrence B. McDaniel
IPC分类号： H01L21/8234 , H01L21/8244
CPC分类号： H01L23/5225 , H01L27/0207 , H01L27/105 , H01L27/10897 , H01L2924/0002 , H01L2924/00
摘要： The invention includes methods of forming electrically conductive material between line constructions associated with a peripheral region or a pitch region of a semiconductor substrate. The electrically conductive material can be incorporated into an electrically-grounded shield, and/or can be configured to create a magnetic field bias. Also, the conductive material can have electrically isolated segments that are utilized as electrical jumpers for connecting circuit elements. The invention also includes semiconductor constructions comprising the electrically conductive material between line constructions associated with one or both of the pitch region and the peripheral region.
摘要翻译：本发明包括在与半导体衬底的外围区域或间距区域相关联的线路构造之间形成导电材料的方法。导电材料可以结合到电接地屏蔽中，和/或可以被配置成产生磁场偏置。此外，导电材料可以具有用作连接电路元件的电跳线的电隔离段。本发明还包括在与线圈结构相关联的线路结构之间包括导电材料的半导体结构，其与音调区域和外围区域中的一个或两个相关联。

76. 发明授权

US07557001B2 Semiconductor processing methods 有权
标题翻译：半导体加工方法
公开(公告)号：US07557001B2
公开(公告)日：2009-07-07
申请号：US11175864
申请日：2005-07-05
申请人： Mark Fischer , Terrence B. McDaniel
发明人： Mark Fischer , Terrence B. McDaniel
IPC分类号： H01L21/8234
CPC分类号： H01L23/5225 , H01L27/0207 , H01L27/105 , H01L27/10897 , H01L2924/0002 , H01L2924/00
摘要： The invention includes methods of forming electrically conductive material between line constructions associated with a peripheral region or a pitch region of a semiconductor substrate. The electrically conductive material can be incorporated into an electrically-grounded shield, and/or can be configured to create a magnetic field bias. Also, the conductive material can have electrically isolated segments that are utilized as electrical jumpers for connecting circuit elements. The invention also includes semiconductor constructions comprising the electrically conductive material between line constructions associated with one or both of the pitch region and the peripheral region.
摘要翻译：本发明包括在与半导体衬底的外围区域或间距区域相关联的线路构造之间形成导电材料的方法。导电材料可以结合到电接地屏蔽中，和/或可以被配置成产生磁场偏置。此外，导电材料可以具有用作连接电路元件的电跳线的电隔离段。本发明还包括在与线圈结构相关联的线路结构之间包括导电材料的半导体结构，其与音调区域和外围区域中的一个或两个相关联。

77. 发明申请

US20070010084A1 Semiconductor processing methods, and semiconductor constructions 有权
标题翻译：半导体加工方法和半导体结构
公开(公告)号：US20070010084A1
公开(公告)日：2007-01-11
申请号：US11175864
申请日：2005-07-05
申请人： Mark Fischer , Terrence McDaniel
发明人： Mark Fischer , Terrence McDaniel
IPC分类号： H01L21/4763
CPC分类号： H01L23/5225 , H01L27/0207 , H01L27/105 , H01L27/10897 , H01L2924/0002 , H01L2924/00
摘要： The invention includes methods of forming electrically conductive material between line constructions associated with a peripheral region or a pitch region of a semiconductor substrate. The electrically conductive material can be incorporated into an electrically-grounded shield, and/or can be configured to create a magnetic field bias. Also, the conductive material can have electrically isolated segments that are utilized as electrical jumpers for connecting circuit elements. The invention also includes semiconductor constructions comprising the electrically conductive material between line constructions associated with one or both of the pitch region and the peripheral region.
摘要翻译：本发明包括在与半导体衬底的外围区域或间距区域相关联的线路构造之间形成导电材料的方法。导电材料可以结合到电接地屏蔽中，和/或可以被配置成产生磁场偏置。此外，导电材料可以具有电隔离段，其被用作用于连接电路元件的电跳线。本发明还包括在与线圈结构相关联的线路结构之间包括导电材料的半导体结构，其与音调区域和外围区域中的一个或两个相关联。

78. 发明申请

US20060263987A1 Methods of forming fusible devices 审中-公开
标题翻译：形成易熔装置的方法
公开(公告)号：US20060263987A1
公开(公告)日：2006-11-23
申请号：US11496251
申请日：2006-07-31
申请人： Mark Fischer , Zhiping Yin , Thomas Glass , Kunal Parekh , Gurtej Sandhu
发明人： Mark Fischer , Zhiping Yin , Thomas Glass , Kunal Parekh , Gurtej Sandhu
IPC分类号： H01L21/336
CPC分类号： H01L23/5256 , H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to a laser fuse. The laser fuse comprises an element comprising a heat conductive material. The fuse also includes an absorption element comprising a material with an adjustable capacity for heat or light absorption that overlays the heat conductive element. The fuse also includes an outer insulating element that overlays and encloses the heat conductive element and the absorption element.
摘要翻译：本发明涉及一种激光熔丝。激光熔丝包括包含导热材料的元件。保险丝还包括吸收元件，该吸收元件包括具有与热传导元件重叠的热或光吸收的可调容量的材料。保险丝还包括覆盖并包围导热元件和吸收元件的外绝缘元件。

79. 发明申请

US20060234469A1 A method of forming semiconductor structures 审中-公开
标题翻译：一种形成半导体结构的方法
公开(公告)号：US20060234469A1
公开(公告)日：2006-10-19
申请号：US11409134
申请日：2006-04-21
申请人： David Dickerson , Richard Lane , Charles Dennison , Kunal Parekh , Mark Fischer , John Zahurak
发明人： David Dickerson , Richard Lane , Charles Dennison , Kunal Parekh , Mark Fischer , John Zahurak
IPC分类号： H01L21/76
CPC分类号： H01L21/76232 , H01L21/0332 , H01L21/76235
摘要： In one aspect, the invention includes an isolation region forming method comprising: a) forming an oxide layer over a substrate; b) forming a nitride layer over the oxide layer, the nitride layer and oxide layer having a pattern of openings extending therethrough to expose portions of the underlying substrate; c) etching the exposed portions of the underlying substrate to form openings extending into the substrate; d) after etching the exposed portions of the underlying substrate, removing portions of the nitride layer while leaving some of the nitride layer remaining over the substrate; and e) after removing portions of the nitride layer, forming oxide within the openings in the substrate, the oxide within the openings forming at least portions of isolation regions. In another aspect, the invention includes an isolation region forming method comprising: a) forming a silicon nitride layer over a substrate; b) forming a masking layer over the silicon nitride layer; c) forming a pattern of openings extending through the masking layer to the silicon nitride layer; d) extending the openings through the silicon nitride layer to the underlying substrate, the silicon nitride layer having edge regions proximate the openings and having a central region between the edge regions; e) extending the openings into the underlying substrate; f) after extending the openings into the underlying substrate, reducing a thickness of the silicon nitride layer at the edge regions to thin the edge regions relative to the central region; and g) forming oxide within the openings.
摘要翻译：一方面，本发明包括一种隔离区形成方法，包括：a）在衬底上形成氧化物层; b）在所述氧化物层上形成氮化物层，所述氮化物层和氧化物层具有延伸穿过其中的开口图案以暴露所述下面的衬底的部分; c）蚀刻下面的衬底的暴露部分以形成延伸到衬底中的开口; d）在蚀刻下面的衬底的暴露部分之后，去除氮化物层的部分，同时留下一些保留在衬底上的氮化物层; 以及e）在去除所述氮化物层的部分之后，在所述衬底的所述开口内形成氧化物，所述开口内的氧化物形成至少部分隔离区域。另一方面，本发明包括一种隔离区形成方法，包括：a）在衬底上形成氮化硅层; b）在氮化硅层上形成掩模层; c）形成延伸穿过掩模层的开口图案到氮化硅层; d）将开口穿过氮化硅层延伸到下面的衬底，氮化硅层具有靠近开口的边缘区域，并且在边缘区域之间具有中心区域; e）将开口延伸到下面的基底中; f）在将开口延伸到下面的基底之后，减小边缘区域处的氮化硅层的厚度，以使边缘区域相对于中心区域变薄; 和g）在开口内形成氧化物。

80. 发明申请

US20050211671A1 Oxygen plasma treatment for a nitride surface to reduce photo footing 审中-公开
标题翻译：用于氮化物表面的氧等离子体处理以减少照片基础
公开(公告)号：US20050211671A1
公开(公告)日：2005-09-29
申请号：US11125981
申请日：2005-05-10
申请人： Zhiping Yin , Mark Fischer
发明人： Zhiping Yin , Mark Fischer
IPC分类号： H01L21/027 , H01L21/318 , H01L21/302 , B44C1/22
CPC分类号： H01L21/3105 , H01L21/0274 , H01L21/3185
摘要： The present invention includes a method for preventing distortion in semi-conductor fabrication. The method comprises providing a substrate comprising a film comprising silicon nitride. The substrate is treated in a vacuum of about 3.0-6.5 Torr in an atmosphere comprising oxygen plasma wherein the oxygen plasma flow rate is at least about 300 sccm oxygen. A resist is applied to the treated substrate and the resist is patterned over the treated substrate.
摘要翻译：本发明包括一种用于防止半导体制造中的变形的方法。该方法包括提供包含含氮化硅的膜的衬底。在包含氧等离子体的气氛中，在约3.0-6.5乇的真空中处理衬底，其中氧等离子体流速为至少约300sccm的氧气。将抗蚀剂施加到经处理的基底上，并且将抗蚀剂图案化在经处理的基底上。

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