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61. 发明授权

US08053829B2 Methods of fabricating nonvolatile memory devices 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08053829B2
公开(公告)日：2011-11-08
申请号：US12635098
申请日：2009-12-10
申请人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
发明人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
IPC分类号： H01L29/792
CPC分类号： H01L27/11578 , H01L27/115 , H01L27/11551 , H01L27/11556 , H01L27/11582
摘要： Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
摘要翻译：提供了非易失性存储器件和制造非易失性存储器件的方法。该方法包括图案化大块基板以形成有源柱; 在活性柱的侧面上形成电荷存储层; 以及形成连接到所述有源支柱的多个栅极，所述电荷存储层设置在所述有源支柱和所述栅极之间。在沉积栅极之前，使用干蚀刻来蚀刻大块衬底以形成与半导体衬底在单体中的垂直有源柱。

62. 发明申请

US20110227007A1 METHOD OF MANUFACTURING QUANTUM DOT 有权
标题翻译：制造量子的方法
公开(公告)号：US20110227007A1
公开(公告)日：2011-09-22
申请号：US12907743
申请日：2010-10-19
申请人： Jong Hyuk KANG , Junghan SHIN , Jae Byung PARK , Dong-Hoon LEE , Minki NAM , Kookheon CHAR , Seonghoon LEE , WanKi BAE , Jaehoon LIM , Joohyun JUNG
发明人： Jong Hyuk KANG , Junghan SHIN , Jae Byung PARK , Dong-Hoon LEE , Minki NAM , Kookheon CHAR , Seonghoon LEE , WanKi BAE , Jaehoon LIM , Joohyun JUNG
IPC分类号： H01B1/02 , H01B1/06
CPC分类号： H01L21/02628 , C09K11/623 , H01L21/02521 , H01L21/02557 , H01L21/02568 , H01L21/02601
摘要： A method of manufacturing a quantum dot, the method including: mixing of a Group II precursor and a Group III precursor in a solvent to prepare a first mixture; heating the first mixture at a temperature of about 200° C. to about 350° C.; adding a Group V precursor and a Group VI precursor to the first mixture while maintaining the first mixture at the temperature of about 200° C. to about 350° C. to prepare a second mixture; and maintaining the second mixture at the temperature of about 200° C. to about 350° C. to form a quantum dot.
摘要翻译：一种制造量子点的方法，所述方法包括：将II族前体和III族前体在溶剂中混合以制备第一混合物; 在约200℃至约350℃的温度下加热第一混合物; 向第一混合物中加入V族前体和VI族前体，同时将第一混合物保持在约200℃至约350℃的温度以制备第二混合物; 并将第二混合物保持在约200℃至约350℃的温度下以形成量子点。

63. 发明授权

US07959738B2 Method of removing photoresist and method of manufacturing a semiconductor device 失效
标题翻译：去除光刻胶的方法和制造半导体器件的方法
公开(公告)号：US07959738B2
公开(公告)日：2011-06-14
申请号：US11984340
申请日：2007-11-16
申请人： Dae-Hyuk Kang , Hyo-San Lee , Dong-Gyun Han , Chang-Ki Hong , Kun-Tack Lee
发明人： Dae-Hyuk Kang , Hyo-San Lee , Dong-Gyun Han , Chang-Ki Hong , Kun-Tack Lee
IPC分类号： H01L21/28
CPC分类号： H01L21/31133 , G03F7/422 , G03F7/425 , H01L21/28061 , H01L29/4941 , H01L29/517 , H01L29/6659 , H01L29/7833
摘要： A method of removing a photoresist may include permeating supercritical carbon dioxide into the photoresist on a substrate having a conductive structure including a metal. The photoresist permeating the supercritical carbon dioxide may be easily removable. The photoresist permeating the supercritical carbon dioxide may be removed using a photoresist cleaning solution from the substrate. The photoresist cleaning solution may include an alkanolamine solution of about 8 percent by weight to about 20 percent by weight, a polar organic solution of about 25 percent by weight to about 40 percent by weight, a reducing agent of about 0.5 percent by weight to about 3 percent by weight with the remainder being water. The photoresist may be easily removed without damaging the conductive structure in a plasma process.
摘要翻译：去除光致抗蚀剂的方法可以包括在具有包括金属的导电结构的基底上的光致抗蚀剂中渗透超临界二氧化碳。渗透超临界二氧化碳的光致抗蚀剂可以容易地去除。可以使用来自基底的光致抗蚀剂清洁溶液去除渗透超临界二氧化碳的光致抗蚀剂。光致抗蚀剂清洁溶液可以包括约8重量％至约20重量％的链烷醇胺溶液，约25重量％至约40重量％的极性有机溶液，约0.5重量％至约 3重量％，其余为水。可以容易地去除光致抗蚀剂，而不会在等离子体工艺中损坏导电结构。

64. 发明授权

US07888151B2 Array substrate for liquid crystal display device and method of fabricating the same 有权
标题翻译：液晶显示装置用阵列基板及其制造方法
公开(公告)号：US07888151B2
公开(公告)日：2011-02-15
申请号：US12318284
申请日：2008-12-23
申请人： Su Hyuk Kang , Dai Yun Lee , Yong In Park , Young Joo Kim
发明人： Su Hyuk Kang , Dai Yun Lee , Yong In Park , Young Joo Kim
IPC分类号： H01L21/00
CPC分类号： H01L29/42384 , G02F1/13454 , H01L27/124 , H01L27/14621 , H01L29/78621
摘要： An array substrate for an LCD device includes a first TFT including a first semiconductor layer, a first gate electrode, wherein the first gate electrode is directly over the first semiconductor layer; a first protrusion extending from the first gate electrode along an edge of the first semiconductor layer; a second TFT including a second semiconductor layer, a second gate electrode, wherein the second gate electrode is directly over the second semiconductor layer; a second protrusion extending from the second gate electrode along an edge of the second semiconductor layer; a third TFT connected to crossed data and gate lines including a third semiconductor layer, a third gate electrode, wherein the third gate electrode is directly over the third semiconductor layer; a third protrusion extending from the third gate electrode along an edge of the third semiconductor layer; and a pixel electrode.
摘要翻译：用于LCD器件的阵列衬底包括：第一TFT，包括第一半导体层，第一栅电极，其中第一栅电极直接位于第一半导体层上; 从所述第一栅电极沿着所述第一半导体层的边缘延伸的第一突起; 包括第二半导体层的第二TFT，第二栅电极，其中所述第二栅电极直接在所述第二半导体层上; 从所述第二栅电极沿着所述第二半导体层的边缘延伸的第二突起; 连接到交叉数据的第三TFT和包括第三半导体层，第三栅电极的栅极线，其中第三栅极直接在第三半导体层上方; 从所述第三栅电极沿着所述第三半导体层的边缘延伸的第三突起; 和像素电极。

65. 发明申请

US20110005487A1 Variable Intake System 审中-公开
标题翻译：可变进气系统
公开(公告)号：US20110005487A1
公开(公告)日：2011-01-13
申请号：US12568353
申请日：2009-09-28
申请人： Ha Dong BONG , Seong Hyuk KANG , Wootae KIM
发明人： Ha Dong BONG , Seong Hyuk KANG , Wootae KIM
IPC分类号： F02M35/10
CPC分类号： F02M35/10045 , F02B27/021 , F02B27/0242 , F02B27/0252 , F02B27/0273 , F02B27/0294 , F02M35/10065 , F02M35/116 , Y02T10/146
摘要： A variable intake system may include intake runners that are respectively connected to a plurality of cylinders to supply air that flows therein to the cylinders, a plenum, one side of which is connected to the intake runners and distributes the air to the intake runners, a first resonance pipe, one end of which is connected to the other side of the plenum to supply the air therein, a second resonance pipe, one end of which is connected to the other side of the plenum to supply the air therein, the length thereof being shorter than that of the first resonance pipe and the cross-section thereof being wider than that of the first resonance pipe, and a junction pipe connected to the other ends of the first and second resonance pipes and supplying the air to the first and second resonance pipes respectively from an intake line.
摘要翻译：可变进气系统可以包括进气流道，其分别连接到多个气缸以将流入其中的空气供应到气缸，一个气室，其一侧连接到进气流道并将空气分配到进气流道，第一共鸣管，其一端连接到增压室的另一侧以在其中供应空气;第二共振管，其一端连接到增压室的另一侧以在其中供应空气，其长度比第一谐振管短，其横截面比第一谐振管宽;以及连接管，连接到第一和第二谐振管的另一端，并将空气供应到第一和第二谐振管共振管分别来自进气管线。

66. 发明申请

US20100267225A1 Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20100267225A1
公开(公告)日：2010-10-21
申请号：US12385658
申请日：2009-04-15
申请人： Hyo-san Lee , Bo-un Yoon , Kun-tack Lee , Dae-hyuk Kang , Jeong-nam Han , Jung-jae Myung , Hyung-pyo Hong , Hun-pyo Hong
发明人： Hyo-san Lee , Bo-un Yoon , Kun-tack Lee , Dae-hyuk Kang , Jeong-nam Han , Jung-jae Myung , Hyung-pyo Hong , Hun-pyo Hong
IPC分类号： H01L21/265 , H01L21/306
CPC分类号： H01L21/31133 , G03F7/423 , H01L21/0206 , H01L21/02071
摘要： A method of manufacturing a semiconductor device, the method including forming a photoresist film on a substrate, and removing the photoresist film from the substrate using a composition that includes a sulfuric acid solution, a hydrogen peroxide solution, and a corrosion inhibitor.
摘要翻译：一种制造半导体器件的方法，所述方法包括在衬底上形成光致抗蚀剂膜，并且使用包含硫酸溶液，过氧化氢溶液和腐蚀抑制剂的组合物从衬底去除光致抗蚀剂膜。

67. 发明申请

US20100213521A1 Semiconductor devices and methods of forming semiconductor devices 有权
标题翻译：半导体器件和形成半导体器件的方法
公开(公告)号：US20100213521A1
公开(公告)日：2010-08-26
申请号：US12659111
申请日：2010-02-25
申请人： Sanghun Jeon , Jong-Hyuk Kang , Heungkyu Park , Jongwook Lee
发明人： Sanghun Jeon , Jong-Hyuk Kang , Heungkyu Park , Jongwook Lee
IPC分类号： H01L27/06
CPC分类号： H01L29/7841 , H01L27/108 , H01L27/10802
摘要： A semiconductor device includes a back bias dielectric including a negative fixed charge, a gate electrode overlapping the back bias dielectric, a semiconductor layer disposed between the gate electrode and the back bias dielectric, and a gate dielectric disposed between the semiconductor layer and the gate electrode, wherein the negative fixed charge accumulates holes at a surface of the semiconductor layer facing the back bias dielectric.
摘要翻译：半导体器件包括负偏电介质，其包括负的固定电荷，与所述背偏电介质重叠的栅电极，设置在所述栅电极和所述背偏置电介质之间的半导体层，以及设置在所述半导体层和所述栅电极之间的栅极电介质其中负固定电荷在面向背偏电介质的半导体层的表面处累积空穴。

68. 发明申请

US20100109079A1 Vertical type semiconductor device 有权
标题翻译：垂直型半导体器件
公开(公告)号：US20100109079A1
公开(公告)日：2010-05-06
申请号：US12588948
申请日：2009-11-03
申请人： Yong-Hoon Son , Jong-Wook Lee , Jong-Hyuk Kang
发明人： Yong-Hoon Son , Jong-Wook Lee , Jong-Hyuk Kang
IPC分类号： H01L29/78
CPC分类号： H01L29/7827 , H01L29/66666
摘要： A vertical pillar semiconductor device may include a substrate, a group of channel patterns, a gate insulation layer pattern and a gate electrode. The substrate may be divided into an active region and an isolation layer. A first impurity region may be formed in the substrate corresponding to the active region. The group of channel patterns may protrude from a surface of the active region and may be arranged parallel to each other. A second impurity region may be formed on an upper portion of the group of channel patterns. The gate insulation layer pattern may be formed on the substrate and a sidewall of the group of channel patterns. The gate insulation layer pattern may be spaced apart from an upper face of the group of channel patterns. The gate electrode may contact the gate insulation layer and may enclose a sidewall of the group of channel patterns.
摘要翻译：垂直柱半导体器件可以包括衬底，沟道图案组，栅极绝缘层图案和栅电极。衬底可分为有源区和隔离层。可以在对应于有源区的衬底中形成第一杂质区。通道图案组可以从有源区域的表面突出并且可以彼此平行地布置。第二杂质区可以形成在沟道图案组的上部。栅极绝缘层图案可以形成在衬底和沟道图案组的侧壁上。栅极绝缘层图案可以与沟道图案组的上表面间隔开。栅电极可以接触栅极绝缘层并且可以包围沟道图案组的侧壁。

69. 发明申请

US20100078698A1 Vertical semiconductor device, dram device including the same 审中-公开
标题翻译：垂直半导体器件，包括相同的电容器件
公开(公告)号：US20100078698A1
公开(公告)日：2010-04-01
申请号：US12585776
申请日：2009-09-24
申请人： Yong-Hoon Son , Jong-Wook Lee , Jong-Hyuk Kang
发明人： Yong-Hoon Son , Jong-Wook Lee , Jong-Hyuk Kang
IPC分类号： H01L27/06 , H01L29/78
CPC分类号： H01L27/10852 , B82Y10/00 , H01L21/823487 , H01L27/10876 , H01L29/0673 , H01L29/0676 , H01L29/66439 , H01L29/66666 , H01L29/775 , H01L29/7827
摘要： A vertical semiconductor device, a DRAM device, and associated methods, the vertical semiconductor device including single crystalline active bodies vertically disposed on an upper surface of a single crystalline substrate, each of the single crystalline active bodies having a first active portion on the substrate and a second active portion on the first active portion, and the first active portion having a first width smaller than a second width of the second active portion, a gate insulating layer on a sidewall of the first active portion and the upper surface of the substrate, a gate electrode on the gate insulating layer, the gate electrode having a linear shape surrounding the active bodies, a first impurity region in the upper surface of the substrate under the active bodies, and a second impurity region in the second active portion.
摘要翻译：垂直半导体器件，DRAM器件和相关方法，垂直半导体器件包括垂直设置在单晶衬底的上表面上的单晶有源体，每个单晶有源体在衬底上具有第一有源部分，所述第一有源部分的第二有源部分和所述第一有源部分具有小于所述第二有源部分的第二宽度的第一宽度，所述第一有源部分的侧壁和所述衬底的上表面上的栅极绝缘层，所述栅电极在所述栅极绝缘层上，所述栅电极具有围绕所述有源体的直线形状，所述基板的所述有源体下方的上表面中的第一杂质区域和所述第二有源部分中的第二杂质区域。

70. 发明申请

US20090242966A1 Vertical-type semiconductor devices 有权
标题翻译：垂直型半导体器件
公开(公告)号：US20090242966A1
公开(公告)日：2009-10-01
申请号：US12380565
申请日：2009-02-27
申请人： Yong-Hoon Son , Jong-Wook Lee , Jong-Hyuk Kang
发明人： Yong-Hoon Son , Jong-Wook Lee , Jong-Hyuk Kang
IPC分类号： H01L29/792
CPC分类号： H01L27/11582 , H01L21/02524 , H01L21/02587 , H01L21/02598 , H01L21/02675 , H01L21/28282 , H01L21/28518 , H01L21/30604 , H01L21/32133 , H01L27/1052 , H01L27/11568 , H01L27/11578 , H01L27/1158 , H01L29/4234 , H01L29/45 , H01L29/665 , H01L29/66666 , H01L29/66787 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： In a vertical-type memory device and a method of manufacturing the vertical-type memory device, the vertical memory device includes an insulation layer pattern of a linear shape provided on a substrate, pillar-shaped single-crystalline semiconductor patterns provided on both sidewalls of the insulation layer pattern and transistors provided on a sidewall of each of the single-crystalline semiconductor patterns. The transistors are arranged in a vertical direction of the single-crystalline semiconductor pattern, and thus the memory device may be highly integrated.
摘要翻译：在垂直型存储器件和垂直型存储器件的制造方法中，垂直存储器件包括设置在衬底上的线状绝缘层图形，柱状单晶半导体图案设置在两侧壁上设置在每个单晶半导体图案的侧壁上的绝缘层图案和晶体管。晶体管沿着单晶半导体图案的垂直方向排列，因此存储器件可以高度集成。

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