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1. 发明授权

US10002963B2 Semiconductor device 有权
公开(公告)号：US10002963B2
公开(公告)日：2018-06-19
申请号：US15672543
申请日：2017-08-09
申请人： Unisantis Electronics Singapore Pte. Ltd.
发明人： Fujio Masuoka , Hiroki Nakamura
IPC分类号： H01L29/78 , H01L21/3205 , H01L21/02 , H01L21/283 , H01L21/306 , H01L21/31 , H01L21/311 , H01L29/16 , H01L21/3213 , H01L29/423 , H01L29/66 , H01L29/06
CPC分类号： H01L29/7827 , H01L21/02524 , H01L21/02587 , H01L21/283 , H01L21/30604 , H01L21/31 , H01L21/31111 , H01L21/32051 , H01L21/32133 , H01L29/0657 , H01L29/16 , H01L29/42356 , H01L29/66666 , H01L29/7828
摘要： A semiconductor device includes a fin-shaped semiconductor layer, a first insulating film around the fin-shaped semiconductor layer, and a first metal film around the first insulating film. A pillar-shaped semiconductor layer is on the fin-shaped semiconductor layer, and a gate insulating film is around the pillar-shaped semiconductor layer. A gate electrode is around the gate insulating film and is made of a third metal. A gate line is connected to the gate electrode, and an upper portion of the fin-shaped semiconductor layer and the first metal film are electrically connected to each other.

2. 发明申请

US20170236714A1 Method for Removing Crystal Originated Particles from a Crystalline Silicon Body Using an Etch Process 审中-公开
公开(公告)号：US20170236714A1
公开(公告)日：2017-08-17
申请号：US15584141
申请日：2017-05-02
申请人： Infineon Technologies AG
发明人： Hans-Joachim Schulze , Peter Irsigler
IPC分类号： H01L21/225 , H01L21/265 , H01L21/324 , H01L21/02
CPC分类号： H01L21/2257 , H01L21/02238 , H01L21/02524 , H01L21/0257 , H01L21/02595 , H01L21/02636 , H01L21/2605 , H01L21/263 , H01L21/26513 , H01L21/268 , H01L21/30604 , H01L21/31105 , H01L21/3221 , H01L21/324 , H01L29/0623
摘要： A method for removing crystal originated particles from a crystalline silicon body having opposite first and second surfaces includes: increasing a surface area of at least one of the first and second surfaces by an etch process; and oxidizing the increased surface area at a temperature of at least 1000° C. and for a duration of at least 20 minutes.

3. 发明授权

US09564317B1 Method of forming a nanowire 有权
标题翻译：形成纳米线的方法
公开(公告)号：US09564317B1
公开(公告)日：2017-02-07
申请号：US14957312
申请日：2015-12-02
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yee-Chia Yeo , Blandine Duriez , Martin Christopher Holland
IPC分类号： H01L21/4763 , H01L21/02 , H01L21/768
CPC分类号： H01L21/02603 , H01L21/02381 , H01L21/02433 , H01L21/02524 , H01L21/02538 , H01L21/02639 , H01L21/76877 , H01L29/0676
摘要： A method of fabricating a semiconductor device is disclosed. The method includes forming a first material layer over a substrate. The first material layer has a sidewall defining a first opening, wherein the first opening has a first shape. The method also includes forming a sacrificial feature within the first opening and the sacrificial feature has a second shape, which is different than the first shape such that there is a cavity between an edge of the sacrificial feature and the sidewall of the first material layer. The method also includes filling in cavity with a second material layer, removing the sacrificial feature to form a second opening, filling in the second opening with a third material layer, removing the second material layer to reveal the cavity and forming a conductive feature within the cavity.
摘要翻译：公开了制造半导体器件的方法。该方法包括在衬底上形成第一材料层。第一材料层具有限定第一开口的侧壁，其中第一开口具有第一形状。该方法还包括在第一开口内形成牺牲特征，并且牺牲特征具有不同于第一形状的第二形状，使得在牺牲特征的边缘和第一材料层的侧壁之间存在空腔。该方法还包括用第二材料层填充空腔，去除牺牲特征以形成第二开口，用第三材料层填充在第二开口中，去除第二材料层以露出空腔并在其内形成导电特征腔。

4. 发明授权

US09484209B1 Flexible and stretchable sensors formed by patterned spalling 有权
标题翻译：通过图案化剥落形成的柔性和可拉伸传感器
公开(公告)号：US09484209B1
公开(公告)日：2016-11-01
申请号：US14947113
申请日：2015-11-20
申请人： International Business Machines Corporation
发明人： Stephen W. Bedell , Shu-Jen Han , Ning Li , Devendra K. Sadana
IPC分类号： H01L21/00 , H01L21/304 , H01L23/00 , H01L29/06 , H01L27/02 , H01L21/02
CPC分类号： G01N27/04 , A61B2562/164 , H01L21/02524 , H01L24/83 , H01L27/0288 , H01L27/0802 , H01L28/20 , H01L41/18
摘要： A material removal process referred to as spalling is used to provide flexible and stretchable sensors that can be used for healthcare monitoring, bio-medical devices, wearable electronic devices, artificial skin, large area sensing, etc. The flexible and stretchable sensors of the present application have high sensitivity that is comparable to that of a bulk silicon sensor. The flexible and stretchable sensors comprise single crystalline spring-like structures that couple various resistor structures together.
摘要翻译：使用称为剥落的材料去除过程来提供可用于医疗监护，生物医疗装置，可穿戴电子装置，人造皮肤，大面积感测等的柔性和可拉伸传感器。本发明的柔性和可拉伸的传感器应用具有与体硅传感器相当的高灵敏度。柔性和可拉伸传感器包括将各种电阻器结构耦合在一起的单晶弹簧状结构。

5. 发明申请

US20150325649A1 Nanowires and Methods of Forming 审中-公开
标题翻译：纳米线和成型方法
公开(公告)号：US20150325649A1
公开(公告)日：2015-11-12
申请号：US14708961
申请日：2015-05-11
申请人： Brookhaven Science Associates, LLC
发明人： Mingzhao Liu , Chang-Yong Nam
IPC分类号： H01L29/06 , H01L29/12 , H01L21/02
CPC分类号： H01L29/12 , B82Y10/00 , B82Y40/00 , C23C14/185 , C30B23/04 , C30B29/02 , C30B29/60 , H01L21/02381 , H01L21/02422 , H01L21/02491 , H01L21/02499 , H01L21/02513 , H01L21/02521 , H01L21/02524 , H01L21/02535 , H01L21/02538 , H01L21/02603 , H01L21/0262 , H01L21/02631 , H01L29/06 , H01L29/0676 , H01L29/125
摘要： An array of out-of-plane, nanowires may be formed spontaneously when a material is deposited over a freshly sputter-deposited porous film under high vacuum. The nanowires may be formed without an apparent catalyst. It is the nanoporous structure of the sputter-deposited porous film that confines the size of permeated material domains during its vapor deposition, which may cause a certain surface-to-volume ratio and subsequent melting point reduction, rendering the domains of the material molten or partially molten at room temperature. The release of surface energy provides a force for the domains to diffuse and to eventually erupt from the porous thin film and may form nanowires. Due to the universality of higher surface energy for nanoparticles, the present nanowires may be applicable for scalable growth of one-dimensional nanostructures of various other materials with moderate melting points. Furthermore, the absence of a catalyst in this method may eliminate the unwanted but inevitable diffusion of catalyst atoms into the nanostructures, thus allowing a route for the growth of nanostructure of higher purity and better controlled properties.
摘要翻译：当在高真空下将材料沉积在新近溅射沉积的多孔膜上时，可以自发地形成平面外的纳米线阵列。纳米线可以没有表观催化剂而形成。溅射沉积的多孔膜的纳米多孔结构在其气相沉积期间限制渗透材料畴的尺寸，这可能导致一定的表面 - 体积比和随后的熔点降低，使得材料的区域熔化或在室温下部分熔融。表面能的释放为结构域扩散并最终从多孔薄膜中喷出并形成纳米线提供了力。由于纳米颗粒具有更高的表面能的普遍性，本纳米线可适用于具有中等熔点的各种其他材料的一维纳米结构的可扩展生长。此外，在该方法中不存在催化剂可以消除催化剂原子进入纳米结构的不必要但不可避免的扩散，从而允许用于生长更高纯度和更好控制性质的纳米结构的生长途径。

6. 发明申请

US20150303247A1 METHOD FOR FABRICATING A STRUCTURE 有权
标题翻译：制作结构的方法
公开(公告)号：US20150303247A1
公开(公告)日：2015-10-22
申请号：US14646642
申请日：2013-12-02
申请人： Soitec
发明人： Alexandre Chibko , Isabelle Bertrand , Sylvain Peru , Sothachett Van , Patrick Reynaud
IPC分类号： H01L29/04 , H01L29/16 , H01L21/324 , H01L21/02
CPC分类号： H01L29/04 , H01L21/02263 , H01L21/02524 , H01L21/0262 , H01L21/02664 , H01L21/26506 , H01L21/324 , H01L21/76254 , H01L29/16
摘要： This method for fabricating a structure comprising, in succession, a support substrate, a dielectric layer, an active layer, a separator layer of polycrystalline silicon, comprising the steps of: a) providing a donor substrate, b) forming an embrittlement area in the donor substrate, c) providing the support structure, d) forming the separator layer on the support substrate, e) forming the dielectric layer, f) assembling the donor substrate and the support substrate, g) fracturing the donor substrate along the embrittlement area, h) subjecting the structure to a strengthening annealing of at least 10 minutes, the fabrication method being noteworthy in that step d) is executed in such a way that the polycrystalline silicon of the separator layer exhibits an entirely random grain orientation, and in that the strengthening annealing is executed at a temperature strictly greater than 950° C. and less than 1200° C.
摘要翻译：用于制造结构的方法包括依次包括支撑衬底，电介质层，有源层，多晶硅隔板层，其包括以下步骤：a）提供施主衬底，b）在所述衬底中形成脆化区域供体衬底，c）提供支撑结构，d）在支撑衬底上形成隔离层，e）形成电介质层，f）组装供体衬底和支撑衬底，g）沿着脆化区域压裂供体衬底， h）对结构进行至少10分钟的强化退火，在步骤d）中制造方法值得注意的是，隔板层的多晶硅呈现完全随机的晶粒取向，强化退火在严格高于950℃且小于1200℃的温度下进行。

7. 发明申请

US20150270130A1 Method for Removing Crystal Originated Particles from a Crystalline Silicon Body 有权
标题翻译：从晶体硅体去除晶体起始粒子的方法
公开(公告)号：US20150270130A1
公开(公告)日：2015-09-24
申请号：US14217913
申请日：2014-03-18
申请人： Infineon Technologies AG
发明人： Hans-Joachim Schulze , Peter Irsigler
IPC分类号： H01L21/225 , H01L21/311 , H01L21/26 , H01L21/265 , H01L21/268 , H01L21/306 , H01L21/02 , H01L21/324
CPC分类号： H01L21/2257 , H01L21/02238 , H01L21/02524 , H01L21/0257 , H01L21/02595 , H01L21/02636 , H01L21/2605 , H01L21/263 , H01L21/26513 , H01L21/268 , H01L21/30604 , H01L21/31105 , H01L21/3221 , H01L21/324 , H01L29/0623
摘要： A method for removing crystal originated particles from a crystalline silicon body having opposite first and second surfaces includes increasing a surface area of at least one of the first and second surfaces. The method further includes oxidizing the increased surface area at a temperature of at least 1000° C. and for a duration of at least 20 minutes.
摘要翻译：从具有相反的第一和第二表面的晶体硅体去除晶体起始粒子的方法包括增加第一和第二表面中的至少一个的表面积。该方法还包括在至少1000℃的温度下氧化增加的表面积并持续至少20分钟的持续时间。

8. 发明授权

US09070581B2 Vertical-type semiconductor devices and methods of manufacturing the same 有权
标题翻译：垂直型半导体器件及其制造方法
公开(公告)号：US09070581B2
公开(公告)日：2015-06-30
申请号：US14083971
申请日：2013-11-19
申请人： Samsung Electronics Co., Ltd.
发明人： Yong-Hoon Son , Jong-Wook Lee , Jong-Hyuk Kang
IPC分类号： H01L21/336 , H01L27/105 , H01L27/115 , H01L29/66 , H01L29/792
CPC分类号： H01L27/11582 , H01L21/02524 , H01L21/02587 , H01L21/02598 , H01L21/02675 , H01L21/28282 , H01L21/28518 , H01L21/30604 , H01L21/32133 , H01L27/1052 , H01L27/11568 , H01L27/11578 , H01L27/1158 , H01L29/4234 , H01L29/45 , H01L29/665 , H01L29/66666 , H01L29/66787 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： In a vertical-type memory device and a method of manufacturing the vertical-type memory device, the vertical memory device includes an insulation layer pattern of a linear shape provided on a substrate, pillar-shaped single-crystalline semiconductor patterns provided on both sidewalls of the insulation layer pattern and transistors provided on a sidewall of each of the single-crystalline semiconductor patterns. The transistors are arranged in a vertical direction of the single-crystalline semiconductor pattern, and thus the memory device may be highly integrated.
摘要翻译：在垂直型存储器件和垂直型存储器件的制造方法中，垂直存储器件包括设置在衬底上的线状绝缘层图形，柱状单晶半导体图案设置在两侧壁上设置在每个单晶半导体图案的侧壁上的绝缘层图案和晶体管。晶体管沿着单晶半导体图案的垂直方向排列，因此存储器件可以高度集成。

9. 发明申请

US20150170902A1 PLASMA-ASSISTED CHEMICAL GAS SEPARATION METHOD HAVING INCREASED PLASMA DENSITY AND DEVICE FOR IMPLEMENTING THE METHOD 有权
标题翻译：具有提高等离子体密度的等离子体辅助化学气体分离方法和用于实施方法的装置
公开(公告)号：US20150170902A1
公开(公告)日：2015-06-18
申请号：US14406258
申请日：2013-05-08
申请人： FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
发明人： Jacob Reynvaan , Johannes Grünwald
IPC分类号： H01L21/02 , C23C16/50 , H01L21/67
CPC分类号： H01L21/0262 , C23C16/27 , C23C16/277 , C23C16/483 , C23C16/50 , C23C16/517 , H01J37/32532 , H01L21/02521 , H01L21/02524 , H01L21/02529 , H01L21/67011
摘要： The invention relates to a method and a device for coating surfaces of a substrate (8) according to the technique of plasma-assisted chemical vapor deposition. The basic idea of the present invention is to increase the ion concentration prevailing in the plasma so as to have more ions accumulate on the substrate (8) and to promote layer growth (12). According to the invention, the ion concentration is increased by forming a so-called fireball at the surface of the substrate (8) to be coated. The term fireball refers to the ionization processes that occur on electrode surfaces (2) as spontaneous small brightly luminescent phenomena in plasma processes. To this end, an electrode (2) is introduced into an existing background plasma and connected to a positive potential (4).
摘要翻译：本发明涉及根据等离子体辅助化学气相沉积技术涂覆基片（8）表面的方法和装置。本发明的基本思想是增加等离子体中存在的离子浓度，使得在衬底（8）上积聚更多的离子并促进层生长（12）。根据本发明，通过在被涂覆的基板（8）的表面形成所谓的火球，来提高离子浓度。术语火球是指在电极表面（2）上发生的电离过程作为等离子体工艺中的自发的小亮度发光现象。为此，将电极（2）引入现有的背景等离子体并连接到正电位（4）。

10. 发明申请

US20150140333A1 POROUS SUBSTRATES, ARTICLES, SYSTEMS AND COMPOSITIONS COMPRISING NANOFIBERS AND METHODS OF THEIR USE AND PRODUCTION 审中-公开
标题翻译：包含纳米纤维的多孔基材，制品，系统和组合物及其使用和生产方法
公开(公告)号：US20150140333A1
公开(公告)日：2015-05-21
申请号：US14506591
申请日：2014-10-03
申请人： OneD Material LLC
发明人： Chunming NIU
IPC分类号： B01J37/02 , B01J23/52 , B01J23/42 , H01L21/02 , B01J35/00 , H01B1/00 , H01B1/04 , B01J21/18 , B01J35/02
CPC分类号： B01J37/0221 , B01D39/083 , B01D39/086 , B01D39/2065 , B01D2239/0208 , B01D2239/0216 , B01D2239/025 , B01D2239/0407 , B01D2239/0421 , B01D2239/0428 , B01D2239/0492 , B01D2239/064 , B01D2239/065 , B01D2239/0654 , B01D2239/10 , B01D2239/1216 , B01D2239/1225 , B01J21/18 , B01J23/42 , B01J23/52 , B01J35/0013 , B01J35/026 , B82Y30/00 , D06M11/44 , D06M11/45 , D06M11/46 , D06M11/49 , D06M11/83 , G01N30/52 , H01B1/00 , H01B1/04 , H01L21/02164 , H01L21/0237 , H01L21/02524 , H01L21/02532 , H01L21/02538 , H01L21/02551 , H01L21/02603 , H01L21/02606 , H01L21/0262 , H01L21/02639 , H01L21/02645 , H01L21/02653 , H01L21/02664 , Y10T428/2991
摘要： Porous and/or curved nanofiber bearing substrate materials are provided having enhanced surface area for a variety of applications including as electrical substrates, semipermeable membranes and barriers, structural lattices for tissue culturing and for composite materials, production of long unbranched nanofibers, and the like. A method of producing nanofibers is disclosed including providing a plurality of microparticles or nanoparticles such as carbon black particles having a catalyst material deposited thereon, and synthesizing a plurality of nanofibers from the catalyst material on the microparticles or nanoparticles. Compositions including carbon black particles having nanowires deposited thereon are further disclosed.
摘要翻译：提供了多孔和/或弯曲的纳米纤维轴承基材，其具有用于各种应用的增强的表面积，包括作为电基底，半透膜和屏障，用于组织培养的结构晶格和用于复合材料的结构晶格，长非支化纳米纤维的生产等。公开了一种制造纳米纤维的方法，其包括提供多个微粒或纳米颗粒，例如其上沉积有催化剂材料的炭黑颗粒，以及从微粒或纳米颗粒上的催化剂材料合成多个纳米纤维。还公开了包含其上沉积有纳米线的炭黑颗粒的组合物。

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