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    • 27. 发明授权
    • Method of manufacturing a capacitor with a bi-layer Ta2O5 capacitor dielectric in a semiconductor device including performing a plasma treatment on the first Ta2O5 layer
    • 在半导体器件中制造具有双层Ta 2 O 5电容器电介质的电容器的方法,包括对第一Ta 2 O 5层进行等离子体处理
    • US06355516B1
    • 2002-03-12
    • US09606411
    • 2000-06-29
    • You Sung KimKyong Min KimChang Seo ParkHan Sang SongKi Seon ParkChan Lim
    • You Sung KimKyong Min KimChang Seo ParkHan Sang SongKi Seon ParkChan Lim
    • H01L218242
    • H01L21/31604H01L21/28568H01L28/56Y10S438/957
    • There is disclosed a method of manufacturing a capacitor in a semiconductor device capable of effectively removing the organic impurity of a Ta2O5 film by performing an in-situ plasma process using the mixture gas of nitrogen and oxygen during the process of forming the Ta2O5 film as the dielectric film of the capacitor. Thus, it can reduce the impurity of the Ta2O5 film to increase the supply of oxygen, and thus can improve the dielectric and leak current characteristic of the Ta2O5 film. Further, it can prohibit oxidization of the underlying electrode, thus reducing the thickness of the equivalent oxide film of the capacitor as possible and sufficiently securing the capacitance of the capacitor. The method according to the present invention includes forming a polysilicon film on a semiconductor substrate in which a given underlying structure is formed; sequentially forming a first buffer layer and a metal layer on the polysilicon film to form a lower electrode; forming a Ta2O5 film on the metal layer, wherein the process of depositing the Ta2O5 film is performed by a plasma process under the mixture gas atmosphere of nitrogen and oxygen; and forming a second buffer layer and an upper electrode on the Ta2O5 film.
    • 公开了一种在半导体器件中制造电容器的方法,其能够通过在形成Ta 2 O 5膜的过程中使用氮和氧的混合气体进行原位等离子体处理来有效地除去Ta 2 O 5膜的有机杂质,作为 电容器的介质膜。 因此,可以减少Ta2O5薄膜的杂质,增加氧气供应,从而可以提高Ta2O5薄膜的介电和漏电流特性。 此外,它可以禁止底层电极的氧化,从而尽可能地减小电容器的等效氧化膜的厚度,并充分确保电容器的电容。 根据本发明的方法包括在其中形成给定的底层结构的半导体衬底上形成多晶硅膜; 在多晶硅膜上依次形成第一缓冲层和金属层,形成下电极; 在金属层上形成Ta2O5膜,其中在氮和氧的混合气体气氛下通过等离子体工艺进行沉积Ta2O5膜的工艺; 并在Ta 2 O 5膜上形成第二缓冲层和上电极。
    • 28. 发明授权
    • Method of manufacturing a capacitor in a semiconductor device
    • 在半导体器件中制造电容器的方法
    • US06303427B1
    • 2001-10-16
    • US09659508
    • 2000-09-11
    • Han Sang SongYou Sung KimChan LimChang Seo ParkKyong Min Kim
    • Han Sang SongYou Sung KimChan LimChang Seo ParkKyong Min Kim
    • H01L21336
    • H01L28/40H01L21/31604H01L28/56H01L28/60
    • The present invention relates to a method of manufacturing a capacitor in a semiconductor device. It is designed to solve the problem due to oxidization of the surface of the underlying tungsten electrode during thermal process performed after depositing Ta2O5 to form a dielectric film in a Ta2O5 capacitor of a MIM (Metal Insulator Metal) structure using tungsten (W) as an underlying electrode. Thus, the present invention includes forming a good thin WO3 film by processing the surface of the underlying tungsten electrode by low oxidization process before forming a Ta2O5 dielectric film and then performing deposition and thermal process of Ta2O5 to form a Ta2O5 dielectric film. As a good WO3 film is formed on the surface of the underlying tungsten electrode before forming a Ta2O5 dielectric film, the grain boundary of the tungsten film is filled with oxygen atoms, thus preventing diffusion of oxygen atoms from the Ta2O5 dielectric film during a subsequent thermal process. Also, as a further oxidization of the surface of the underlying tungsten electrode by the WO3 film could be prevented, thereby improving the characteristic of the leak current of the Ta2O5 capacitor.
    • 本发明涉及一种在半导体器件中制造电容器的方法。 其设计用于解决在沉积Ta 2 O 5之后进行的热处理期间底层钨电极的表面的氧化的问题,以在使用钨(W)作为(W)的MIM(金属绝缘体金属)结构的MIM(金属绝缘体金属)结构的Ta 2 O 5电容器中形成介电膜 底层电极。 因此,本发明包括通过在形成Ta 2 O 5介电膜之前通过低氧化处理来处理下面的钨电极的表面,然后进行Ta 2 O 5的沉积和热处理以形成Ta 2 O 5电介质膜来形成良好的薄WO 3膜。 由于在形成Ta 2 O 5电介质膜之前在下面的钨电极的表面上形成良好的WO 3膜,所以钨膜的晶界被氧原子填充,从而防止在随后的热过程中氧原子从Ta 2 O 5介电膜扩散 处理。 此外,通过WO 3膜可以防止下层钨电极的表面的进一步氧化,从而提高Ta2O5电容器的漏电流的特性。
    • 29. 发明授权
    • Method of manufacturing a semiconductor device capable of reducing
contact resistance
    • 制造能够降低接触电阻的半导体器件的方法
    • US6114241A
    • 2000-09-05
    • US338525
    • 1999-06-23
    • Hyung Bok ChoiChang Seo ParkHyeon Soo Kim
    • Hyung Bok ChoiChang Seo ParkHyeon Soo Kim
    • H01L21/768H01L21/44
    • H01L21/76814
    • The present invention relates to a method of manufacturing a semiconductor device, which is capable of effectively removing a WO.sub.3 film generated on a tungsten silicide during contact hole etch that opens a gate electrode including the tungsten silicide as its top film by selectively etching a interlayer insulating film. The WO.sub.3 film is removed by a washing process using an alkaline solution such as TMAH(tetra-methyl-ammonium-hydroxide) or NH.sub.4 OH solution. The effective removal of the WO.sub.3 film reduces the contact resistance between a conductive material layer to be formed in he contact hole by a later process and the gate electrode, thereby improving the operative characteristics of the semiconductor device. TMAH solution used in the washing process has a high selectivity of WO.sub.3 film relative to a thermal oxide film or a BPSG film that is generally used as the interlayer insulating film. Thus, the present invention is capable of minimizing the damage of the side parts of the interlayer insulating film during the washing process after contact etching.
    • 本发明涉及一种制造半导体器件的方法,该方法能够有效地除去在接触孔蚀刻期间在硅化钨上产生的WO 3膜,其通过选择性地蚀刻层间绝缘体来打开包括硅化钨作为其顶部膜的栅电极 电影。 通过使用碱性溶液如TMAH(四甲基氢氧化铵)或NH 4 OH溶液的洗涤方法除去WO 3膜。 WO3膜的有效去除通过后续工艺在接触孔中形成的导电材料层与栅电极之间的接触电阻降低,从而提高半导体器件的操作特性。 在洗涤过程中使用的TMAH溶液相对于通常用作层间绝缘膜的热氧化膜或BPSG膜具有高选择性的WO 3膜。 因此,本发明能够最小化接触蚀刻后的洗涤工序中的层间绝缘膜的侧面部分的损伤。
    • 30. 发明申请
    • REPLACEMENT METAL GATE SEMICONDUCTOR DEVICE FORMATION USING LOW RESISTIVITY METALS
    • 使用低电阻金属替代金属栅极半导体器件形成
    • US20140065811A1
    • 2014-03-06
    • US13603726
    • 2012-09-05
    • Chang Seo ParkVimal K. Kamineni
    • Chang Seo ParkVimal K. Kamineni
    • H01L29/40
    • H01L29/401H01L29/66545H01L29/66795
    • Embodiments of the present invention relate to approaches for forming RMG FinFET semiconductor devices using a low-resistivity metal (e.g., W) as an alternate gap fill metal. Specifically, the semiconductor will typically comprise a set (e.g., one or more) of dielectric stacks formed over a substrate to create one or more trenches/channels (e.g., short/narrow and/or long/wide trenches/channels). A work function layer (e.g., TiN) will be provided over the substrate (e.g., in and around the trenches). A low-resistivity metal gate layer (e.g., W) may then be deposited (e.g., via chemical vapor deposition) and polished (e.g., via chemical-mechanical polishing). Thereafter, the gate metal layer and the work function layer may be etched after the polishing to provide a trench having the etched gate metal layer over the etched work function layer along a bottom surface thereof.
    • 本发明的实施例涉及使用低电阻率金属(例如W)作为替代间隙填充金属形成RMG FinFET半导体器件的方法。 具体地,半导体通常将包括形成在衬底上以形成一个或多个沟槽(例如,短/窄和/或长/宽沟槽/沟道)的一组(例如,一个或多个)电介质叠层。 工作功能层(例如,TiN)将被提供在衬底上(例如,在沟槽中和周围)。 然后可以沉积低电阻金属栅极层(例如,W)(例如通过化学气相沉积)并抛光(例如,经由化学机械抛光)。 此后,可以在抛光之后蚀刻栅极金属层和功函数层,以沿着其底表面在蚀刻的功函数层上方提供具有蚀刻的栅极金属层的沟槽。