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11. 发明授权

US6091824A Reduced-memory early reflection and reverberation simulator and method 失效
标题翻译：减少记忆早期反射和混响模拟器和方法
公开(公告)号：US6091824A
公开(公告)日：2000-07-18
申请号：US938813
申请日：1997-09-26
申请人： Kun Lin , James Martin Nohrden
发明人： Kun Lin , James Martin Nohrden
IPC分类号： G10H1/00 , G10K15/12 , H03G3/00
CPC分类号： G10K15/12 , G10H1/0091 , G10H2210/285 , G10H2250/115 , G10H2250/531 , G10H2250/611 , G10H2250/621
摘要： Early reflection and reverberation processing using a decimating filter simulates the high frequency attenuation of an actual physical and acoustical environment and advantageously reduces the memory storage and computational burden of the early reflection and reverberation processing method. A method of generating a reverberation effect in a sound signal includes decimating the sound signal in the sound signal path and forming an early reflection sound signal from the decimated sound signal. The early reflection sound signal has a reduced sample rate an attenuated high frequency components in comparison to the sound signal. The method further includes decimating the early reflection sound signal, recirculating the decimated early reflection sound signal in a plurality of iterations with a delay and a gain imposed between the iterations to form a reverberated sound signal, interpolating the early reflection sound signal and the reverberated sound signal, and accumulating the reverberated sound signal, the early reflection sound signal, and the sound signal to form a reflection and reverberation-enhanced sound signal. An audio signal processor processes a sound signal supplied to a sound signal path. The audio signal processor includes an early reflection processor connected to the sound signal path to receive the sound signal and simulate an early reflection signal, a reverberator connected to the early reflection processor to receive the early reflection signal and simulate a reverberation signal, and a summer connected to the sound signal path, the early reflection processor, and the reverberator. The early reflection processor and reverberator include a decimator for decimating the incoming signal.
摘要翻译：使用抽取滤波器的早期反射和混响处理模拟实际物理和声学环境的高频衰减，有利地降低了早期反射和混响处理方法的存储器存储和计算负担。在声音信号中产生混响效果的方法包括对声音信号路径中的声音信号进行抽取，并从抽取的声音信号形成早期的反射声音信号。与声音信号相比，早期反射声音信号具有降低的采样率，衰减的高频分量。该方法还包括对早期反射声音信号进行抽取，将多次迭代中的抽取的早期反射声音信号以延迟和施加在迭代之间的增益进行再循环以形成混响的声音信号，内插早期反射声音信号和混响声音信号，并累积混响的声音信号，早期反射声音信号和声音信号，以形成反射和混响增强的声音信号。音频信号处理器处理提供给声音信号路径的声音信号。音频信号处理器包括连接到声音信号路径以接收声音信号并模拟早期反射信号的早期反射处理器，连接到早期反射处理器以接收早期反射信号并模拟混响信号的混响器，以及夏季连接到声音信号路径，早期反射处理器和混响器。早期反射处理器和混响器包括用于抽取输入信号的抽取器。

12. 发明授权

US6058066A Enhanced register array accessible by both a system microprocessor and a wavetable audio synthesizer 有权
标题翻译：增强的寄存器阵列可由系统微处理器和波形音频合成器访问
公开(公告)号：US6058066A
公开(公告)日：2000-05-02
申请号：US160992
申请日：1998-09-25
申请人： David E. Norris , Larry D. Hewitt , Jeffrey M. Blumenthal
发明人： David E. Norris , Larry D. Hewitt , Jeffrey M. Blumenthal
IPC分类号： G06F3/16 , G06F7/02 , G06F9/38 , G10H1/00 , G10H1/12 , G10H7/00 , G10H7/02 , H03K23/68 , H03M3/02 , H03M7/32 , G11C8/00
CPC分类号： H03K23/68 , G06F3/162 , G06F7/026 , G06F9/3869 , G10H1/0066 , G10H1/125 , G10H7/002 , G10H7/02 , G10H2220/315 , G10H2230/035 , G10H2240/311 , G10H2250/191 , G10H2250/545 , G10H2250/571 , G10H2250/605 , G10H2250/611
摘要： A register array accessible by both a system microprocessor and a digital signal processor of a PC audio circuit, comprising: (i) a random access memory (RAM) having a first port connected to a digital signal processor input/output port, and a second port connected to a RAM input/output port; (ii) a register data port connected to the RAM input/output port and having a connection to a register data bus; (iii) timing circuitry for timing the register array operations; (iv) row and column select circuitry for respectively selecting rows and columns in said RAM; and (v) an input/output channel ready signal line connected to said timing circuitry. The RAM includes a plurality of edge bits each of which stores a value indicating whether processing of a row of data values stored in said RAM is active or inactive. The system microprocessor is disabled from accessing the RAM whenever the RAM is not idle or the microprocessor seeks to access a row of the RAM currently subject to access by the digital signal processor. If the microprocessor is disabled from writing data to the RAM, the data may be temporarily stored in the register data port until the microprocessor's access is enabled.
摘要翻译：一种可由PC音频电路的系统微处理器和数字信号处理器访问的寄存器阵列，包括：（i）具有连接到数字信号处理器输入/输出端口的第一端口的随机存取存储器（RAM），以及第二端口连接到RAM输入/输出端口; （ii）连接到RAM输入/输出端口并具有到寄存器数据总线的连接的寄存器数据端口; （iii）用于定时寄存器阵列操作的定时电路; （iv）用于分别在所述RAM中选择行和列的行和列选择电路; 和（v）连接到所述定时电路的输入/输出通道就绪信号线。 RAM包括多个边沿位，每个边沿位存储指示存储在所述RAM中的一行数据值的处理是处于活动还是非活动状态的值。当RAM不空闲或微处理器寻求访问当前受数字信号处理器访问的RAM的一行时，系统微处理器被禁止访问RAM。如果微处理器禁止向RAM写入数据，则数据可能会临时存储在寄存器数据端口中，直到微处理器的访问被使能为止。

13. 发明授权

US5794021A Variable frequency clock generation circuit using aperiodic patterns 失效
标题翻译：可变频时钟发生电路采用非周期性模式
公开(公告)号：US5794021A
公开(公告)日：1998-08-11
申请号：US483619
申请日：1995-06-07
申请人： Larry D. Hewitt
发明人： Larry D. Hewitt
IPC分类号： G06F3/16 , G06F7/02 , G06F9/38 , G10H1/00 , G10H1/12 , G10H7/00 , G10H7/02 , H03K23/68 , H03M3/02 , H03M7/32 , G06F1/08
CPC分类号： G06F3/16 , G06F7/026 , G06F9/3869 , G10H1/0066 , G10H1/125 , G10H7/002 , G10H7/02 , H03K23/68 , G10H2220/315 , G10H2230/035 , G10H2240/311 , G10H2250/191 , G10H2250/545 , G10H2250/571 , G10H2250/605 , G10H2250/611
摘要： A method and circuit for generating a selectively variable clock signal from one of 256 frequencies within a specified range from two fixed frequency oscillator source signals is provided. The method and circuitry maintain a substantially fifty-percent duty cycle in the output clock signal.
摘要翻译：提供一种用于从两个固定频率振荡器源信号的指定范围内的256个频率之一产生选择性可变时钟信号的方法和电路。该方法和电路在输出时钟信号中保持大致百分之五十的占空比。

14. 发明授权

US5789689A Tube modeling programmable digital guitar amplification system 失效
标题翻译：管造型可编程数字吉他放大系统
公开(公告)号：US5789689A
公开(公告)日：1998-08-04
申请号：US785004
申请日：1997-01-17
申请人： Michel Doidic , Michael Mecca , Marcus Ryle , Curtis Senffner
发明人： Michel Doidic , Michael Mecca , Marcus Ryle , Curtis Senffner
IPC分类号： G10H1/12 , G10H1/16 , G10H3/18 , H03F1/32 , H03G7/00 , G10H1/02 , G10H7/12 , H03F19/00 , H03M1/62
CPC分类号： G10H3/187 , G10H1/125 , G10H1/16 , H03F1/327 , H03G7/007 , G10H2210/231 , G10H2210/281 , G10H2210/311 , G10H2250/061 , G10H2250/105 , G10H2250/115 , G10H2250/545 , G10H2250/611 , H03F2200/549
摘要： An electric guitar amplifier which utilizes a digital signal processor to produce vacuum-tube-like distortion without certain unwanted audio artifacts created by previous digital realizations of nonlinear, high-gain functions. By virtue of a microprocessor-controlled digital signal processor embodiment, the invention gives the user programmable control over parameters normally associated with state of the art guitar amplifiers (e.g. tone controls, reverb controls, tremolo controls, etc.), as well as other musically useful parameters which are not normally included among the controls of a guitar amplifier (e.g. selection of preamp type, autovolume, reverberation type, autowah, etc.).
摘要翻译：一种电吉他放大器，其利用数字信号处理器产生真空管状失真，而没有由先前的非线性高增益功能的数字实现产生的某些不需要的音频伪像。凭借由微处理器控制的数字信号处理器实施例，本发明给予用户可编程控制通常与现有吉他放大器（例如音调控制，混响控制，颤音控制等）状态相关联的参数以及其它音乐吉他放大器的控制中通常不包括有用的参数（例如，前置放大器类型，自动音量，混响类型，自动瓦等的选择）。

15. 发明授权

US06272465B1 Monolithic PC audio circuit 失效
标题翻译：单片PC音频电路
公开(公告)号：US06272465B1
公开(公告)日：2001-08-07
申请号：US08934969
申请日：1997-09-22
申请人： Larry D. Hewitt , Jeffrey M. Blumenthal , Geoffrey E. Brehmer , Glen W. Brown , Carlin Dru Cabler , Ryan Feemster , David Guercio , Dale E. Gulick , Michael Hogan , Alfredo R. Linz , David Norris , Paul G. Schnizlein , Martin P. Soques , Michael E. Spak , David N. Suggs , Alan T. Torok
发明人： Larry D. Hewitt , Jeffrey M. Blumenthal , Geoffrey E. Brehmer , Glen W. Brown , Carlin Dru Cabler , Ryan Feemster , David Guercio , Dale E. Gulick , Michael Hogan , Alfredo R. Linz , David Norris , Paul G. Schnizlein , Martin P. Soques , Michael E. Spak , David N. Suggs , Alan T. Torok
IPC分类号： G10L500
CPC分类号： H03K23/68 , G06F3/162 , G06F7/026 , G06F9/3869 , G10H1/0066 , G10H1/125 , G10H7/002 , G10H7/02 , G10H2220/315 , G10H2230/035 , G10H2240/311 , G10H2250/191 , G10H2250/545 , G10H2250/571 , G10H2250/605 , G10H2250/611
摘要： A monolithic integrated circuit for providing enhanced audio performance in personal computers. The monolithic circuit includes a wavetable synthesizer; a full function stereo coding and decoding circuit including analog-to-digital and digital-to-analog conversion; data compression, and mixing and muxing of analog signals; a local memory control module for interfacing with external memory; a game-MIDI port module; a system bus interface; and a control module for compatibility and circuit control functions.
摘要翻译：用于在个人计算机中提供增强音频性能的单片集成电路。单片电路包括波形合成器; 全功能立体声编解码电路，包括模数转换和数模转换; 数据压缩，模拟信号的混合和复用; 用于与外部存储器接口的本地存储器控制模块; 一个游戏MIDI口模块; 一个系统总线接口; 以及用于兼容性和电路控制功能的控制模块。

16. 发明授权

US5744742A Parametric signal modeling musical synthesizer 失效
标题翻译：参数信号建模音乐合成器
公开(公告)号：US5744742A
公开(公告)日：1998-04-28
申请号：US808676
申请日：1997-02-28
申请人： Eric Lindemann , Jeffrey Barish
发明人： Eric Lindemann , Jeffrey Barish
IPC分类号： G10H5/00 , G10H7/10 , G10H1/00 , G10H1/12
CPC分类号： G10H5/007 , G10H7/10 , G10H2250/015 , G10H2250/071 , G10H2250/075 , G10H2250/081 , G10H2250/095 , G10H2250/101 , G10H2250/235 , G10H2250/285 , G10H2250/481 , G10H2250/545 , G10H2250/611 , Y10S84/09
摘要： A parametric signal modeling musical tone synthesizer utilizes a multidimensional filter coefficient space consisting of many sets of filter coefficients to model an instrument. These sets are smoothly interpolated over pitch, intensity, and time. The filter excitation for a particular note is derived from a collection of single period excitations, which form a multidimensional excitation space, which is also smoothly interpolated over pitch, intensity and time. The synthesizer includes effective modeling of attacks of tones, and the noise component of a tone is modelled separately from the pitched component. The input control signals may include initial pitch and intensity, or the intensity may be time-varying. A variety of instruments may be specified.
摘要翻译：参数信号建模乐音合成器利用由许多滤波器系数组成的多维滤波器系数空间来对仪器建模。这些组在音高，强度和时间上顺利插值。用于特定音符的滤波器激励源自单周期激励的集合，其形成多维激励空间，其也在音调，强度和时间上平滑地内插。合成器包括对音调的有效建模，并且音调的噪声分量与俯仰分量分开建模。输入控制信号可以包括初始音高和强度，或者强度可以是时变的。可以指定各种仪器。

17. 发明授权

US5668338A Wavetable audio synthesizer with low frequency oscillators for tremolo and vibrato effects 失效
标题翻译：具有低频振荡器的波音音频合成器，用于颤音和颤音效果
公开(公告)号：US5668338A
公开(公告)日：1997-09-16
申请号：US333564
申请日：1994-11-02
申请人： Larry D. Hewitt , David N. Suggs , David Norris
发明人： Larry D. Hewitt , David N. Suggs , David Norris
IPC分类号： G06F3/16 , G10H1/00 , G10H1/12 , G10H7/00 , H03K23/68 , G10H1/02
CPC分类号： H03K23/68 , G06F3/162 , G10H1/0066 , G10H1/125 , G10H7/002 , G10H2230/035 , G10H2240/311 , G10H2250/191 , G10H2250/545 , G10H2250/571 , G10H2250/611
摘要： A digital wavetable audio synthesizer with an LFO generator is described. The synthesizer can generate up to 32 high-quality audio digital signals or voices, including delay-based effects. The synthesizer includes an address generator which has several modes of addressing wavetable data. The address generator's addressing rate controls the pitch of the synthesizer's output signal. A synthesizer volume generator, which has several modes of controlling the volume, adds envelope, right offset, left offset, and effects volume to the data. The synthesizer LFO generator can add LFO variation to: (i) the wavetable data addressing rate, for creating a vibrato effect; and (ii) a voice's volume, for creating a tremolo effect. The LFO generator assigns two triangular-wave LFOs to each of the 32 possible voices. One LFO is dedicated to vibrato (frequency modulation) effects and the other to tremolo (amplitude modulation) effects. It is possible to ramp the depth of each LFO into and out of a programmable maximum. The parameters for each LFO are stored in local memory. When creating delay-based effects, data is stored in one of several effects accumulators. This data is then written to a wavetable. The difference between the wavetable write and read addresses for this data provides a delay for echo and reverb effects. LFO variations can be added to the read address to create chorus and flange effects.
摘要翻译：描述了具有LFO发生器的数字波表音频合成器。合成器可以生成多达32个高质量的音频数字信号或声音，包括基于延迟的效果。合成器包括地址发生器，其具有寻址波形数据的几种模式。地址发生器的寻址速率控制合成器输出信号的间距。合成器音量发生器具有多种控制音量的模式，为数据添加了包络，右偏移，左偏移和效果音量。合成器LFO发生器可以添加LFO变化：（i）波形数据寻址速率，用于产生颤音效果; 和（ii）声音的音量，用于产生颤音效果。 LFO发生器为32个可能的声音中的每一个分配两个三角波LFO。一个LFO专用于颤音（调频）效果，另一个用于颤音（振幅调制）效果。可以将每个LFO的深度倾斜到可编程最大值之外。每个LFO的参数存储在本地存储器中。当创建基于延迟的效果时，数据存储在几个效果累加器之一中。然后将此数据写入波表。该数据的波形写入和读取地址之间的差异提供了回声和混响效应的延迟。 LFO变体可以添加到读取地址以创建合唱和法兰效果。

18. 发明授权

US5659466A Monolithic PC audio circuit with enhanced digital wavetable audio synthesizer 失效
公开(公告)号：US5659466A
公开(公告)日：1997-08-19
申请号：US333536
申请日：1994-11-02
申请人： David Norris , Jeffrey M. Blumenthal , Geoffrey E. Brehmer , Glen W. Brown , Carlin Dru Cabler , Ryan Feemster , David Guercio , Dale E. Gulick , Larry D. Hewitt , Michael Hogan , Alfredo R. Linz , Paul G. Schnizlein , Martin P. Soques , Michael E. Spak , David N. Suggs , Alan T. Torok
发明人： David Norris , Jeffrey M. Blumenthal , Geoffrey E. Brehmer , Glen W. Brown , Carlin Dru Cabler , Ryan Feemster , David Guercio , Dale E. Gulick , Larry D. Hewitt , Michael Hogan , Alfredo R. Linz , Paul G. Schnizlein , Martin P. Soques , Michael E. Spak , David N. Suggs , Alan T. Torok
IPC分类号： G06F3/16 , G10H1/00 , G10H1/12 , G10H7/00 , H03K23/68
CPC分类号： H03K23/68 , G06F3/162 , G10H1/0066 , G10H1/125 , G10H7/002 , G10H2230/035 , G10H2240/311 , G10H2250/191 , G10H2250/545 , G10H2250/571 , G10H2250/611
摘要： A digital wavetable audio synthesizer is described. The synthesizer can generate up to 32 high-quality audio digital signals or voices, including delay-based effects, at either a 44.1 KHz sample rate or at sample rates compatible with a prior art wavetable synthesizer. The synthesizer includes an address generator which has several modes of addressing wavetable data. The address generator's addressing rate controls the pitch of the synthesizer's output signal. The synthesizer performs a 10-bit interpolation, using the wavetable data addressed by the address generator, to interpolate additional data samples. When the address generator loops through a block of data, the signal path interpolates between the data at the end and start addresses of the block of data to prevent discontinuities in the generated signal. A synthesizer volume generator, which has several modes of controlling the volume, adds envelope, right offset, left offset, and effects volume to the data. The data can be placed in one of sixteen fixed stereo pan positions, or left and right offsets can be programmed to place the data anywhere in the stereo field. The left and right offset values can also be programmed to control the overall volume. Zipper noise is prevented by controlling the volume increment. A synthesizer LFO generator can add LFO variation to: (i) the wavetable data addressing rate, for creating a vibrato effect; and (ii) a voice's volume, for creating a tremolo effect. Generated data to be output from the synthesizer is stored in left and right accumulators. However, when creating delay-based effects, data is stored in one of several effects accumulators. This data is then written to a wavetable. The difference between the wavetable write and read addresses for this data provides a delay for echo and reverb effects. LFO variations added to the read address create chorus and flange effects. The volume of the delay-based effects data can be attenuated to provide volume decay for an echo effect. After the delay-based effects

19. 发明授权

US5589830A Stereo audio codec 失效
标题翻译：立体声音频编解码器
公开(公告)号：US5589830A
公开(公告)日：1996-12-31
申请号：US333467
申请日：1994-11-02
申请人： Alfredo R. Linz , Carlin D. Cabler , Glen W. Brown , Martin P. Soques
发明人： Alfredo R. Linz , Carlin D. Cabler , Glen W. Brown , Martin P. Soques
IPC分类号： F02B75/02 , G06F3/16 , G10H1/00 , G10H1/12 , G10H7/00 , H03K23/68 , H03M7/32 , H03M1/00
CPC分类号： H03K23/68 , G06F3/162 , G10H1/0058 , G10H1/0066 , G10H1/125 , G10H7/002 , F02B2075/027 , G10H2230/035 , G10H2240/311 , G10H2250/115 , G10H2250/191 , G10H2250/545 , G10H2250/571 , G10H2250/611
摘要： A stereo audio CODEC, including means for performing D/A and A/D conversions, means for reducing digitally induced noise during attenuation/gain changes, data format conversion means, analog and digital filtering means, analog mixing means, on-chip 16-sample, 32-bit wide record and playback FIFOs, serial interface with external serial DSP, large local memory for supplementing on-chip record and playback FIFOs, control registers, register data bus and synthesizer DAC.
摘要翻译：立体声音频CODEC，包括用于执行D / A和A / D转换的装置，用于在衰减/增益变化期间减少数字感应噪声的装置，数据格式转换装置，模拟和数字滤波装置，模拟混合装置，片上16- 采样，32位宽记录和播放FIFO，与外部串行DSP的串行接口，用于补充片上记录和播放FIFO，控制寄存器，寄存器数据总线和合成器DAC的大型本地存储器。

20. 发明授权

US5585802A Multi-stage digital to analog conversion circuit and method 失效
标题翻译：多级数模转换电路及方法
公开(公告)号：US5585802A
公开(公告)日：1996-12-17
申请号：US333460
申请日：1994-11-02
申请人： Carlin D. Cabler , Alfredo R. Linz
发明人： Carlin D. Cabler , Alfredo R. Linz
IPC分类号： G06F3/16 , G10H1/00 , G10H1/12 , G10H7/00 , H03K23/68 , H03M3/02 , H03M1/66
CPC分类号： H03M3/504 , G06F3/162 , G10H1/0066 , G10H1/125 , G10H7/002 , H03K23/68 , G10H2230/035 , G10H2240/311 , G10H2250/191 , G10H2250/545 , G10H2250/571 , G10H2250/611 , H03M3/508
摘要： This invention is for a digital-to-analog conversion circuit (DAC) which includes an interpolation filter circuit, a noise shaper circuit and a semi-digital FIR filter circuit. The entire DAC circuit provides noise shaping, analog filtering and oversampling functions.
摘要翻译：本发明涉及一种数模转换电路（DAC），其包括内插滤波电路，噪声整形电路和半数字FIR滤波电路。整个DAC电路提供噪声整形，模拟滤波和过采样功能。

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