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11. 发明授权

US5278012A Method for producing thin film multilayer substrate, and method and apparatus for detecting circuit conductor pattern of the substrate 失效
标题翻译：薄膜多层基板的制造方法以及检测基板电路导体图案的方法和装置
公开(公告)号：US5278012A
公开(公告)日：1994-01-11
申请号：US938516
申请日：1992-09-02
申请人： Chie Yamanaka , Toshiaki Ichinose , Takanori Ninomiya , Hisafumi Iwata , Yasuo Nakagawa , Nobuyuki Akiyama
发明人： Chie Yamanaka , Toshiaki Ichinose , Takanori Ninomiya , Hisafumi Iwata , Yasuo Nakagawa , Nobuyuki Akiyama
IPC分类号： G01N21/956 , H01L21/00 , H01L21/48 , H01L21/66 , H05K3/22 , G01N21/88 , G01N21/64
CPC分类号： H01L21/67121 , G01N21/95684 , H01L21/4857 , H01L22/20 , H05K3/225 , G01N2021/8825
摘要： A method for producing a thin film multilayer substrate having a base substrate, and, which a plurality of conductor pattern layers superposed thereon through dielectric layers therebetween comprises the steps of: optically detecting the uppermost conductor pattern layer whenever the conductor pattern layer is formed on the base substrate; inspecting an absence and/or presence of a fault of the conductor pattern layer; and repairing a faulty portion in accordance with fault position data detected by the inspecting. According to this method, it is possible to enhance a production yield of relatively large size of thin film multilayer substrates which needs a relatively small amount of production at a high production cost, for mounting LSI chips thereon.
摘要翻译：一种制造具有基底基板的薄膜多层基板的方法，其中通过介电层叠置在其上的多个导体图案层之间包括以下步骤：每当在导体图案层上形成导体图案层时，光学检测最上面的导体图案层基底; 检查导体图案层的缺陷和/或存在故障; 并根据检查检测到的故障位置数据修复故障部分。根据这种方法，可以提高生产成本较高的相对大尺寸薄膜多层基板的生产成本，以便在其上安装LSI芯片。

12. 发明授权

US06539272B1 Electric device inspection method and electric device inspection system 有权
标题翻译：电气设备检查方法和电气设备检查系统
公开(公告)号：US06539272B1
公开(公告)日：2003-03-25
申请号：US09494939
申请日：2000-02-01
申请人： Makoto Ono , Hisafumi Iwata , Kazunori Nemoto
发明人： Makoto Ono , Hisafumi Iwata , Kazunori Nemoto
IPC分类号： G06F1900
CPC分类号： G01N21/956 , G01N21/47 , G01N21/94 , G01N21/9501
摘要： An analysis method includes one or more inspection steps for inspecting defects on a wafer, including an electrical inspection an step for inspecting electrical function of dies of the wafer, a determination step for determining whether each die is a good die or a bad die by using results obtained in the electrical inspection step, a calculation step for calculating the yield of dies without defects by using results obtained in the determination step, and an output step for outputting a result of the calculation step.
摘要翻译：分析方法包括检查晶片上的缺陷的一个或多个检查步骤，包括电检查用于检查晶片的管芯的电功能的步骤，用于通过使用用于确定每个管芯是否为良好管芯或坏死的确定步骤在电检查步骤中获得的结果，通过使用在确定步骤中获得的结果来计算没有缺陷的管芯的产量的计算步骤以及用于输出计算步骤的结果的输出步骤。

13. 发明授权

US5684565A Pattern detecting method, pattern detecting apparatus, projection exposing apparatus using the same and exposure system 失效
标题翻译：图案检测方法，图案检测装置，使用其的投影曝光装置和曝光系统
公开(公告)号：US5684565A
公开(公告)日：1997-11-04
申请号：US304586
申请日：1994-09-12
申请人： Yoshitada Oshida , Hisafumi Iwata , Yasuhiro Yoshitake , Minoru Yoshida , Yukihiro Shibata
发明人： Yoshitada Oshida , Hisafumi Iwata , Yasuhiro Yoshitake , Minoru Yoshida , Yukihiro Shibata
IPC分类号： G03F7/20 , G03F9/00 , H01L21/027 , G03B27/42 , G03B27/72
CPC分类号： G03F9/7065
摘要： A method and apparatus is disclosed for detecting a pattern image of each of a plurality of patterns on the surface of an object. Light emitted from either a light source including a wide wavelength or a light source including a plurality of monowavelengths is applied to the object. The object includes a layered structure having a plurality of layers, wherein at least a part of an uppermost layer of the object is optically transparent. Spectral illumination intensity characteristics of the light emitted from the light source is varied, depending on information about both the layered structure of the object, and a material of the object to obtain a desired spectral illumination intensity, and a pattern image of each of patterns is detected as either a one-dimensional or a two-dimensional image based on light reflected from the object.
摘要翻译：公开了一种用于检测物体表面上的多个图案中的每一个的图案图像的方法和装置。从包括宽波长的光源或包括多个单波长的光源发射的光被施加到物体。该物体包括具有多个层的分层结构，其中物体的最上层的至少一部分是光学透明的。根据关于物体的分层结构和物体的材料的信息，从光源发射的光的光谱照度强度特性是变化的，以获得期望的光谱照度，并且每个图案的图案图像是基于从对象反射的光被检测为一维或二维图像。

14. 发明授权

US5293538A Method and apparatus for the inspection of defects 失效
标题翻译：用于检查缺陷的方法和装置
公开(公告)号：US5293538A
公开(公告)日：1994-03-08
申请号：US705537
申请日：1991-05-24
申请人： Hisafumi Iwata , Yukio Matsuyama , Hitoshi Kubota
发明人： Hisafumi Iwata , Yukio Matsuyama , Hitoshi Kubota
IPC分类号： G01N21/88 , G01N21/95 , G01N21/956 , G01N21/47
CPC分类号： G01N21/8806 , G01N21/956 , G01N2021/8427 , G01N2021/8825
摘要： A defect inspection method and apparatus detect a defect which exists on the surface of a protection layer or a defect which exists in the protection layer and scatters the light on its surface, through the detection of the light which is derived from an illumination light and reflected on the protection layer surface and the light which is derived from a slit-formed illumination light and scattered in the area between the position where the light is incident to the transparent protection layer and the position where the surface of an element underneath the transparent protection layer is illuminated. An image process, which images two elements having the same appearance and compares the images, thereby to reduce inconsistent components emerging in portions other than a defective portion, is conducted through imaging under the bright field illumination and bright/dark field combined illumination, and the images are rendered the minimum filtering process based on 3-by-3 pixels and the defect judgement process based on comparison.
摘要翻译：缺陷检查方法和装置通过检测从照明光导出的光并检测出存在于保护层的表面上的缺陷或者存在于保护层中的缺陷并将光散射在其表面上在保护层表面上和由狭缝形成的照明光导出并散射在光入射到透明保护层的位置和透明保护层下面的元件表面之间的区域中的光被照亮。一种图像处理，其对具有相同外观的两个元件进行图像比较，从而减少在缺陷部分以外的部分中出现的不一致的成分，通过在明场照明和亮/暗场组合照明下的成像进行，并且基于3×3像素的图像被渲染为最小滤波处理，并且基于比较的缺陷判断处理。

15. 发明授权

US08428336B2 Inspecting method, inspecting system, and method for manufacturing electronic devices 有权
标题翻译：检查方法，检查系统和电子设备制造方法
公开(公告)号：US08428336B2
公开(公告)日：2013-04-23
申请号：US11431709
申请日：2006-05-11
申请人： Yoko Ikeda , Junko Konishi , Hisafumi Iwata , Yuji Takagi , Kenji Obara , Ryo Nakagaki , Seiji Isogai , Yasuhiko Ozawa
发明人： Yoko Ikeda , Junko Konishi , Hisafumi Iwata , Yuji Takagi , Kenji Obara , Ryo Nakagaki , Seiji Isogai , Yasuhiko Ozawa
IPC分类号： G06K9/00
CPC分类号： G06F3/0486 , G06F2203/04803 , G06T7/0004 , G06T2200/24 , G06T2207/30148
摘要： A method for classifying defects, including: calculating feature quantifies of defect image which is obtained by imaging a defect on a sample; classifying the defect image into a classified category by using information on the calculated feature quantities; displaying the classified defect image in a region on a display screen which is defined to the classified category; adding information on the classified category to the displayed defect image; transferring the displayed defect image which is added the information on the classified category to one of the other categories and displaying the transferred defect image in a region on the display screen which is defined to the one of the other categories; and changing information on the category.
摘要翻译：一种用于对缺陷进行分类的方法，包括：通过对样品上的缺陷进行成像而获得的缺陷图像的特征量化计算; 通过使用关于计算的特征量的信息将缺陷图像分类成分类的类别; 在分类的类别的显示屏幕上的区域中显示分类的缺陷图像; 将分类类别的信息添加到所显示的缺陷图像; 将所述分类类别中的信息添加到所述其他类别中的所显示的缺陷图像，并且将所传送的缺陷图像显示在所述显示屏幕上定义为所述其他类别之一的区域中; 并更改关于该类别的信息。

16. 发明授权

US07068834B1 Inspecting method, inspecting system, and method for manufacturing electronic devices 有权
标题翻译：检查方法，检查系统和电子设备制造方法
公开(公告)号：US07068834B1
公开(公告)日：2006-06-27
申请号：US09452149
申请日：1999-12-01
申请人： Yoko Ikeda , Junko Konishi , Hisafumi Iwata , Yuji Takagi , Kenji Obara , Ryo Nakagaki , Seiji Isogai , Yasuhiko Ozawa
发明人： Yoko Ikeda , Junko Konishi , Hisafumi Iwata , Yuji Takagi , Kenji Obara , Ryo Nakagaki , Seiji Isogai , Yasuhiko Ozawa
IPC分类号： G06K9/00
CPC分类号： G06F3/0486 , G06F2203/04803 , G06T7/0004 , G06T2200/24 , G06T2207/30148
摘要： The present invention has an analyzing unit including an image detection device for producing a plurality of images of a workpiece, a storage for storing detected images produced by the image detection device, and a display having a screen with a first area for displaying a plurality of detected images stored in the storage and a plurality of second areas for classifying the detected images according to features of the detected images, whereby the plurality of detected images are moved on the screen from the first area to selected second areas to classify the plurality of detected images in the second areas.
摘要翻译：本发明具有一种分析单元，包括用于产生工件的多个图像的图像检测装置，用于存储由图像检测装置产生的检测图像的存储器以及具有用于显示多个图像的第一区域的屏幕的显示器检测存储在存储器中的图像和多个第二区域，用于根据检测到的图像的特征对检测到的图像进行分类，由此多个检测图像在屏幕上从第一区域移动到选定的第二区域，以对多个检测到的图像进行分类图像在第二个区域。

17. 发明授权

US5059559A Method of aligning and bonding tab inner leads 失效
标题翻译：对准和粘接标签内引线的方法
公开(公告)号：US5059559A
公开(公告)日：1991-10-22
申请号：US265704
申请日：1988-11-01
申请人： Michio Takahashi , Tooru Mita , Yasuo Nakagawa , Toshimitsu Hamada , Hisafumi Iwata , Aizo Kaneda , Kouji Serizawa , Hiroyuki Tanaka , Koichi Sugimoto , Toshihiko Sakai , Keizo Matsukawa , Tsutomu Mimata
发明人： Michio Takahashi , Tooru Mita , Yasuo Nakagawa , Toshimitsu Hamada , Hisafumi Iwata , Aizo Kaneda , Kouji Serizawa , Hiroyuki Tanaka , Koichi Sugimoto , Toshihiko Sakai , Keizo Matsukawa , Tsutomu Mimata
IPC分类号： H01L21/00 , H01L21/603
CPC分类号： H01L21/67144 , H01L24/50 , Y10T29/49121
摘要： The present invention relates to a multi-pin chip mounting method and apparatus based on a TAB (Tape Automated Bonding) system in which leads formed on a tape and bumps formed an IC chip are aligned with each other and compress-bonded to each other. An IC chip having bumps formed on a surface thereof and inner leads formed on a carrier tape are disposed opposite to each other at a bonding station. A position of the IC chip on a stage is detected through the inner leads at the bonding station to determine the amount of correction of position of the stage. The inner leads and the IC chip are aligned with each other on the basis of the determined correction amount and are thereafter bonded to each other.
摘要翻译：本发明涉及一种基于TAB（磁带自动接合）系统的多针芯片安装方法和装置，其中形成在磁带上的引线和形成IC芯片的凸起彼此对准并且彼此压接。在其表面形成有凸起的IC芯片和形成在载带上的内部引线在接合台处彼此相对设置。通过焊接台的内部引线检测台架上的IC芯片的位置，以确定台阶位置的校正量。内部引线和IC芯片基于确定的校正量彼此对准，然后彼此结合。

18. 发明申请

US20060274932A1 Inspecting method, inspecting system, and method for manufacturing electronic devices 有权
公开(公告)号：US20060274932A1
公开(公告)日：2006-12-07
申请号：US11431709
申请日：2006-05-11
申请人： Yoko Ikeda , Junko Konishi , Hisafumi Iwata , Yuji Takagi , Kenji Obara , Ryo Nakagaki , Seiji Isogai , Yasuhiko Ozawa
发明人： Yoko Ikeda , Junko Konishi , Hisafumi Iwata , Yuji Takagi , Kenji Obara , Ryo Nakagaki , Seiji Isogai , Yasuhiko Ozawa
IPC分类号： G06K9/00 , G06K9/62 , G06K9/46
CPC分类号： G06F3/0486 , G06F2203/04803 , G06T7/0004 , G06T2200/24 , G06T2207/30148
摘要： A method for classifying defects, including: calculating feature quantifies of defect image which is obtained by imaging a defect on a sample; classifying the defect image into a classified category by using information on the calculated feature quantities; displaying the classified defect image in a region on a display screen which is defined to the classified category; adding information on the classified category to the displayed defect image; transferring the displayed defect image which is added the information on the classified category to one of the other categories and displaying the transferred defect image in a region on the display screen which is defined to the one of the other categories; and changing information on the category.

19. 发明授权

US06826735B2 Inspection data analysis program, defect inspection apparatus, defect inspection system and method for semiconductor device 失效
标题翻译：检验数据分析程序，缺陷检查装置，半导体装置的缺陷检查系统和方法
公开(公告)号：US06826735B2
公开(公告)日：2004-11-30
申请号：US10196146
申请日：2002-07-17
申请人： Makoto Ono , Hisafumi Iwata , Kanako Harada
发明人： Makoto Ono , Hisafumi Iwata , Kanako Harada
IPC分类号： G06F1750
CPC分类号： G01N21/95684 , G06T7/0002 , G06T7/62 , G06T2200/24 , G06T2207/30148
摘要： Inspection data output from an inspection apparatus is read, the inspection data containing at least one information piece of coordinate value information and size information of a particle or a pattern defect of an inspected object, and drawing data of a product of the inspected object is read. Information is extracted which is representative of a relation between at least one information piece of coordinated value information and size information of the particle or pattern defect of the inspected object in the read inspection data and the read drawing data input at said drawing data input step. The extracted information is compared with determination criterion information registered beforehand and it is determined whether each particle or pattern defect of the inspected object in the inspection data is a detection error or not.
摘要翻译：读取从检查装置输出的检查数据，读取包含检测对象的粒子或图案缺陷的坐标值信息和尺寸信息的至少一个信息的检查数据和被检查对象的乘积的绘制数据。提取信息，其代表在读取检查数据中的至少一个协调价值信息信息和被检查对象的粒子或图案缺陷的尺寸信息与在所述绘制数据输入步骤输入的读取绘制数据之间的关系。将提取的信息与预先登记的确定标准信息进行比较，并且确定检查数据中被检查对象的每个粒子或图案缺陷是否是检测错误。

20. 发明授权

US06775817B2 Inspection system and semiconductor device manufacturing method 失效
标题翻译：检测系统和半导体器件制造方法
公开(公告)号：US06775817B2
公开(公告)日：2004-08-10
申请号：US10004168
申请日：2001-10-30
申请人： Makoto Ono , Hisafumi Iwata , Keiko Kirino
发明人： Makoto Ono , Hisafumi Iwata , Keiko Kirino
IPC分类号： G06F1750
CPC分类号： H01L21/67271 , G01N21/9501 , G01N21/956 , H01L22/20
摘要： A method and system are provided for analyzing defects having the potential to become electrical failures, during the inspection of particles and/or pattern defects of a wafer used in the manufacture of electronic devices such as semiconductor integrated circuits. Defect map data is processed along with failure probability data. Next, defect-dependent failure probability calculations are made to obtain the failure probability of each defect in the defect map data. That data is then used to prepare failure-probability-added defect map data. Further, a selection process of defects to be reviewed is used to reorder and filter defects from the failure-probability-added defect map data, thus selecting one or more defects for review.
摘要翻译：提供了一种方法和系统，用于在用于制造诸如半导体集成电路的电子器件的晶片的颗粒和/或图案缺陷的检查期间分析具有变为电气故障的可能性的缺陷。缺陷图数据与故障概率数据一起处理。接下来，进行与缺陷相关的故障概率计算，以获得缺陷图数据中的每个缺陷的故障概率。然后将该数据用于准备故障概率添加缺陷图数据。此外，使用要检查的缺陷的选择处理用于从故障概率添加缺陷图数据重新排序和过滤缺陷，从而选择一个或多个缺陷以供审查。

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