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1. 发明授权

US07998836B1 Method for fabricating gallium nitride based semiconductor electronic device 有权
标题翻译：制造氮化镓基半导体电子器件的方法
公开(公告)号：US07998836B1
公开(公告)日：2011-08-16
申请号：US12912932
申请日：2010-10-27
申请人： Hiromu Shiomi , Shinsuke Fujiwara , Yu Saitoh , Makoto Kiyama
发明人： Hiromu Shiomi , Shinsuke Fujiwara , Yu Saitoh , Makoto Kiyama
IPC分类号： H01L21/30
CPC分类号： H01L29/66219 , H01L29/2003 , H01L29/66204 , H01L29/861 , H01L29/872
摘要： A method of fabricating a gallium nitride-based semiconductor electronic device is provided, the method preventing a reduction in adhesiveness between a gallium nitride-based semiconductor layer and a conductive substrate. A substrate 11 is prepared. The substrate 11 has a first surface 11a and a second surface 11b, the first surface 11a allowing a gallium nitride-based semiconductor to be deposited thereon. The substrate 11 includes a support 13 of a material different from the gallium nitride-based semiconductor. The support is exposed on the second surface 11b of the substrate 11. An array of grooves 15 is provided in the second surface 11b. A semiconductor region including at least one gallium nitride-based semiconductor layer is deposited on the first surface 11a of the substrate 11, and thereby an epitaxial substrate E is fabricated. A conductive substrate 33 is bonded to the epitaxial substrate E such that the semiconductor region 17 is provided between the first surface 11a of the substrate 11 and the conductive substrate E. Subsequently, the second surface 11b is irradiated with laser light for laser lift-off.
摘要翻译：提供了一种制造氮化镓基半导体电子器件的方法，该方法防止了氮化镓基半导体层与导电基片之间的粘附性的降低。制备基板11。基板11具有第一表面11a和第二表面11b，第一表面11a允许沉积氮化镓基半导体。基板11包括与氮化镓基半导体不同的材料的支撑体13。支撑体暴露在基板11的第二表面11b上。在第二表面11b中设置有一组槽15。包括至少一个氮化镓基半导体层的半导体区域沉积在衬底11的第一表面11a上，由此制造外延衬底E。将导电基板33接合到外延基板E，使得半导体区域17设置在基板11的第一表面11a和导电基板E之间。接着，用激光照射激光剥离第二表面11b 。

2. 发明申请

US20110198693A1 III NITRIDE SEMICONDUCTOR ELECTRONIC DEVICE, METHOD FOR MANUFACTURING III NITRIDE SEMICONDUCTOR ELECTRONIC DEVICE, AND III NITRIDE SEMICONDUCTOR EPITAXIAL WAFER 失效
标题翻译： III型氮化物半导体电子器件，制造III型氮化物半导体电子器件的方法和III型氮化物半导体外延晶体管
公开(公告)号：US20110198693A1
公开(公告)日：2011-08-18
申请号：US13124934
申请日：2009-10-20
申请人： Hiromu Shiomi , Kazuhide Sumiyoshu , Yu Saitoh , Makoto Kiyama
发明人： Hiromu Shiomi , Kazuhide Sumiyoshu , Yu Saitoh , Makoto Kiyama
IPC分类号： H01L29/78 , H01L29/06 , H01L21/205
CPC分类号： H01L29/7802 , H01L21/02389 , H01L21/0243 , H01L21/02433 , H01L21/0254 , H01L29/045 , H01L29/2003 , H01L29/32 , H01L29/41741 , H01L29/4238 , H01L29/475 , H01L29/66712 , H01L29/861 , H01L29/872
摘要： Provided is a III nitride semiconductor electronic device having a structure capable of reducing leakage current. A laminate 11 includes a substrate 13 and a III nitride semiconductor epitaxial film 15. The substrate 13 is made of a III nitride semiconductor having a carrier concentration of more than 1×1018 cm−3. The epitaxial structure 15 includes a III nitride semiconductor epitaxial film 17. A first face 13a of the substrate 13 is inclined at an angle θ of more than 5 degrees with respect to an axis Cx extending in a direction of the c-axis. A normal vector VN and a c-axis vector VC make the angle θ. The III nitride semiconductor epitaxial film 17 includes first, second and third regions 17a, 17b and 17c arranged in order in a direction of a normal to the first face 13a. A dislocation density of the third region 17c is smaller than that of the first region 17a. A dislocation density of the second region 17b is smaller than that of the substrate 13.
摘要翻译：提供具有能够减少漏电流的结构的III族氮化物半导体电子器件。层压体11包括基板13和III族氮化物半导体外延膜15.基板13由载流子浓度大于1×1018cm-3的III族氮化物半导体构成。外延结构15包括III族氮化物半导体外延膜17.衬底13的第一面13a以角度倾斜; 相对于沿c轴方向延伸的轴线Cx大于5度。法向量VN和c轴向量VC使得角度和角度。 III族氮化物半导体外延膜17包括沿着与第一面13a的法线方向依次排列的第一，第二和第三区域17a，17b和17c。第三区域17c的位错密度小于第一区域17a的位错密度。第二区域17b的位错密度小于基板13的位错密度。

3. 发明授权

US08502310B2 III nitride semiconductor electronic device, method for manufacturing III nitride semiconductor electronic device, and III nitride semiconductor epitaxial wafer 失效
标题翻译： III族氮化物半导体电子器件，III族氮化物半导体电子器件的制造方法以及III族氮化物半导体外延片
公开(公告)号：US08502310B2
公开(公告)日：2013-08-06
申请号：US13124934
申请日：2009-10-20
申请人： Hiromu Shiomi , Kazuhide Sumiyoshi , Yu Saitoh , Makoto Kiyama
发明人： Hiromu Shiomi , Kazuhide Sumiyoshi , Yu Saitoh , Makoto Kiyama
IPC分类号： H01L29/66
CPC分类号： H01L29/7802 , H01L21/02389 , H01L21/0243 , H01L21/02433 , H01L21/0254 , H01L29/045 , H01L29/2003 , H01L29/32 , H01L29/41741 , H01L29/4238 , H01L29/475 , H01L29/66712 , H01L29/861 , H01L29/872
摘要： Provided is a III nitride semiconductor electronic device having a structure capable of reducing leakage current. A laminate 11 includes a substrate 13 and a III nitride semiconductor epitaxial film 15. The substrate 13 is made of a III nitride semiconductor having a carrier concentration of more than 1×1018 cm−3. The epitaxial structure 15 includes a III nitride semiconductor epitaxial film 17. A first face 13a of the substrate 13 is inclined at an angle θ of more than 5 degrees with respect to an axis Cx extending in a direction of the c-axis. A normal vector VN and a c-axis vector VC make the angle θ. The III nitride semiconductor epitaxial film 17 includes first, second and third regions 17a, 17b and 17c arranged in order in a direction of a normal to the first face 13a. A dislocation density of the third region 17c is smaller than that of the first region 17a. A dislocation density of the second region 17b is smaller than that of the substrate 13.
摘要翻译：提供具有能够减少漏电流的结构的III族氮化物半导体电子器件。层压体11包括基板13和III族氮化物半导体外延膜15.基板13由载流子浓度大于1×1018cm-3的III族氮化物半导体构成。外延结构15包括III族氮化物半导体外延膜17.基板13的第一面13a相对于沿c轴方向延伸的轴线Cx以大于5度的角度θ倾斜。法向量VN和c轴矢量VC形成角度θ。 III族氮化物半导体外延膜17包括沿着与第一面13a的法线方向依次排列的第一，第二和第三区域17a，17b和17c。第三区域17c的位错密度小于第一区域17a的位错密度。第二区域17b的位错密度小于基板13的位错密度。

4. 发明授权

US08349078B2 Method of forming nitride semiconductor epitaxial layer and method of manufacturing nitride semiconductor device 失效
标题翻译：形成氮化物半导体外延层的方法和制造氮化物半导体器件的方法
公开(公告)号：US08349078B2
公开(公告)日：2013-01-08
申请号：US12913062
申请日：2010-10-27
申请人： Hiromu Shiomi , Yu Saitoh , Kazuhide Sumiyoshi , Akihiro Hachigo , Makoto Kiyama , Seiji Nakahata
发明人： Hiromu Shiomi , Yu Saitoh , Kazuhide Sumiyoshi , Akihiro Hachigo , Makoto Kiyama , Seiji Nakahata
IPC分类号： C30B25/20 , C30B25/22 , C30B29/40 , H01L21/306
CPC分类号： H01L21/0262 , C30B25/18 , C30B29/403 , H01L21/02389 , H01L21/02439 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/30617 , H01L21/30621 , H01L21/7813
摘要： The present method of forming a nitride semiconductor epitaxial layer includes the steps of growing at least one layer of nitride semiconductor epitaxial layer on a nitride semiconductor substrate having a dislocation density lower than or equal to 1×107 cm−2 with a chemical decomposition layer interposed therebetween, the chemical decomposition layer being chemically decomposed at least with either a gas or an electrolytic solution, and decomposing the chemical decomposition layer at least with either the gas or the electrolytic solution at least either during or after the step of growing the nitride semiconductor epitaxial layer, thereby separating the nitride semiconductor epitaxial layer from the nitride semiconductor substrate. A high-quality nitride semiconductor epitaxial layer suffering less damage when separated from the nitride semiconductor substrate is thereby formed.
摘要翻译：本发明的形成氮化物半导体外延层的方法包括以下步骤：在具有低于或等于1×107cm-2的位错密度的氮化物半导体衬底上生长至少一层氮化物半导体外延层，其中化学分解层插入其间，化学分解层至少用气体或电解液进行化学分解，并且至少在气体或电解液中的化学分解层至少在生长氮化物半导体外延的步骤期间或之后分解从而将氮化物半导体外延层与氮化物半导体衬底分离。由此形成与氮化物半导体基板分离时受损少的高质量氮化物半导体外延层。

5. 发明授权

US08785301B2 Method of cleaning silicon carbide semiconductor 有权
标题翻译：清洁碳化硅半导体的方法
公开(公告)号：US08785301B2
公开(公告)日：2014-07-22
申请号：US13390869
申请日：2011-02-25
申请人： Keiji Wada , Takeyoshi Masuda , Tomihito Miyazaki , Toru Hiyoshi , Satomi Itoh , Hiromu Shiomi
发明人： Keiji Wada , Takeyoshi Masuda , Tomihito Miyazaki , Toru Hiyoshi , Satomi Itoh , Hiromu Shiomi
IPC分类号： H01L21/322 , H01L21/31
CPC分类号： H01L21/02052 , H01L21/02057 , H01L21/67051 , H01L29/1608 , H01L29/66068 , H01L29/7802
摘要： A method of cleaning a SiC semiconductor includes the steps of forming an oxide film at the surface of a SiC semiconductor, and removing the oxide film. At the step of forming an oxide film, an oxide film is formed using ozone water having a concentration greater than or equal to 30 ppm. The forming step preferably includes the step of heating at least one of the surface of the SiC semiconductor and the ozone water. Thus, there can be obtained a method of cleaning a SiC semiconductor that can exhibit cleaning effect on the SiC semiconductor.
摘要翻译：清洗SiC半导体的方法包括以下步骤：在SiC半导体的表面形成氧化膜，除去氧化物膜。在形成氧化膜的步骤中，使用浓度大于或等于30ppm的臭氧水形成氧化膜。成形步骤优选包括加热SiC半导体的表面和臭氧水中的至少一个的步骤。因此，可以获得能够对SiC半导体具有清洁效果的SiC半导体的清洗方法。

6. 发明申请

US20120119225A1 SILICON CARBIDE SUBSTRATE, EPITAXIAL LAYER PROVIDED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：硅碳化硅基板，外延层基板，半导体器件及制造碳化硅基板的方法
公开(公告)号：US20120119225A1
公开(公告)日：2012-05-17
申请号：US13322089
申请日：2011-02-21
申请人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
发明人： Hiromu Shiomi , Hideto Tamaso , Shin Harada , Takashi Tsuno , Yasuo Namikawa
IPC分类号： H01L29/24 , H01L21/20
CPC分类号： H01L29/7802 , H01L21/02378 , H01L21/02447 , H01L21/02529 , H01L21/02631 , H01L21/02658 , H01L21/02664 , H01L21/046 , H01L21/0495 , H01L29/04 , H01L29/1608 , H01L29/6606 , H01L29/66068
摘要： The present invention provides a silicon carbide substrate, an epitaxial layer provided substrate, a semiconductor device, and a method for manufacturing the silicon carbide substrate, each of which achieves reduced on-resistance. The silicon carbide substrate is a silicon carbide substrate having a main surface, and includes: a SiC single-crystal substrate formed in at least a portion of the main surface; and a base member disposed to surround the SiC single-crystal substrate. The base member includes a boundary region and a base region. The boundary region is adjacent to the SiC single-crystal substrate in a direction along the main surface, and has a crystal grain boundary therein. The base region is adjacent to the SiC single-crystal substrate in a direction perpendicular to the main surface, and has an impurity concentration higher than that of the SiC single-crystal substrate.
摘要翻译：本发明提供一种碳化硅衬底，提供衬底的外延层，半导体器件和制造碳化硅衬底的方法，其中每一个都实现了降低的导通电阻。碳化硅衬底是具有主表面的碳化硅衬底，并且包括：形成在主表面的至少一部分中的SiC单晶衬底; 以及设置成围绕SiC单晶衬底的基底构件。基部构件包括边界区域和基底区域。边界区域沿着主表面的方向与SiC单晶基板相邻，并且在其中具有晶界。基极区域在与主表面垂直的方向上与SiC单晶衬底相邻，杂质浓度高于SiC单晶衬底。

7. 发明授权

US06660084B1 Sic single crystal and method for growing the same 有权
标题翻译： Sic单晶和生长方法相同
公开(公告)号：US06660084B1
公开(公告)日：2003-12-09
申请号：US10069503
申请日：2002-02-27
申请人： Hiromu Shiomi , Tsunenobu Kimoto , Hiroyuki Matsunami
发明人： Hiromu Shiomi , Tsunenobu Kimoto , Hiroyuki Matsunami
IPC分类号： C30B2502
CPC分类号： C30B23/00 , C30B23/02 , C30B29/36
摘要： A method of growing a 4H-poly type SiC single crystal 40, characterized in that the 4H-poly type SiC single crystal 40 is grown on a seed crystal 30 comprised of an SiC single crystal where a {03-38} plane 30u or a plane which is inclined at off angle &agr;, within about 10°, with respect to the {03-38} plane, is exposed.
摘要翻译：一种生长4H-多晶型SiC单晶40的方法，其特征在于，4H-多晶型SiC单晶40在由SiC单晶构成的晶种30上生长，其中{03-38}面30u或相对于{03-38}平面倾斜偏角α在约10°内的平面被暴露。

8. 发明授权

US06391109B1 Method of making SiC single crystal and apparatus for making SiC single crystal 有权
公开(公告)号：US06391109B1
公开(公告)日：2002-05-21
申请号：US09750157
申请日：2000-12-29
申请人： Hiromu Shiomi , Shigehiro Nishino
发明人： Hiromu Shiomi , Shigehiro Nishino
IPC分类号： C30B3500
摘要： An apparatus comprises an Si-disposing section in which solid Si is disposed; a seed-crystal-disposing section in which a seed crystal of SiC is disposed; a synthesis vessel adapted to accommodate the Si-disposing section, the seed-crystal-disposing section, and carbon; heating means adapted to heat the Si-disposing section and the seed-crystal-disposing section; and a control section for transmitting to the heating means a command for heating the Si to an evaporation temperature of Si or higher and heating the seed crystal to a temperature higher than that of Si; wherein the Si evaporated by the heating means is adapted to reach the seed-crystal-disposing section.

9. 发明授权

US06270898B1 Tool tip and bonding tool comprising the tool tip and control method for the bonding tool 失效
标题翻译：工具尖和焊接工具，其包括工具尖端和用于接合工具的控制方法
公开(公告)号：US06270898B1
公开(公告)日：2001-08-07
申请号：US09180981
申请日：1998-11-18
申请人： Katsuko Yamamoto , Takahisa Iguchi , Yoshiaki Kumazawa , Katsuyuki Tanaka , Hiromu Shiomi , Takashi Tsuno , Naoji Fujimori
发明人： Katsuko Yamamoto , Takahisa Iguchi , Yoshiaki Kumazawa , Katsuyuki Tanaka , Hiromu Shiomi , Takashi Tsuno , Naoji Fujimori
IPC分类号： H01L2160
CPC分类号： H01L21/67138 , B23K26/382 , B23K26/40 , B23K2101/20 , B23K2101/35 , B23K2103/50 , B23K2103/52 , Y10T428/24355 , Y10T428/24628 , Y10T428/24802 , Y10T428/24917 , Y10T428/24926 , Y10T428/26 , Y10T428/30
摘要： A conductive polycrystalline diamond film having specific resistance of at least 1×10−4 &OHgr;cm and less than 1×103 &OHgr;cm, whose film thickness is in the range of at least 0.1 &mgr;m and not more than 500 &mgr;m, is film-formed by vapor-phase synthesis on a surface employed for pressure bonding, a surface opposite to this surface or at least two side surfaces intersecting with these surfaces on a substrate of a bonding tool tip that is applicable for bonding and packaging a semiconductor chip.
摘要翻译：具有至少1×10 -4欧姆·厘米的电阻率和小于1×10 3欧姆·厘米的导电多晶金刚石膜，其膜厚度在至少0.1μm至不大于500μm的范围内，通过气相合成用于压接的表面，与该表面相对的表面或与适用于接合和封装半导体芯片的接合工具尖端的基板上的这些表面相交的至少两个侧表面。

10. 发明授权

US6132550A Apparatuses for desposition or etching 失效
标题翻译：用于放置或蚀刻的设备
公开(公告)号：US6132550A
公开(公告)日：2000-10-17
申请号：US694457
申请日：1996-08-07
申请人： Hiromu Shiomi
发明人： Hiromu Shiomi
IPC分类号： C23C16/505 , C23C16/511 , H01J37/32 , C23C16/00 , C23C14/00 , C23F1/02 , C25B9/00
CPC分类号： H01J37/32247 , C23C16/505 , C23C16/511 , H01J37/32192 , H01J37/3244
摘要： The apparatus according to the present invention is capable of maintain a plasma at relatively high pressure while preventing a window from being heated or sputtered by the plasma. The reaction chamber includes (1) an entrance window for guiding an electromagnetic wave such as a microwave or an RF to the reaction chamber, (2) a reaction room where film formation or etching for a substrate is performed by exciting a gas with the electromagnetic wave such as the microwave or the RF, and (3) an intermediate room arranged between the reaction room and the entrance window and having a pressure higher than that in the reaction chamber. The gas in the intermediate room is not excited with the electromagnetic wave such as the microwave or the RF.
摘要翻译：根据本发明的装置能够在防止窗口被等离子体加热或溅射的同时将等离子体保持在相对较高的压力。反应室包括（1）用于将电磁波如微波或RF引导到反应室的入口窗口，（2）反应室，其中通过用电磁体激发气体来进行基底的成膜或蚀刻波形如微波或RF，以及（3）设置在反应室和入口窗之间并具有高于反应室中的压力的中间室。中间室内的气体不会受到微波或射频等电磁波的激发。

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