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1. 发明授权

US08349078B2 Method of forming nitride semiconductor epitaxial layer and method of manufacturing nitride semiconductor device 失效
标题翻译：形成氮化物半导体外延层的方法和制造氮化物半导体器件的方法
公开(公告)号：US08349078B2
公开(公告)日：2013-01-08
申请号：US12913062
申请日：2010-10-27
申请人： Hiromu Shiomi , Yu Saitoh , Kazuhide Sumiyoshi , Akihiro Hachigo , Makoto Kiyama , Seiji Nakahata
发明人： Hiromu Shiomi , Yu Saitoh , Kazuhide Sumiyoshi , Akihiro Hachigo , Makoto Kiyama , Seiji Nakahata
IPC分类号： C30B25/20 , C30B25/22 , C30B29/40 , H01L21/306
CPC分类号： H01L21/0262 , C30B25/18 , C30B29/403 , H01L21/02389 , H01L21/02439 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/30617 , H01L21/30621 , H01L21/7813
摘要： The present method of forming a nitride semiconductor epitaxial layer includes the steps of growing at least one layer of nitride semiconductor epitaxial layer on a nitride semiconductor substrate having a dislocation density lower than or equal to 1×107 cm−2 with a chemical decomposition layer interposed therebetween, the chemical decomposition layer being chemically decomposed at least with either a gas or an electrolytic solution, and decomposing the chemical decomposition layer at least with either the gas or the electrolytic solution at least either during or after the step of growing the nitride semiconductor epitaxial layer, thereby separating the nitride semiconductor epitaxial layer from the nitride semiconductor substrate. A high-quality nitride semiconductor epitaxial layer suffering less damage when separated from the nitride semiconductor substrate is thereby formed.
摘要翻译：本发明的形成氮化物半导体外延层的方法包括以下步骤：在具有低于或等于1×107cm-2的位错密度的氮化物半导体衬底上生长至少一层氮化物半导体外延层，其中化学分解层插入其间，化学分解层至少用气体或电解液进行化学分解，并且至少在气体或电解液中的化学分解层至少在生长氮化物半导体外延的步骤期间或之后分解从而将氮化物半导体外延层与氮化物半导体衬底分离。由此形成与氮化物半导体基板分离时受损少的高质量氮化物半导体外延层。

2. 发明申请

US20110223749A1 METHOD OF FORMING NITRIDE SEMICONDUCTOR EPITAXIAL LAYER AND METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE 失效
标题翻译：形成氮化物半导体外延层的方法和制备氮化物半导体器件的方法
公开(公告)号：US20110223749A1
公开(公告)日：2011-09-15
申请号：US12913062
申请日：2010-10-27
申请人： Hiromu SHIOMI , Yu Saitoh , Kazuhide Sumiyoshi , Akihiro Hachigo , Makoto Kiyama , Seiji Nakahata
发明人： Hiromu SHIOMI , Yu Saitoh , Kazuhide Sumiyoshi , Akihiro Hachigo , Makoto Kiyama , Seiji Nakahata
IPC分类号： H01L21/205 , H01L21/3063
CPC分类号： H01L21/0262 , C30B25/18 , C30B29/403 , H01L21/02389 , H01L21/02439 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/30617 , H01L21/30621 , H01L21/7813
摘要： The present method of forming a nitride semiconductor epitaxial layer includes the steps of growing at least one layer of nitride semiconductor epitaxial layer on a nitride semiconductor substrate having a dislocation density lower than or equal to 1×107 cm−2 with a chemical decomposition layer interposed therebetween, the chemical decomposition layer being chemically decomposed at least with either a gas or an electrolytic solution, and decomposing the chemical decomposition layer at least with either the gas or the electrolytic solution at least either during or after the step of growing the nitride semiconductor epitaxial layer, thereby separating the nitride semiconductor epitaxial layer from the nitride semiconductor substrate. A high-quality nitride semiconductor epitaxial layer suffering less damage when separated from the nitride semiconductor substrate is thereby formed.
摘要翻译：本发明的形成氮化物半导体外延层的方法包括以下步骤：在具有低于或等于1×107cm-2的位错密度的氮化物半导体衬底上生长至少一层氮化物半导体外延层，其中化学分解层插入其间，化学分解层至少用气体或电解液进行化学分解，并且至少在气体或电解液中的化学分解层至少在生长氮化物半导体外延的步骤期间或之后分解从而将氮化物半导体外延层与氮化物半导体衬底分离。由此形成与氮化物半导体基板分离时受损少的高质量氮化物半导体外延层。

3. 发明授权

US08502310B2 III nitride semiconductor electronic device, method for manufacturing III nitride semiconductor electronic device, and III nitride semiconductor epitaxial wafer 失效
标题翻译： III族氮化物半导体电子器件，III族氮化物半导体电子器件的制造方法以及III族氮化物半导体外延片
公开(公告)号：US08502310B2
公开(公告)日：2013-08-06
申请号：US13124934
申请日：2009-10-20
申请人： Hiromu Shiomi , Kazuhide Sumiyoshi , Yu Saitoh , Makoto Kiyama
发明人： Hiromu Shiomi , Kazuhide Sumiyoshi , Yu Saitoh , Makoto Kiyama
IPC分类号： H01L29/66
CPC分类号： H01L29/7802 , H01L21/02389 , H01L21/0243 , H01L21/02433 , H01L21/0254 , H01L29/045 , H01L29/2003 , H01L29/32 , H01L29/41741 , H01L29/4238 , H01L29/475 , H01L29/66712 , H01L29/861 , H01L29/872
摘要： Provided is a III nitride semiconductor electronic device having a structure capable of reducing leakage current. A laminate 11 includes a substrate 13 and a III nitride semiconductor epitaxial film 15. The substrate 13 is made of a III nitride semiconductor having a carrier concentration of more than 1×1018 cm−3. The epitaxial structure 15 includes a III nitride semiconductor epitaxial film 17. A first face 13a of the substrate 13 is inclined at an angle θ of more than 5 degrees with respect to an axis Cx extending in a direction of the c-axis. A normal vector VN and a c-axis vector VC make the angle θ. The III nitride semiconductor epitaxial film 17 includes first, second and third regions 17a, 17b and 17c arranged in order in a direction of a normal to the first face 13a. A dislocation density of the third region 17c is smaller than that of the first region 17a. A dislocation density of the second region 17b is smaller than that of the substrate 13.
摘要翻译：提供具有能够减少漏电流的结构的III族氮化物半导体电子器件。层压体11包括基板13和III族氮化物半导体外延膜15.基板13由载流子浓度大于1×1018cm-3的III族氮化物半导体构成。外延结构15包括III族氮化物半导体外延膜17.基板13的第一面13a相对于沿c轴方向延伸的轴线Cx以大于5度的角度θ倾斜。法向量VN和c轴矢量VC形成角度θ。 III族氮化物半导体外延膜17包括沿着与第一面13a的法线方向依次排列的第一，第二和第三区域17a，17b和17c。第三区域17c的位错密度小于第一区域17a的位错密度。第二区域17b的位错密度小于基板13的位错密度。

4. 发明申请

US20110198693A1 III NITRIDE SEMICONDUCTOR ELECTRONIC DEVICE, METHOD FOR MANUFACTURING III NITRIDE SEMICONDUCTOR ELECTRONIC DEVICE, AND III NITRIDE SEMICONDUCTOR EPITAXIAL WAFER 失效
标题翻译： III型氮化物半导体电子器件，制造III型氮化物半导体电子器件的方法和III型氮化物半导体外延晶体管
公开(公告)号：US20110198693A1
公开(公告)日：2011-08-18
申请号：US13124934
申请日：2009-10-20
申请人： Hiromu Shiomi , Kazuhide Sumiyoshu , Yu Saitoh , Makoto Kiyama
发明人： Hiromu Shiomi , Kazuhide Sumiyoshu , Yu Saitoh , Makoto Kiyama
IPC分类号： H01L29/78 , H01L29/06 , H01L21/205
CPC分类号： H01L29/7802 , H01L21/02389 , H01L21/0243 , H01L21/02433 , H01L21/0254 , H01L29/045 , H01L29/2003 , H01L29/32 , H01L29/41741 , H01L29/4238 , H01L29/475 , H01L29/66712 , H01L29/861 , H01L29/872
摘要： Provided is a III nitride semiconductor electronic device having a structure capable of reducing leakage current. A laminate 11 includes a substrate 13 and a III nitride semiconductor epitaxial film 15. The substrate 13 is made of a III nitride semiconductor having a carrier concentration of more than 1×1018 cm−3. The epitaxial structure 15 includes a III nitride semiconductor epitaxial film 17. A first face 13a of the substrate 13 is inclined at an angle θ of more than 5 degrees with respect to an axis Cx extending in a direction of the c-axis. A normal vector VN and a c-axis vector VC make the angle θ. The III nitride semiconductor epitaxial film 17 includes first, second and third regions 17a, 17b and 17c arranged in order in a direction of a normal to the first face 13a. A dislocation density of the third region 17c is smaller than that of the first region 17a. A dislocation density of the second region 17b is smaller than that of the substrate 13.
摘要翻译：提供具有能够减少漏电流的结构的III族氮化物半导体电子器件。层压体11包括基板13和III族氮化物半导体外延膜15.基板13由载流子浓度大于1×1018cm-3的III族氮化物半导体构成。外延结构15包括III族氮化物半导体外延膜17.衬底13的第一面13a以角度倾斜; 相对于沿c轴方向延伸的轴线Cx大于5度。法向量VN和c轴向量VC使得角度和角度。 III族氮化物半导体外延膜17包括沿着与第一面13a的法线方向依次排列的第一，第二和第三区域17a，17b和17c。第三区域17c的位错密度小于第一区域17a的位错密度。第二区域17b的位错密度小于基板13的位错密度。

5. 发明授权

US07998836B1 Method for fabricating gallium nitride based semiconductor electronic device 有权
标题翻译：制造氮化镓基半导体电子器件的方法
公开(公告)号：US07998836B1
公开(公告)日：2011-08-16
申请号：US12912932
申请日：2010-10-27
申请人： Hiromu Shiomi , Shinsuke Fujiwara , Yu Saitoh , Makoto Kiyama
发明人： Hiromu Shiomi , Shinsuke Fujiwara , Yu Saitoh , Makoto Kiyama
IPC分类号： H01L21/30
CPC分类号： H01L29/66219 , H01L29/2003 , H01L29/66204 , H01L29/861 , H01L29/872
摘要： A method of fabricating a gallium nitride-based semiconductor electronic device is provided, the method preventing a reduction in adhesiveness between a gallium nitride-based semiconductor layer and a conductive substrate. A substrate 11 is prepared. The substrate 11 has a first surface 11a and a second surface 11b, the first surface 11a allowing a gallium nitride-based semiconductor to be deposited thereon. The substrate 11 includes a support 13 of a material different from the gallium nitride-based semiconductor. The support is exposed on the second surface 11b of the substrate 11. An array of grooves 15 is provided in the second surface 11b. A semiconductor region including at least one gallium nitride-based semiconductor layer is deposited on the first surface 11a of the substrate 11, and thereby an epitaxial substrate E is fabricated. A conductive substrate 33 is bonded to the epitaxial substrate E such that the semiconductor region 17 is provided between the first surface 11a of the substrate 11 and the conductive substrate E. Subsequently, the second surface 11b is irradiated with laser light for laser lift-off.
摘要翻译：提供了一种制造氮化镓基半导体电子器件的方法，该方法防止了氮化镓基半导体层与导电基片之间的粘附性的降低。制备基板11。基板11具有第一表面11a和第二表面11b，第一表面11a允许沉积氮化镓基半导体。基板11包括与氮化镓基半导体不同的材料的支撑体13。支撑体暴露在基板11的第二表面11b上。在第二表面11b中设置有一组槽15。包括至少一个氮化镓基半导体层的半导体区域沉积在衬底11的第一表面11a上，由此制造外延衬底E。将导电基板33接合到外延基板E，使得半导体区域17设置在基板11的第一表面11a和导电基板E之间。接着，用激光照射激光剥离第二表面11b 。

6. 发明授权

US08890239B2 Semiconductor device and method for producing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08890239B2
公开(公告)日：2014-11-18
申请号：US13884221
申请日：2011-07-26
申请人： Seiji Yaegashi , Makoto Kiyama , Mitsunori Yokoyama , Kazutaka Inoue , Masaya Okada , Yu Saitoh
发明人： Seiji Yaegashi , Makoto Kiyama , Mitsunori Yokoyama , Kazutaka Inoue , Masaya Okada , Yu Saitoh
IPC分类号： H01L29/66 , H01L29/778 , H01L29/417 , H01L29/78 , H01L29/06 , H01L29/423 , H01L29/20
CPC分类号： H01L29/7802 , H01L29/0649 , H01L29/0657 , H01L29/2003 , H01L29/41741 , H01L29/4236 , H01L29/66462 , H01L29/66712 , H01L29/7788 , H01L29/7789
摘要： In a vertical semiconductor device including a channel in an opening, a semiconductor device whose high-frequency characteristics can be improved and a method for producing the semiconductor device are provided. The semiconductor device includes n-type GaN-based drift layer 4/p-type GaN-based barrier layer 6/n-type GaN-based contact layer 7. An opening 28 extends from a top layer and reaches the n-type GaN-based drift layer. The semiconductor device includes a regrown layer 27 located so as to cover the opening, the regrown layer 27 including an electron drift layer 22 and an electron supply layer 26, a source electrode S, a drain electrode D, and a gate electrode G located on the regrown layer. Assuming that the source electrode serving as one electrode and the drain electrode serving as the other electrode constitute a capacitor, the semiconductor device includes a capacitance-decreasing structure that decreases the capacitance of the capacitor.
摘要翻译：在包括开口中的沟道的垂直半导体器件中，提供了可以提高其高频特性的半导体器件和制造半导体器件的方法。半导体器件包括n型GaN基漂移层4 / p型GaN基阻挡层6 / n型GaN基接触层7.开口28从顶层延伸并到达n型GaN- 基漂移层。半导体器件包括以覆盖开口的方式定位的再生长层27，包括电子漂移层22和电子供给层26的再生长层27，源电极S，漏电极D和位于再生长层。假设用作一个电极的源极和用作另一个电极的漏电极构成电容器，则半导体器件包括降低电容器的电容的电容减小结构。

7. 发明申请

US20130181226A1 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130181226A1
公开(公告)日：2013-07-18
申请号：US13822591
申请日：2011-07-06
申请人： Yu Saitoh , Masaya Okada , Masaki Ueno , Makoto Kiyama
发明人： Yu Saitoh , Masaya Okada , Masaki Ueno , Makoto Kiyama
IPC分类号： H01L29/778 , H01L29/66
CPC分类号： H01L29/7788 , H01L21/0254 , H01L21/02573 , H01L21/0262 , H01L21/3006 , H01L29/2003 , H01L29/4238 , H01L29/66431 , H01L29/66462 , H01L29/7789
摘要： There are provided a semiconductor device in which a drain leak current can be reduced in the transistor operation while high vertical breakdown voltage is achieved and a method for producing the semiconductor device. In the semiconductor device, an opening 28 that extends from an n+-type contact layer 8 and reaches an n-type drift layer 4 through a p-type barrier layer 6 is formed. The semiconductor device includes a regrown layer 27 located so as to cover portions of the p-type barrier layer 6 and the like that are exposed to the opening, the regrown layer 27 including an undoped GaN channel layer 22 and a carrier supply layer 26; an insulating layer 9 located so as to cover the regrown layer 27; and a gate electrode G located on the insulating layer 9. In the p-type barrier layer, the Mg concentration A (cm−3)and the hydrogen concentration B (cm−3) satisfy 0.1
摘要翻译：提供了一种半导体器件，其中在实现高的垂直击穿电压的同时，在晶体管操作中可以减小漏极漏电流，以及制造半导体器件的方法。在半导体器件中，形成从n +型接触层8延伸并通过p型阻挡层6到达n型漂移层4的开口28。半导体器件包括再生长层27，其被覆盖以覆盖暴露于开口的p型阻挡层6等的部分，再生长层27包括未掺杂的GaN沟道层22和载流子供给层26; 定位成覆盖再生长层27的绝缘层9; 和位于绝缘层9上的栅电极G.在p型阻挡层中，Mg浓度A（cm-3）和氢浓度B（cm-3）满足0.1

8. 发明申请

US20140004668A1 METHOD FOR MANUFACTURING NITRIDE ELECTRONIC DEVICES 审中-公开
标题翻译：制造硝酸电子器件的方法
公开(公告)号：US20140004668A1
公开(公告)日：2014-01-02
申请号：US14006307
申请日：2011-04-05
申请人： Yu Saitoh , Masaya Okada , Makoto Kiyama
发明人： Yu Saitoh , Masaya Okada , Makoto Kiyama
IPC分类号： H01L29/66
CPC分类号： H01L29/66431 , H01L21/02458 , H01L21/0254 , H01L21/02579 , H01L21/02609 , H01L21/0262 , H01L29/2003 , H01L29/4236 , H01L29/66462 , H01L29/7788 , H01L29/7789
摘要： A substrate product is disposed in a growth furnace at time t0, and the substrate temperature is then raised to 950° C. At time t3 after the substrate temperature is sufficiently stable, trimethyl gallium and ammonia are supplied to the growth furnace, to grow an i-GaN film. The substrate temperature reaches 1080° C. at time t5. At time t6 after the substrate temperature is sufficiently stable, trimethyl gallium, trimethyl aluminum and ammonia are supplied to the growth furnace, to grow an i-AlGaN film. Supply of trimethyl gallium and trimethyl aluminum is stopped at time t7 to discontinue film deposition. Quickly thereafter, supply of ammonia and hydrogen to the growth furnace is stopped and supply of nitrogen is initiated, to change the atmosphere of ammonia and hydrogen in a growth furnace chamber to a nitrogen atmosphere. After formation of the nitrogen atmosphere, the substrate temperature starts being lowered at time t8.
摘要翻译：在时间t0将基板产物置于生长炉中，然后将基板温度升至950℃。在衬底温度足够稳定之后的时间t3，将三甲基镓和氨供应到生长炉中，以生长 i-GaN膜。衬底温度在时间t5达到1080℃。在衬底温度足够稳定后的时间t6，将三甲基镓，三甲基铝和氨供给到生长炉中，以生长i-AlGaN膜。在时间t7停止供应三甲基镓和三甲基铝以中断膜沉积。此后，停止向生长炉供应氨和氢，并开始供应氮气，以将生长炉室中的氨和氢气气氛改变为氮气氛。在形成氮气氛后，在时间t8开始降低基板温度。

9. 发明申请

US20130234156A1 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130234156A1
公开(公告)日：2013-09-12
申请号：US13885131
申请日：2011-10-17
申请人： Masaya Okada , Makoto Kiyama , Yu Saitoh , Seiji Yaegashi , Mitsunori Yokoyama , Kazutaka Inoue
发明人： Masaya Okada , Makoto Kiyama , Yu Saitoh , Seiji Yaegashi , Mitsunori Yokoyama , Kazutaka Inoue
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L29/7813 , H01L29/2003 , H01L29/41766 , H01L29/42368 , H01L29/66462 , H01L29/66734 , H01L29/7788 , H01L29/7789 , H01L29/78
摘要： It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. A GaN-based stacked layer 15 includes n−-type GaN drift layer 4/p-type GaN barrier layer 6/n+-type GaN contact layer 7. An opening 28 extends from a top layer and reaches the n−-type GaN drift layer 4. The semiconductor device includes a regrown layer 27 located so as to cover a wall surface and a bottom portion of the opening, the regrown layer 27 including an electron drift layer 22 and an electron source layer 26, a source electrode S located around the opening, a gate electrode G located on the regrown layer in the opening, and a bottom insulating layer 37 located in the bottom portion of the opening.
摘要翻译：本发明的目的是提高具有开口的垂直半导体器件的击穿电压特性，并且在开口中包括由二维电子气形成的沟道。 GaN基叠层15包括n型GaN漂移层4 / p型GaN势垒层6 / n +型GaN接触层7.开口28从顶层延伸并到达n型GaN漂移该半导体器件包括重新生长层27，其被覆盖以覆盖开口的壁表面和底部，再生长层27包括电子漂移层22和电子源层26，源电极S位于开口，位于开口中的再生长层上的栅极电极G和位于开口底部的底部绝缘层37。

10. 发明授权

US08969920B2 Vertical GaN-based semiconductor device 有权
标题翻译：垂直GaN基半导体器件
公开(公告)号：US08969920B2
公开(公告)日：2015-03-03
申请号：US13824248
申请日：2011-07-06
申请人： Makoto Kiyama , Yu Saitoh , Masaya Okada , Masaki Ueno , Seiji Yaegashi , Kazutaka Inoue , Mitsunori Yokoyama
发明人： Makoto Kiyama , Yu Saitoh , Masaya Okada , Masaki Ueno , Seiji Yaegashi , Kazutaka Inoue , Mitsunori Yokoyama
IPC分类号： H01L29/66 , H01L29/778 , H01L29/20 , H01L29/423
CPC分类号： H01L29/778 , H01L29/2003 , H01L29/4236 , H01L29/66431 , H01L29/66462 , H01L29/7788 , H01L29/7789
摘要： A vertical semiconductor device in which pinch-off characteristics and breakdown voltage characteristics can be stably improved by fixing the electric potential of a p-type GaN barrier layer with certainty is provided. The semiconductor device includes a GaN-based stacked layer having an opening, a regrown layer including a channel located so as to cover a wall surface of the opening, an n+-type source layer that is in ohmic contact with the source electrode, a p-type GaN barrier layer, and a p+-type GaN-based supplementary layer located between the p-type GaN barrier layer and the n+-type source layer. The p+-type GaN-based supplementary layer and the n+-type source layer form a tunnel junction to fix the electric potential of the p-type GaN barrier layer at a source potential.
摘要翻译：提供了通过确定地固定p型GaN势垒层的电位可以稳定地提高夹断特性和击穿电压特性的垂直半导体器件。半导体器件包括具有开口的GaN基层叠层，包含覆盖开口壁面的沟道的再生长层，与源电极欧姆接触的n +型源极，p 位于p型GaN势垒层和n +型源极层之间的p +型GaN基辅助层。 p +型GaN基辅助层和n +型源极层形成隧道结，以将p型GaN阻挡层的电位固定在源极电位。

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