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1. 发明公开

KR1020090014870A ＤｙＳｃ０３ 막을 포함하는 반도체 박막의 적층 구조 및 그 형성방법 有权
标题翻译：通过ALD形成DYSCO 3膜的方法，包含DYSCO 3膜的半导体膜片及其形成方法
公开(公告)号：KR1020090014870A
公开(公告)日：2009-02-11
申请号：KR1020070079172
申请日：2007-08-07
申请人： 삼성전자주식회사
发明人： 최훈상 , 이승환 , 구봉진 , 김선정 , 정천형 , 임상욱 , 김영선
IPC分类号： H01L21/20
CPC分类号： H01L29/513 , C23C16/40 , C23C16/45531 , C23C16/45553 , H01L21/28194 , H01L21/3141 , H01L21/31604 , H01L29/517 , H01L29/78
摘要： A method for formation of dysco3 film by ALD, semiconductor film stack containing DysScO3 film and method for formation of the same are provided to transfer and supply easily the source materials of low vapor pressure by transporting the source materials of the liquid state of the room temperature by the vaporizer. The Dy source material and Sc source material are carried in the liquid state to the vaporizer(110) positioned in one end of the chamber(100) through liquid conveying lines(120a,120b). The source materials in the liquid state are vaporized in the vaporizer. The vaporized source materials are successively supplied into the chamber to form the DyScO3 film on the substrate by ALD. The Dy source material inlcudes the Dy(EDMDD)3. The Sc source material includes the Sc(EDMDD)3.
摘要翻译：提供了通过ALD形成dysco3膜的方法，含有DysScO 3膜的半导体膜堆及其形成方法，通过输送室温液态的原料轻易地转移和供给低蒸气压源通过蒸发器。 Dy源材料和Sc源材料通过液体输送管线（120a，120b）以液态运送到位于室（100）一端的蒸发器（110）。处于液态的源材料在蒸发器中蒸发。蒸发的源材料依次供应到室中以通过ALD在衬底上形成DyScO 3膜。 Dy源材料包括Dy（EDMDD）3。 Sc源材料包括Sc（EDMDD）3。

2. 发明公开

KR1020080093624A 반도체 소자용 다층 유전막 및 그 제조 방법 无效
标题翻译：用于半导体器件的多层电介质膜及其制造方法
公开(公告)号：KR1020080093624A
公开(公告)日：2008-10-22
申请号：KR1020070037583
申请日：2007-04-17
申请人： 삼성전자주식회사
发明人： 이종철 , 강상열 , 임기빈 , 최훈상 , 정은애
IPC分类号： H01L21/31 , H01L27/108
CPC分类号： H01L21/022 , H01L21/02178 , H01L21/02192 , H01L21/02194 , H01L21/31641 , H01L21/31645 , H01L27/10852 , H01L28/56 , H01L29/511
摘要： A multiple dielectric film for a semiconductor device and a method for manufacturing the same are provided to prevent oxidization of a lower electrode during a formation of a capacitor of the semiconductor device, thereby reducing the leakage current of the semiconductor device by using the multiple dielectric film as a dielectric film of the semiconductor device. A multiple dielectric film(130) for a semiconductor device includes at least two staked dielectric layers. Each of the dielectric layers is made of a composite layer(110) composed of a zirconium-hafnium oxide or a metal oxide layer(120) composed of an amorphous metal oxide. Adjacent dielectric layers are made by different materials. The dielectric layers are three stacked layers. The three stacked layers have a first dielectric layer composed of the composite layer, a second dielectric layer composed of the metal oxide layer, and a third dielectric layer composed of the composite layer. The metal oxide layer is composed of Al2O3, La2O3, Y2O3, LaAlO3, or YAlO3.
摘要翻译：提供一种用于半导体器件的多电介质膜及其制造方法，用于在半导体器件的电容器形成期间防止下电极的氧化，从而通过使用多个电介质膜来减少半导体器件的漏电流作为半导体器件的电介质膜。用于半导体器件的多重电介质膜（130）包括至少两个固定的电介质层。每个电介质层由由氧化锆锆或由非晶态金属氧化物构成的金属氧化物层（120）构成的复合层（110）制成。相邻的电介质层由不同的材料制成。电介质层是三层叠层。三层叠层具有由复合层构成的第一电介质层，由金属氧化物层构成的第二电介质层和由复合层构成的第三电介质层。金属氧化物层由Al2O3，La2O3，Y2O3，LaAlO3或YAlO3组成。

3. 发明公开

KR1020080079491A 고유전막을 갖는 커패시터의 제조 방법 및 이에 의해제조된 커패시터 无效
标题翻译：制造具有高K电介质和电容器的电容器的方法
公开(公告)号：KR1020080079491A
公开(公告)日：2008-09-01
申请号：KR1020070019744
申请日：2007-02-27
申请人： 삼성전자주식회사
发明人： 정은애 , 이종철 , 오규환 , 윤경렬 , 임기빈 , 여재현 , 최훈상 , 강상열
IPC分类号： H01L27/108 , H01L27/04
CPC分类号： H01L28/40 , H01L27/10855 , H01L28/91
摘要： A method for fabricating a capacitor having a high-k dielectric and a capacitor manufactured by the method are provided to improve the electrical characteristic of a cell capacitor by forming a titanium nitride layer on a first dielectric. A lower electrode(120a) is formed on a semiconductor substrate(100). A first dielectric(134) having a metal oxide layer is formed on the lower electrode. A titanium nitride layer is deposited on the first dielectric to form a second dielectric(136) on an upper surface of the first dielectric, and also an upper electrode is formed on the second dielectric. The titanium nitride layer contains excessive titanium than nitride. In case the titanium nitride layer is TixN1-x(0
摘要翻译：提供一种制造具有高k电介质的电容器和通过该方法制造的电容器的方法，以通过在第一电介质上形成氮化钛层来改善电池电容器的电特性。在半导体衬底（100）上形成下电极（120a）。具有金属氧化物层的第一电介质（134）形成在下电极上。氮化钛层沉积在第一电介质上以在第一电介质的上表面上形成第二电介质（136），并且在第二电介质上形成上电极。氮化钛层含有比氮化物更多的钛。在氮化钛层为TixN1-x（0

4. 发明授权

KR101524510B1 커패시터 및 이의 제조 방법 有权
公开(公告)号：KR101524510B1
公开(公告)日：2015-06-02
申请号：KR1020080120358
申请日：2008-12-01
申请人： 삼성전자주식회사
发明人： 최훈상 , 임기빈 , 오세훈 , 강상열 , 유차영
IPC分类号： H01G4/30 , H01G4/005
CPC分类号： H01G4/33 , H01G4/01 , H01L27/10817 , H01L27/10852 , H01L28/91
摘要： 커패시터는기판, 다수개의제1 스토리지전극들, 다수개의제2 스토리지전극들, 제1 지지막패턴, 유전막및 플레이트전극을포함한다. 상기기판에는다수개의콘택패드들이형성된다. 상기제1 스토리지전극들은상기콘택패드들과각각전기적으로연결되며, 제1 방향과평행한라인들을따라배열된다. 상기제2 스토리지전극들은상기제1 스토리지전극들상에각각적층된다. 상기제1 지지막패턴은서로인접한상기제2 스토리지전극들사이를상기제1 방향과평행한방향을따라연장하며, 상기인접한제2 스토리지전극들과접촉하여지지한다. 상기유전막은상기제1 및제2 스토리지전극들상에형성된다. 상기플레이트전극은상기유전막상에형성된다.

5. 发明公开

KR1020090081471A 원자층 증착설비 및 그의 원자층 증착방법 有权
标题翻译：沉积原子层的设备
公开(公告)号：KR1020090081471A
公开(公告)日：2009-07-29
申请号：KR1020080007344
申请日：2008-01-24
申请人： 삼성전자주식회사
发明人： 김기현 , 임기빈 , 최훈상 , 한문형
IPC分类号： H01L21/203
CPC分类号： H01L21/30 , C23C16/45546 , C23C16/45551 , C23C16/45578
摘要： A device and a method for depositing an atomic layer are provided to perform the deposition on a plurality of semiconductor substrates at the same time, thereby improving throughput. A device for depositing an atomic layer comprises a reaction chamber(10), a heater(20) and a plurality of injectors(30a, 30b). The reaction chamber has an independent space. The heater supports a plurality of constant-distance semiconductor substrates(12) within the reaction chamber. The heater heats the semiconductor substrates. The injectors are individually switched according to the semiconductor substrates supported by the heater. The injectors spray a reaction gas on the semiconductor substrates.
摘要翻译：提供一种用于沉积原子层的装置和方法，以同时在多个半导体衬底上进行沉积，从而提高生产量。用于沉积原子层的装置包括反应室（10），加热器（20）和多个喷射器（30a，30b）。反应室具有独立的空间。加热器在反应室内支撑多个恒定距离半导体衬底（12）。加热器加热半导体衬底。注射器根据由加热器支撑的半导体衬底单独切换。喷射器在半导体衬底上喷射反应气体。

6. 发明公开

KR1020090074902A 비휘발성 반도체 메모리 장치의 제조 방법 无效
标题翻译：制造非易失性半导体存储器件的方法
公开(公告)号：KR1020090074902A
公开(公告)日：2009-07-08
申请号：KR1020080000603
申请日：2008-01-03
申请人： 삼성전자주식회사
发明人： 임상욱 , 이승환 , 김선정 , 최훈상 , 정천형 , 김영선
IPC分类号： H01L27/115 , H01L21/8247 , B82Y10/00
CPC分类号： H01L27/11521 , H01L21/28273 , H01L29/517 , H01L29/66825
摘要： A method of manufacturing a non-volatile semiconductor memory device is provided to solve lifting of a dielectric film and a control gate by removing an impurity from a floating gate efficiently through a thermal process. In a method of manufacturing a non-volatile semiconductor memory device, a turner insulating layer(18) is formed on a substrate(10). A first floating gate film(20) including a poly-silicon is formed on the turner insulating layer, and a second preliminary floating gate film including the first metal is formed on the first floating gate film. The second preliminary floating gate film is thermal-treated and the second floating gate film(22a) is formed. A dielectric layer is formed on the second floating gate film, and the control gate layer is formed on the dielectric layer.
摘要翻译：提供一种制造非挥发性半导体存储器件的方法，用于通过热处理有效地从漂浮栅去除杂质来解决电介质膜和控制栅极的提升。在制造非易失性半导体存储器件的方法中，在衬底（10）上形成转子绝缘层（18）。在所述转鼓绝缘层上形成包括多晶硅的第一浮栅（20），并且在所述第一浮栅上形成包括所述第一金属的第二初步浮栅。第二初步浮栅膜进行热处理，形成第二浮栅膜（22a）。在第二浮栅上形成电介质层，在电介质层上形成控制栅极层。

7. 发明公开

KR1020090005648A 플래시 메모리 소자 및 그 제조 방법 无效
标题翻译：闪存存储器件及其制造方法
公开(公告)号：KR1020090005648A
公开(公告)日：2009-01-14
申请号：KR1020070068844
申请日：2007-07-09
申请人： 삼성전자주식회사
发明人： 정천형 , 이승환 , 구봉진 , 김선정 , 최훈상 , 임상욱 , 김영선
IPC分类号： H01L21/8247
CPC分类号： H01L29/792 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L29/513
摘要： The flash memory device and manufacturing method thereof are provided to prevent the electric charge tunneling between the gate electrodes and charge trapping layer and to improve data retention characteristic. The tunnel insulating layer(130) is formed on the substrate(110). The charge trapping layer(140) is formed on the tunnel insulating layer. The lower buffer layer(150) is formed on the charge trapping layer. The blocking film(160) is formed on the lower buffer layer. The first gate electrode(170) is formed on the blocking film. The second gate electrode(180) is formed on the first gate electrode. The lower buffer layer comprises the blocking film having no silicon. The blocking layer includes 3 element lanthanum compound.
摘要翻译：提供闪速存储器件及其制造方法，以防止栅电极和电荷捕获层之间的电荷隧穿，并提高数据保持特性。隧道绝缘层（130）形成在基板（110）上。电荷俘获层（140）形成在隧道绝缘层上。下部缓冲层（150）形成在电荷俘获层上。阻挡膜（160）形成在下缓冲层上。第一栅电极（170）形成在阻挡膜上。第二栅电极（180）形成在第一栅电极上。下缓冲层包括没有硅的阻挡膜。阻挡层包括3元素镧化合物。

8. 发明授权

KR101552937B1 반도체 기판의 수분 제거 방법 및 이를 이용한 원자층 증착방법 有权
标题翻译：从半导体衬底去除水的方法和使用该方法的原子层沉积方法
公开(公告)号：KR101552937B1
公开(公告)日：2015-09-15
申请号：KR1020090006985
申请日：2009-01-29
申请人： 삼성전자주식회사
发明人： 김기철 , 김윤수 , 임기빈 , 유차영 , 이종철 , 박기연 , 최훈상 , 오세훈
IPC分类号： H01L21/306
CPC分类号： H01L21/314 , H01L21/02041 , H01L21/67034
摘要： 본발명은반도체기판상에흡착되거나결합된수분(HO)를제거하는반도체기판의수분제거방법및 이를이용한원자층증착방법에관한것으로서, 더욱구체적으로는상기반도체기판의표면을화학용매와접촉시키는단계; 및상기반도체기판의표면으로부터상기화학용매를제거하는단계를포함하는수분제거방법및 이를이용한원자층증착방법에관한것이다. 본발명의수분제거방법을이용하면, 반도체기판으로부터수분을충분히제거할수 있기때문에우수한성능의반도체소자를제조할수 있게된다.

9. 发明公开

KR1020100087921A 반도체 기판의 수분 제거 방법 및 이를 이용한 원자층 증착방법 有权
标题翻译：从半导体基板去除水的方法及使用其的原子层沉积方法
公开(公告)号：KR1020100087921A
公开(公告)日：2010-08-06
申请号：KR1020090006985
申请日：2009-01-29
申请人： 삼성전자주식회사
发明人： 김기철 , 김윤수 , 임기빈 , 유차영 , 이종철 , 박기연 , 최훈상 , 오세훈
IPC分类号： H01L21/306
CPC分类号： H01L21/314 , H01L21/02041 , H01L21/67034
摘要： PURPOSE: A water eliminating method of a semiconductor substrate and an atomic layer deposition method thereof are provided to improve the performance of a semiconductor device by sufficiently removing the moisture from a semiconductor substrate. CONSTITUTION: A test tube is purged with argon gas for 5 seconds(S202). A 1-butanol liquid is removed through a trap part after passing through 1-butanol liquid into the inside the test tube(S204). The inside of the test tube is purged with the argon gas for 30 seconds(S205). A first vacuum is formed with a second rotary pump(S206). After a designated time passes, a second vacuum, which has higher vacuum degree than the first vacuum, is formed with a TMP pump(S207).
摘要翻译：目的：提供半导体衬底的除水方法及其原子层沉积方法，以通过从半导体衬底充分去除水分来改善半导体器件的性能。构成：用氩气吹扫试管5秒钟（S202）。在将1-丁醇液体通入试管内之后，将1-丁醇液通过捕集部分除去（S204）。用氩气吹扫试管内部30秒钟（S205）。用第二旋转泵形成第一真空（S206）。在指定时间过去之后，用TMP泵形成具有比第一真空度更高的真空度的第二真空（S207）。

10. 发明授权

KR100849854B1 반도체 소자 및 그 제조 방법 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：KR100849854B1
公开(公告)日：2008-08-01
申请号：KR1020070018409
申请日：2007-02-23
申请人： 삼성전자주식회사
发明人： 강상열 , 이종철 , 임기빈 , 최훈상 , 정은애
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L28/40 , H01L27/10852
摘要： A semiconductor device and a manufacturing method thereof are provided to form a hafnium oxide layer having a tetragonal crystal structure by using a zirconium oxide layer having a tetragonal crystal structure. A multilayer dielectric(140) including a first dielectric layer(120) and a second dielectric layer(130) is positioned on a semiconductor substrate(100). The first dielectric layer has a tetragonal crystal structure. The second dielectric is composed of a material different from the material of the first dielectric. A dielectric constant of the second dielectric layer is larger than a dielectric constant of the first dielectric layer. The second dielectric layer has a tetragonal crystal structure. A part of a crystalline structure of the second dielectric layer is continued from a part of a crystalline structure of the first dielectric layer.
摘要翻译：提供半导体器件及其制造方法，通过使用具有四方晶体结构的氧化锆层，形成具有四方晶系结构的氧化铪层。包括第一介电层（120）和第二介电层（130）的多层电介质（140）位于半导体衬底（100）上。第一介电层具有四方晶体结构。第二电介质由与第一电介质的材料不同的材料构成。第二电介质层的介电常数大于第一电介质层的介电常数。第二介电层具有四方晶体结构。第二电介质层的结晶结构的一部分从第一介电层的晶体结构的一部分继续。

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