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1. 发明授权

KR101942722B1 전력 모듈 패키지 有权
公开(公告)号：KR101942722B1
公开(公告)日：2019-01-28
申请号：KR1020130126608
申请日：2013-10-23
申请人： 삼성전기주식회사
发明人： 양시중 , 김광명 , 류종인 , 오규환
IPC分类号： H01L25/065 , H01L23/04 , H01L23/52 , H01L23/28

2. 发明授权

KR101443972B1 일체형 전력 반도체 모듈 有权
标题翻译：一体化功率半导体模块
公开(公告)号：KR101443972B1
公开(公告)日：2014-09-23
申请号：KR1020120122515
申请日：2012-10-31
申请人： 삼성전기주식회사
发明人： 김광수 , 양시중 , 서범석 , 곽영훈 , 하욥
IPC分类号： H01L23/495
CPC分类号： H01L23/043 , H01L23/049 , H01L23/14 , H01L23/3735 , H01L24/36 , H01L24/37 , H01L24/40 , H01L2224/371 , H01L2224/37147 , H01L2224/37155 , H01L2224/3716 , H01L2224/37599 , H01L2224/40095 , H01L2224/40137 , H01L2224/40225 , H01L2224/48091 , H01L2924/12041 , H01L2924/1305 , H01L2924/13055 , H01L2924/19105 , H01L2924/00014 , H01L2924/00
摘要： 본 발명은 일체형 전력 반도체 모듈에 관한 것으로, 기판상에 형성된 다수의 제1 반도체 소자; 상기 다수의 제1 반도체 소자의 상부를 가로지르도록 형성된 브릿지를 포함하도록 사출 형성된 하우징 및 상기 하우징에 일체로 형성되고, 상기 다수의 제1 반도체 소자와 상기 기판을 전기적으로 연결하는 다수의 리드 부재를 포함한다.
본 발명에 따르면, 반도체 소자의 접합 면적 및 접합 강도를 증가시켜 신뢰성 문제를 개선할 수 있을 뿐만 아니라, 반도체 소자의 정렬 및 반도체 소자의 높이에 따른 단차 조절에 의한 공정성 향상 및 불량 감소를 가져올 뿐만 아니라 와이어 본딩 삭제에 의한 공정 시간을 감출할 수 있다.

3. 发明公开

KR1020140017325A 반도체 패키지, 반도체 패키지 제조 방법 및 반도체 패키지 제조 금형 有权
标题翻译：半导体封装及其制造方法及半导体封装制造模具
公开(公告)号：KR1020140017325A
公开(公告)日：2014-02-11
申请号：KR1020120084153
申请日：2012-07-31
申请人： 삼성전기주식회사
发明人： 양시중 , 채준석 , 김태현 , 이석호
IPC分类号： H01L23/498 , H01L23/495
CPC分类号： H01L23/481 , H01L21/561 , H01L21/565 , H01L24/97 , H01L2224/16245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48247 , H01L2224/97 , H01L2924/181 , H01L2924/19105 , H01L2224/85 , H01L2224/81 , H01L2924/00
摘要： According to an embodiment of the present invention, a semiconductor package may include an inner lead on which one or more electronic components are installed by one side; a mold part for sealing the electronic components and the inner lead; a plurality of outer leads extending from the inner lead and protruding from the mold part towards the outside; and a stopper on the outer lead.
摘要翻译：根据本发明的实施例，半导体封装可以包括一个内部引线，一个或多个电子元件一侧安装在该引线上; 用于密封电子部件和内部引线的模具部件; 从所述内引线延伸并从所述模具部分朝向外部突出的多个外引线; 和外引线上的塞子。

4. 发明公开

KR1020120053741A 관성센서 失效
标题翻译：惯性传感器
公开(公告)号：KR1020120053741A
公开(公告)日：2012-05-29
申请号：KR1020100115015
申请日：2010-11-18
申请人： 삼성전기주식회사
发明人： 박흥우 , 정원규 , 이현기 , 양시중
IPC分类号： G01P15/08 , G01P3/44 , G01P13/00
CPC分类号： G01C19/5783
摘要： PURPOSE: An inertia sensor is provided to improve driving properties, a Q value, and design freedom of space conjugation by optimizing thickness of a cap covering a driver and a piezoelectric element, and distance between the driver and the piezoelectric element. CONSTITUTION: An inertia sensor(100) comprises a sensor unit(110), an ASIC(Application Specific Integrated Circuit) chip(120), a molding unit(130), a wire(140), and a lead frame(150). The sensor unit comprises a driver(111), a flexible substrate unit(112), a supporter(113), a top cap(114), and a bottom cap(115). The flexible substrate unit comprises a flexible substrate, an electrode, and a piezoelectric element. The flexible substrate is composed of a silicon substrate or an SOI(Silicon on Insulator) substrate. The driver is located at the lower side of the flexible substrate unit which can be displaced. The supporter supports the driver and the flexible substrate. The top cap and the bottom cap respectively protect the flexible substrate, the electrode, and the piezoelectric element of the flexible substrate.
摘要翻译：目的：通过优化覆盖驱动器和压电元件的盖的厚度以及驱动器和压电元件之间的距离来提供惯性传感器来改善驱动特性，Q值和空间共轭的设计自由度。构造：惯性传感器（100）包括传感器单元（110），ASIC（专用集成电路）芯片（120），模制单元（130），导线（140）和引线框架（150）。传感器单元包括驱动器（111），柔性基板单元（112），支撑件（113），顶盖（114）和底盖（115）。柔性基板单元包括柔性基板，电极和压电元件。柔性基板由硅衬底或SOI（绝缘体上硅）衬底构成。驱动器位于可移动的柔性基板单元的下侧。支持者支持驱动器和柔性基板。顶盖和底盖分别保护柔性基板，柔性基板的电极和压电元件。

5. 发明公开

KR1020090002887A 웨이퍼 레벨 디바이스 패키징 방법 有权
标题翻译：包装水平装置包装的方法
公开(公告)号：KR1020090002887A
公开(公告)日：2009-01-09
申请号：KR1020070067253
申请日：2007-07-04
申请人： 삼성전기주식회사
发明人： 박승욱 , 최천 , 양징리 , 홍주표 , 양시중
IPC分类号： H01L23/12
CPC分类号： H01L21/78 , H01L21/0231 , H01L21/0273 , H01L21/268 , H01L23/481 , H01L23/4828
摘要： The wafer level device packaging method is provided to prevent the generation of warpage in the thermal process and to reduce the stress about the wafer for device substrate and the wafer for the cap substrate. The wafer(10) for the cap substrate is mounted on the wafer supporter (Wafer Support Substrate)(20) by the medium of the adhesive(12). The separate space(13) is formed for setting up the cutting line(50) and for surrounding a plurality of vias(11). The upper seal ring pattern(14) is formed with the closed line. The wafer supporter and the wafer are bonded by adhesive. The warpage by the thermal expansion can be prevented by the separate space.
摘要翻译：提供了晶片级装置封装方法以防止在热处理中产生翘曲并且减小用于器件衬底的晶片和盖衬底的晶片的应力。用于盖基板的晶片（10）通过粘合剂（12）的介质安装在晶片支撑件（晶片支撑基板）（20）上。分离空间（13）形成用于设置切割线（50）并围绕多个通路（11）。上密封圈图案（14）形成有闭合线。晶片支架和晶片通过粘合剂粘合。可以通过分开的空间来防止热膨胀的翘曲。

6. 发明授权

KR100866619B1 웨이퍼 레벨의 이미지센서 모듈 및 그 제조방법, 그리고카메라 모듈 失效
标题翻译： WAFER水平图像传感器模块及其制造方法及相机模块
公开(公告)号：KR100866619B1
公开(公告)日：2008-11-03
申请号：KR1020070097803
申请日：2007-09-28
申请人： 삼성전기주식회사
发明人： 박승욱 , 양징리 , 홍주표 , 양시중
IPC分类号： H01L23/12 , H01L27/146
CPC分类号： H01L27/14618 , H01L27/14683 , H01L2224/02372 , H01L2224/05001 , H01L2224/05009 , H01L2224/05024 , H01L2224/05548 , H01L2224/13 , H01L2924/00014 , H01L2224/05599
摘要： An interconnection process for the external connection including via etc can be facilitated. The reliability can be improved. The focusing unregulated can be achieved in using a camera module. The image sensor includes a wafer(11); the image sensor(12) mounted on the wafer; the transparent member mounted on the wafer in order to seal the image sensor; the via which is formed on wafer and located in the outer side of the transparent member(14); the upper pad(15) formed in the top end portion of via; the encapsulation part(16) formed in the outer side of the transparent member in the upper side of wafer; the external connection member(18) electrically connected to the bottom part of via.
摘要翻译：可以促进用于包括通孔等的外部连接的互连处理。可靠性得到提高。在使用相机模块时可以实现未调节的对焦。图像传感器包括晶片（11）; 安装在晶片上的图像传感器（12）透明构件安装在晶片上以便密封图像传感器; 形成在晶片上并位于透明构件（14）的外侧的通孔; 上焊盘（15）形成在通孔的顶端部分中; 形成在晶片上侧的透明构件的外侧的封装部（16）电连接到通孔的底部的外部连接构件（18）。

7. 发明授权

KR102248527B1 이미지 센서 패키지 有权
公开(公告)号：KR102248527B1
公开(公告)日：2021-05-06
申请号：KR1020190051574
申请日：2019-05-02
申请人： 삼성전기주식회사
发明人： 유도재 , 김병헌 , 남궁용길 , 홍종철 , 양시중
IPC分类号： H01L27/146 , H01L23/31
摘要： 본발명의일 실시예에따른이미지센서패키지는기판; 상기기판에실장되며, 본딩와이어에의해상기기판과연결되는이미지센서; 상기이미지센서의일부와상기본딩와이어를밀봉하며, 상기이미지센서의유효촬상면을노출시키는홀이형성된밀봉부재; 적어도일부가상기밀봉부재에삽입되도록상기이미지센서에형성된반사체; 및상기밀봉부재에부착되는필터;를포함할수 있다.

8. 发明公开

KR1020150035253A 전력 반도체 패키지 审中-实审
标题翻译：功率半导体封装
公开(公告)号：KR1020150035253A
公开(公告)日：2015-04-06
申请号：KR1020130115583
申请日：2013-09-27
申请人： 삼성전기주식회사
发明人： 오규환 , 양시중 , 유도재 , 곽영훈
IPC分类号： H01L23/34
CPC分类号： H01L23/49568 , H01L23/3107 , H01L23/367 , H01L23/49537 , H01L23/49541 , H01L23/49562 , H01L23/49575 , H01L2224/291 , H01L2224/32245 , H01L2924/1305 , H01L2924/13055 , H01L2924/1815 , H01L2924/014 , H01L2924/00
摘要： 본발명은전력반도체패키지에관한것이다. 본발명의실시예에따른전력반도체패키지는반도체소자, 반도체소자에형성되는회로패턴, 반도체소자및 회로패턴을매립하되, 회로패턴의일면이노출되도록형성되는몰딩부재및 몰딩재에의해노출된회로패턴에접합되며, 비전도성물질로형성된방열부재를포함할수 있다.
摘要翻译：功率半导体封装技术领域本发明涉及功率半导体封装。根据本发明的实施例的功率半导体封装可以包括：半导体器件，形成在半导体器件中的电路图案，填充电路图案和半导体器件并暴露电路图案的侧面的模制构件，以及接触由模制构件露出的电路图案并由非导电材料制成的散热构件。

9. 发明公开

KR1020140087888A 반도체 모듈 패키지 有权
标题翻译：半导体模块封装
公开(公告)号：KR1020140087888A
公开(公告)日：2014-07-09
申请号：KR1020120158667
申请日：2012-12-31
申请人： 삼성전기주식회사
发明人： 김태현 , 서범석 , 조준형 , 양시중
IPC分类号： H01L25/065 , H01L25/16
CPC分类号： H01L23/3735 , H01L23/3736 , H01L2023/4056 , H01L2224/0603 , H01L2224/48095 , H01L2224/48137 , H01L2224/48139 , H01L2224/49113 , H01L2224/49175 , H01L2924/13034 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00014 , H01L2924/00 , H01L2224/49111
摘要： A semiconductor module package according to an embodiment of the present invention comprises a first module which includes a first heat radiating substrate and one or more first semiconductor devices and has a first N terminal and a first P terminal on one end; and a second module which includes a second heat radiating substrate and one or more second semiconductor devices, has a second N terminal and a second P terminal on one end, and is disposed to face the first module. The semiconductor module package further comprises a first output terminal formed as the first module and the second module are electrically connected to each other.
摘要翻译：根据本发明的实施例的半导体模块封装包括第一模块，其包括第一散热基板和一个或多个第一半导体器件，并且在一端具有第一N端子和第一P端子; 并且包括第二散热基板和一个或多个第二半导体器件的第二模块在一端具有第二N端子和第二P端子，并且被设置为面对第一模块。半导体模块封装还包括形成为第一模块的第一输出端子和第二模块彼此电连接。

10. 发明公开

KR1020120080335A 전자부품 소재가공물 절삭 장치 및 방법 无效
标题翻译：电子元件切割材料工件的设备和方法
公开(公告)号：KR1020120080335A
公开(公告)日：2012-07-17
申请号：KR1020110001720
申请日：2011-01-07
申请人： 삼성전기주식회사
发明人： 문복근 , 신연식 , 양시중 , 윤택희
IPC分类号： B26D1/14 , B26D3/00 , B26D5/38 , B28D1/24
CPC分类号： B26D1/157 , B26D5/005 , B26D7/0006
摘要： PURPOSE: A cutting device and a method thereof for worked materials of electronic components are provided to prevent the bending of a blade and a guide cover in the device guides the moving a blade. CONSTITUTION: A cutting device for worked materials of electronic components comprises a guide cover(120) and a blade(110). The guide cover covers the upside of the cut portion of a wafer(W) and a slit is formed in a guide cover in cutting direction. The lower portion of the blade is passed through the slit and the blade cuts a wafer.
摘要翻译：目的：提供一种用于电子部件加工材料的切割装置及其方法，以防止刀片的弯曲和装置中的引导盖引导移动刀片。构成：用于电子部件的加工材料的切割装置包括导向盖（120）和叶片（110）。引导盖覆盖晶片（W）的切割部分的上侧，并且狭缝在切割方向上形成在引导盖中。刀片的下部通过狭缝，刀片切割晶片。

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