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71. 发明授权

KR101412842B1 적층 세라믹 전자부품 有权
标题翻译：多层陶瓷电子元件
公开(公告)号：KR101412842B1
公开(公告)日：2014-06-27
申请号：KR1020120144137
申请日：2012-12-12
申请人： 삼성전기주식회사
发明人： 김위헌 , 김두영 , 최재열
IPC分类号： H01G4/12 , H01G4/30
CPC分类号： H01G4/30 , H01G4/012 , H01G4/12 , H01G4/232
摘要： 본 발명은 적층 세라믹 전자부품에 관한 것으로, 본 발명의 일 실시형태에 따른 적층 세라믹 전자부품은 유전체층을 포함하며, 서로 마주보는 제1, 제2 주면, 서로 마주보는 제1 측면, 제2 측면 및 서로 마주보는 제1, 제2 단면을 갖는 세라믹 본체; 상기 세라믹 본체의 내부에 용량을 형성하기 위한 용량부를 형성하는 중첩된 영역을 가지며 상기 중첩된 영역이 제1 측면에 노출되도록 형성되고, 상기 용량부로부터 제1 측면에 노출되도록 연장 형성된 제1 리드부를 갖는 제1 내부전극 및 상기 유전체층을 사이에 두고 상기 제1 내부전극과 교대로 적층되되 상기 제1 내부전극과 절연되며, 상기 용량부로부터 제1 측면에 노출되도록 연장 형성된 제2 리드부를 가지는 제2 내부전극을 포함하는 제1 블록; 상기 세라믹 본체의 내부에 형성되며, 용량을 형성하기 위한 중첩된 영역을 갖는 용량부와 상기 용량부로부터 상기 제1 측면에 노출되도록 연장 형성된 제3 리드부를 가지는 제3 내부전극 및 상기 유전체층을 사이에 두고 상기 제3 내부전극과 교대로 적층되되 상기 제3 내부전극과 절연되며, 상기 용량부로부터 제1 측면에 노출되도록 연장 형성된 제4 리드부를 가지는 제4 내부전극을 포함하는 제2 블록; 상기 제1 및 제3 리드부와 연결되어 형성되는 제1 외부전극과 상기 제2 및 제4 리드부와 연결되어 형성되는 제2 외부전극; 및 상기 세라믹 본체의 제1 측면에 형성되는 절연층;을 포함하며, 상기 제2 블록은 상기 제1 블록의 상부 및 하부에 배치될 수 있다.
摘要翻译：本发明涉及一种多层陶瓷电子器件，根据本发明的一个实施例的多层陶瓷电子器件包括电介质层，其中所述第一和第二主面彼此相对，第一侧，第二侧彼此面对，并具有彼此面对的第一和第二横截面的陶瓷体; 具有重叠区域用于形成所述陶瓷主体的内部的容量形成电容器是第一被形成为在侧表面上，以露出所述重叠区域的上方，以从所述电容器单元暴露于第一侧而延伸的第一引线最早具有放置在内部电极和层叠有内部电极交替与第一和绝缘从内部电极的第一doedoe的电介质层，这样延伸的第二引线之间，一个第一从电容器2暴露于侧包括内部电极的第一块; 第三内部电极，其形成在所述陶瓷主体内并具有电容器部分，所述电容器部分具有用于形成电容器的重叠区域和从所述电容器部分延伸以暴露到所述第一侧面的第三引线部分，与层叠有内部电极的第三doedoe和移位和第三介电层和内部电极，第二块包括第四内部电极4具有延伸的引线部，以使第一暴露于来自电容器单元的侧; 连接到第一和第三引线部分的第一外部电极以及连接到第二和第四引线部分的第二外部电极; 并且在陶瓷主体的第一侧表面上形成绝缘层，并且第二块可以设置在第一块的上方和下方。

72. 发明授权

KR101412950B1 적층 세라믹 커패시터 有权
标题翻译：多层陶瓷电容器
公开(公告)号：KR101412950B1
公开(公告)日：2014-06-26
申请号：KR1020120125174
申请日：2012-11-07
申请人： 삼성전기주식회사
发明人： 이종호 , 최재열 , 김두영 , 조항규 , 김응수 , 한병우
IPC分类号： H01G4/12 , H01G4/30
CPC分类号： H01G2/103 , H01G4/012 , H01G4/12 , H01G4/232 , H01G4/30 , H01L41/0472 , H01L41/0533
摘要： 본 발명의 일 실시형태는 유전체 층을 포함하는 세라믹 본체; 상기 세라믹 본체 일면에 형성되는 산화막; 상기 세라믹 본체의 일면에서 상기 산화막의 양측에 형성되는 제1 외부전극 및 제2 외부전극; 상기 유전체 층 상에 형성되며 상기 제1 외부전극으로 노출되는 제1 전극 인출부와 상기 산화막으로 노출되며 노출된 단부에 복합금속산화물 영역이 형성된 제1 절연 인출부를 포함하는 제1 내부전극; 및 상기 제2 외부전극으로 노출되는 제2 전극 인출부와 상기 산화막으로 노출되고 노출된 단부에 복합금속산화물 영역이 형성되어 있으며 상기 제1 절연 인출부와 중첩되어 부가 용량을 형성하는 제2 절연 인출부를 포함하며, 상기 제1 내부전극과 상기 유전체 층을 사이에 두고 대향하여 배치되는 제2 내부전극; 을 포함하는 적층 세라믹 전자부품을 제공한다.
摘要翻译：本发明的一个实施方案是包含介电层的陶瓷体; 在陶瓷体的一个表面上形成的氧化物膜; 第一外部电极和第二外部电极，其形成在陶瓷主体的一个表面上的氧化物膜的两侧上; 第一内部电极包括：形成于所述第一曝光到所述第一电极引出部和所述氧化物膜暴露于外部电极的电介质层，和形成于复合金属氧化物区域的第一绝缘拉伸到暴露的端部; 且其中所述第二电极设置在所述拉出部露出，并且形成被暴露于第二外部电极上的暴露的端部的复合金属氧化物区的氧化物和拉伸以形成附加电容器的第二绝缘重叠在第一分离出部分第二内部电极，设置在第一内部电极和介电层之间以便彼此面对; 本发明提供了一种多层陶瓷电子元件，包括：

73. 发明公开

KR1020140075459A 적층 세라믹 커패시터 및 그 제조 방법 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：KR1020140075459A
公开(公告)日：2014-06-19
申请号：KR1020120143822
申请日：2012-12-11
申请人： 삼성전기주식회사
发明人： 윤병권 , 김형준 , 최재열
IPC分类号： H01G4/30 , H01G4/12
CPC分类号： H01G4/30 , H01G4/012 , H01G4/12 , H01G4/228 , Y10T29/435
摘要： The present invention includes: a ceramic body in which multiple dielectric layers are stacked; multiple first and second internal electrodes which are alternately formed on the multiple dielectric layers and include first and second main body parts, which are mutually overlapped, and first and second lead parts, which have a mutually overlapped area and are formed to be extended in order to be exposed to one side of the ceramic body in one side of the first and second main body parts,; first and second external electrodes which are formed in one side of the ceramic body and are electrically connected respectively to the first and second lead parts; and an insulation layer which is formed in order to cover a part which is exposed to the first and second lead parts in one side of the ceramic body. In the provided multilayer ceramic capacitor, first and second connection surfaces which are respectively extended from the end part of the first and second main body parts and the end part of the first and second lead parts are formed in an inclined surface and satisfy a range of 0.03
摘要翻译：本发明包括：堆叠多个电介质层的陶瓷体; 多个第一和第二内部电极交替地形成在多个电介质层上，并且包括相互重叠的第一和第二主体部分以及具有相互重叠的区域并被形成为依次延伸的第一和第二引线部分在第一和第二主体部分的一侧暴露于陶瓷体的一侧; 第一和第二外部电极，其形成在陶瓷体的一侧，并分别电连接到第一和第二引线部分; 以及绝缘层，其形成为覆盖在陶瓷体的一侧暴露于第一和第二引线部分的部分。在所提供的多层陶瓷电容器中，分别从第一和第二主体部分的端部和第一和第二引线部分的端部分别延伸的第一和第二连接表面形成为倾斜表面，并且满足当将第一和第二内部电极的整个长度的1/2定义为A和从陶瓷体的中心到凝固第一或第二内部电极的点的长度时，对于B / A，0.03 <= B / A <= 0.90 第一或第二引线部分的连接表面为B.

74. 发明公开

KR1020140044606A 적층 세라믹 전자부품 및 이의 제조방법 有权
标题翻译：层压陶瓷电子部件及其制造方法
公开(公告)号：KR1020140044606A
公开(公告)日：2014-04-15
申请号：KR1020120110781
申请日：2012-10-05
申请人： 삼성전기주식회사
发明人： 김유나 , 김두영 , 이종호 , 최재열 , 김응수 , 김성우
IPC分类号： H01G4/12 , H01G4/30
摘要： The present invention relates to a multi-layer ceramic electronic component with high reliability and a large capacity and a manufacturing method thereof and, more particularly, to a multi-layer ceramic electronic component and a manufacturing method thereof, capable of improving the dimension precision of an external electrode by improving the step of an L margin part and uniformly coating the external electrode. According to the present invention, green delamination and a crack are suppressed, and the multi-layer ceramic electronic component with high reliability and a large capacity can be formed.
摘要翻译：本发明涉及一种具有高可靠性和大容量的多层陶瓷电子元件及其制造方法，更具体地涉及一种能够提高尺寸精度的多层陶瓷电子元件及其制造方法通过改善L边缘部分的台阶并均匀涂覆外部电极来形成外部电极。根据本发明，抑制了绿色分层和裂纹，可以形成具有高可靠性和大容量的多层陶瓷电子部件。

75. 发明授权

KR101376925B1 적층 세라믹 커패시터 및 그 제조 방법 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：KR101376925B1
公开(公告)日：2014-03-20
申请号：KR1020120142925
申请日：2012-12-10
申请人： 삼성전기주식회사
发明人： 윤병권 , 최재열 , 김상혁
IPC分类号： H01G4/12 , H01G4/30
CPC分类号： H01G4/12 , H01G4/012 , H01G4/232 , H01G4/30 , Y10T29/417
摘要： The present invention is provided to a laminated ceramic capacitor which comprises: a ceramic element with laminated multiple dielectric layers; a plurality of first and second internal electrodes each having first and second lid portions formed on the multiple dielectric layers in an alternate manner and having an overlapping range exposed by one side of the ceramic element; first and second external electrodes formed on one side of the ceramic element and electrically connected to the first and second lid portions respectively; and a first insulation layer formed to cover the exposed part of the first and second lid portions on one side of the ceramic element. The overlapping range of the first and second lid portions is formed in embossed shape with staggered arrangement
摘要翻译：本发明提供给层压陶瓷电容器，其包括：陶瓷元件，其具有层叠的多个介电层; 多个第一和第二内部电极，每个第一和第二内部电极具有以交替方式形成在所述多个电介质层上并且具有由所述陶瓷元件的一侧暴露的重叠范围的第一和第二盖部分; 第一外部电极和第二外部电极，分别形成在陶瓷元件的一侧并分别电连接到第一和第二盖部分; 以及形成为覆盖陶瓷元件一侧上的第一和第二盖部的暴露部分的第一绝缘层。第一和第二盖部分的重叠范围形成为具有交错布置的压花形状

76. 发明授权

KR101376921B1 적층 세라믹 커패시터 및 그 제조방법 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：KR101376921B1
公开(公告)日：2014-03-20
申请号：KR1020120143468
申请日：2012-12-11
申请人： 삼성전기주식회사
发明人： 김응수 , 이종호 , 최재열 , 김두영 , 김유나 , 김성우
IPC分类号： H01G4/30 , H01G4/12
CPC分类号： H01G4/01 , H01G4/00 , H01G4/012 , H01G4/224 , H01G4/232 , H01G4/30 , Y10T29/43
摘要： According to an embodiment of the present invention, provided is a multi-layer ceramic capacitor including: a ceramic main body which includes a dielectric layer and has first and second circumference sides facing each other, first and second lateral sides facing each other, and first and second cross sections facing each other; a first internal electrode which has a first pattern part exposed to the lateral side and cross section of the ceramic main body, and a first non-pattern part formed in a first corner part of the ceramic main body and a third corner part in the width-directional opposite side of the first corner part; a second internal electrode which is arranged to face the first internal electrode across the dielectric layer and has a second pattern part exposed to the lateral side and cross section of the ceramic main body and a second non-pattern part formed in second and fourth corner parts in the length-directional opposite side of the first and third corner parts; a first external electrode which is electrically connected to the first pattern part by being formed in an area where the second non-pattern part and the first pattern part on the first lateral side are overlapped, and is extended from the first lateral side to at least one side among first and second circumference sides and the second lateral side; a second external electrode which is electrically connected to the second pattern part by being formed in an area where the first non-pattern part and the second pattern part on the first lateral side are overlapped and is extended from the first lateral side to at least one side among the first and second circumference sides and the second lateral side; and an insulating layer which is formed to surround the first and second lateral sides, the first and second cross sections, and the first and second external electrodes on the first and second lateral sides.
摘要翻译：根据本发明的实施例，提供一种多层陶瓷电容器，其包括：陶瓷主体，其包括电介质层，并且具有彼此面对的第一和第二外周侧，彼此面对的第一和第二侧面，和相互面对的第二横截面; 第一内部电极，其具有暴露于陶瓷主体的侧面和横截面的第一图案部分和形成在陶瓷主体的第一角部的第一非图案部分和宽度方向的第三角部第一角部的方向相对侧; 第二内部电极，其布置成跨过电介质层面对第一内部电极，并且具有暴露于陶瓷主体的侧面和横截面的第二图案部分和形成在第二和第四角部的第二非图案部分在第一和第三角部的长度方向相对侧; 第一外部电极，其通过形成在所述第一侧面上的所述第二非图案部分和所述第一图案部分重叠的区域中而电连接到所述第一图案部分，并且从所述第一横向侧延伸至至少第一和第二圆周侧和第二侧面之间的一侧; 第二外部电极，其通过形成在所述第一侧面上的所述第一非图案部分和所述第二图案部分重叠并从所述第一横向侧延伸至至少一个的区域中而电连接到所述第二图案部分在第一和第二圆周侧和第二横向侧之间; 以及形成为围绕第一和第二横向侧面，第一和第二横截面以及第一和第二外侧上的第一和第二外部电极的绝缘层。

77. 发明授权

KR101376828B1 적층 세라믹 전자부품 및 그 제조방법 有权
标题翻译：多层陶瓷电子元件及其制造方法
公开(公告)号：KR101376828B1
公开(公告)日：2014-03-20
申请号：KR1020120028211
申请日：2012-03-20
申请人： 삼성전기주식회사
发明人： 안철순 , 최재열 , 심재혁 , 이영숙 , 최혜영 , 나은상
IPC分类号： H01G4/12 , H01G4/30
CPC分类号： H01G4/129 , H01G4/232 , H01G4/2325 , H01G4/30
摘要： 본발명은, 복수의유전체층이적층된세라믹소체; 상기세라믹소체의내부에형성된제1 및제2 내부전극; 상기세라믹소체의양측면에그 둘레를감싸도록형성되며, 상기제1 및제2 내부전극과전기적으로연결된제1 및제2 외부전극; 및글라스(glass) 성분을포함하며, 상기세라믹소체의외표면과상기제1 및제2 외부전극의단부와의틈새에형성된실링부; 를포함하는적층세라믹전자부품을제공한다.

78. 发明公开

KR1020140020473A 적층 세라믹 전자부품 및 이의 제조방법 无效
标题翻译：层压陶瓷电子部件及其制造方法
公开(公告)号：KR1020140020473A
公开(公告)日：2014-02-19
申请号：KR1020120086909
申请日：2012-08-08
申请人： 삼성전기주식회사
发明人： 김종한 , 김응수 , 이승호 , 최재열
IPC分类号： H01G4/12 , H01G4/30
CPC分类号： H01G4/005 , H01G4/012 , H01G4/12 , H01G4/30
摘要： The present invention relates to a laminated ceramic electronic components and a manufacturing method for the same. the present invention includes a ceramic main body on which a plurality of dielectric layers of which an average thickness is less than or equal to 0.65 μm is mounted; inner electrodes facing each other across the dielectric layer in the ceramic main body; and an outer electrode electrically connected to the inner electrode. If the average thickness of the dielectric layer is td and if the average thickness of the inner electrode is te, the laminated ceramic electronic component is satisfied with te/td
摘要翻译：层叠陶瓷电子部件及其制造方法技术领域本发明涉及层叠陶瓷电子部件及其制造方法。本发明包括陶瓷主体，其上安装有平均厚度小于或等于0.65μm的多个电介质层; 陶瓷主体中的电介质层彼此面对的内电极; 以及与内部电极电连接的外部电极。如果电介质层的平均厚度为td，并且如果内部电极的平均厚度为te，则层叠陶瓷电子部件满足te / td <= 0.77。

79. 发明公开

KR1020140012577A 적층 칩 전자부품, 그 실장 기판 및 포장체 有权
标题翻译：层压电子元件，安装板，包装单元
公开(公告)号：KR1020140012577A
公开(公告)日：2014-02-03
申请号：KR1020120124200
申请日：2012-11-05
申请人： 삼성전기주식회사
发明人： 조항규 , 안영규 , 최재열 , 김두영 , 윤석현 , 박지영
IPC分类号： H01G4/12 , H01G4/30 , H01G2/06
摘要： A laminated chip capacitor according to one embodiment of the present invention comprises: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction. When half of a thickness of the ceramic body is defined as A, a thickness of the lower cover layer is defined as B, half of a thickness of the active layer is defined as C, and a thickness of the upper cover layer is defined as D, the thickness (D) of the upper cover layer satisfies a range of D>=4 μm and a ratio (B+C)/A by which a central portion of the active layer deviates from a central portion of the ceramic body satisfies a range of 1.063
摘要翻译：根据本发明的一个实施例的叠片式电容器包括：陶瓷体，其包括内部电极和电介质层; 形成为在长度方向上覆盖陶瓷体的两端部的外部电极; 其中内部电极以相对的方式设置在其间插入电介质层的有源层以形成电容; 以及在厚度方向上形成在有源层的上部和下部上的上和下覆盖层。当陶瓷体的厚度的一半被定义为A时，下覆盖层的厚度被定义为B，有源层的厚度的一半被定义为C，并且将上覆盖层的厚度定义为 D，上覆盖层的厚度（D）满足D> =4μm的范围和有源层的中心部分偏离陶瓷体的中心部的比例（B + C）/ A满足范围为1.063 <=（B + C）/ A <= 1.745。上盖层和下盖层中的任一个可以包括通过亮度或其颜色的差异来区分陶瓷体的上部和下部的识别部分。

80. 发明公开

KR1020140005541A 적층 세라믹 전자부품 및 그 제조 방법 审中-实审
标题翻译：多层陶瓷电子部件及其制造方法
公开(公告)号：KR1020140005541A
公开(公告)日：2014-01-15
申请号：KR1020120073055
申请日：2012-07-04
申请人： 삼성전기주식회사
发明人： 이종호 , 최재열 , 김두영 , 박명준 , 김유나 , 김성우
IPC分类号： H01G4/12 , H01G4/30
CPC分类号： H01G4/012 , H01G4/005 , H01G4/0085 , H01G4/12 , H01G4/30
摘要： The present invention relates to a multilayer ceramic electronic component which includes: a ceramic body which includes a dielectric layer, first and third sides which face each other in the longitudinal direction of the dielectric layer, and second and fourth sides which face each other in the transverse direction of the dielectric layer; and a laminate part which includes a first internal electrode and a second internal electrode which face each other by interposing the dielectric layer in the ceramic body and are exposed to the first and third sides of the ceramic body. At least one residue removing path is formed to protrude from both sides of the first and second internal electrodes in parallel to the longitudinal direction of the ceramic body.
摘要翻译：多层陶瓷电子部件技术领域本发明涉及一种多层陶瓷电子部件，其包括：陶瓷体，其包括电介质层，在所述电介质层的长度方向上彼此相对的第一和第三侧以及在所述电介质层的纵向彼此相对的第二和第四侧电介质层的横向; 以及层压体部件，其包括通过将电介质层插入陶瓷体中而彼此面对的第一内部电极和第二内部电极，并暴露于陶瓷体的第一和第三侧。形成至少一个残留物去除路径，以平行于陶瓷体的纵向从第一和第二内部电极的两侧突出。

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