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91. 发明授权

KR100843367B1 인쇄회로기판 및 그 제조방법 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：KR100843367B1
公开(公告)日：2008-07-03
申请号：KR1020070021725
申请日：2007-03-06
申请人： 삼성전기주식회사
发明人： 신희범 , 고영관 , 박현진 , 문정호
IPC分类号： H05K3/42
CPC分类号： H05K3/421 , H05K3/4038 , H05K2201/09563
摘要： A printed circuit board and a method for manufacturing the same are provided to realize a fine circuit below a line/space of 10/10 without an additional facility by increasing the degree of freedom for securing a pattern plating thickness. A method for manufacturing a printed circuit board includes the steps of: preparing the printed circuit board having a via hole to conduct between layers; forming a metal seed layer(105) on the printed circuit board including the via hole; forming a first metal plating layer(106) by performing an electrolyte panel plating on the printed circuit board for a via charging at a first static current density and a first inverse current density; etching the metal seed layer and the metal plating layer to make a total thickness of the metal seed layer and the metal plating layer of 0.5 to 2um; forming a second metal plating layer(108) by performing electrolyte pattern plating on the etched printed circuit board for a circuit pattern thickness plating at a second static current density and a second inverse current density; and forming a circuit pattern(109) by removing the first metal plating layer and the metal seed layer of a portion where the second metal plating layer is not formed.
摘要翻译：提供一种印刷电路板及其制造方法，通过提高确保图案电镀厚度的自由度，通过附加设备实现10/10线以下的精细电路。一种制造印刷电路板的方法包括以下步骤：制备具有通孔以在层之间传导的印刷电路板; 在包括通孔的印刷电路板上形成金属种子层（105）; 通过在所述印刷电路板上进行电解质板电镀，以第一静态电流密度和第一反向电流密度进行通孔充电来形成第一金属镀层（106）; 蚀刻金属种子层和金属镀层，使金属种子层和金属镀层的总厚度为0.5〜2um; 通过在蚀刻的印刷电路板上以第二静态电流密度和第二反向电流密度进行电路图案厚度镀层的电解质图案电镀，形成第二金属镀层（108）; 以及通过去除不形成第二金属镀层的部分的第一金属镀层和金属种子层来形成电路图案（109）。

92. 发明授权

KR100815322B1 인쇄회로기판 및 그 제조방법 有权
标题翻译：印刷电路板及其制作方法
公开(公告)号：KR100815322B1
公开(公告)日：2008-03-19
申请号：KR1020070005228
申请日：2007-01-17
申请人： 삼성전기주식회사
发明人： 이양제 , 김굉식 , 김하일 , 유광선 , 이용직 , 임영규
IPC分类号： H05K1/02
CPC分类号： H05K1/11 , H05K3/28 , H05K3/4038
摘要： A printed circuit board and a method for manufacturing the same are provided to prevent an electric error by preventing a bonding material from flowing inside a via-hole when housing is attached to protect a semiconductor chip by forming a PIC(Photo Imageable Coverlay) to cover a half of a side contact hole. A printed circuit board includes a first insulation layer(102), a first circuit pattern(104), a second insulation layer(106), a second circuit pattern, and a PIC(Photo Imageable Coverlay). The first circuit pattern is formed on both sides of the first insulation layer. The second insulation layer is stacked on both sides of the first insulation layer. The second circuit pattern is formed on a top and a bottom of the second insulation layer. The PIC is stacked on the remained second circuit pattern except a wire bonding pad of the second circuit pattern formed on a top of the second insulation layer of the circuit region. The PIC is formed for a half of a side contact hole to be opened.
摘要翻译：提供一种印刷电路板及其制造方法，用于通过在安装壳体时防止接合材料在通孔内流动而防止电气错误，以通过形成PIC（可照像成像覆盖物）覆盖半导体芯片来保护半导体芯片一半的侧面接触孔。印刷电路板包括第一绝缘层（102），第一电路图案（104），第二绝缘层（106），第二电路图案和PIC（可照片成像覆盖层）。第一电路图案形成在第一绝缘层的两侧。第二绝缘层堆叠在第一绝缘层的两侧。第二电路图案形成在第二绝缘层的顶部和底部。除了形成在电路区域的第二绝缘层的顶部上的第二电路图案的引线接合焊盘之外，PIC堆叠在剩余的第二电路图案上。 PIC形成为要打开的侧接触孔的一半。

93. 发明公开

KR1020070103226A 동박 적층판과 그 제조방법 无效
标题翻译：铜箔层压板及其制造方法
公开(公告)号：KR1020070103226A
公开(公告)日：2007-10-23
申请号：KR1020060035064
申请日：2006-04-18
申请人： 한화테크윈 주식회사
发明人： 김덕흥 , 백재열
IPC分类号： H05K1/02 , H05K3/06 , H05K3/10
CPC分类号： H05K3/0026 , H05K3/022 , H05K3/4038
摘要： A copper clad laminate and a manufacturing method thereof are provided to improve reliability by improving the roughness of a surface contacted with a core substrate through etching or oxidation treatment. A manufacturing method of a copper clad laminate by laminating a copper thin film layer(120) on one or both surfaces of a core substrate(110) includes the steps of: treating the surface of the thin film layer(120), which faces the core substrate(110), to be rough; laminating the thin film layer(120) on the core substrate(110); and heating and compressing the thin film layer(120), and fixing the thin film layer(120) on the core substrate(110). The core substrate(110) is an insulating substrate including PI or FR4.
摘要翻译：提供覆铜层压板及其制造方法，以通过蚀刻或氧化处理改善与芯基板接触的表面的粗糙度来提高可靠性。通过在芯基板（110）的一个或两个表面上层叠铜薄膜层（120）的覆铜层压板的制造方法包括以下步骤：将薄膜层（120）的面向芯基板（110）粗糙; 将所述薄膜层（120）层压在所述芯基板（110）上; 以及加热和压缩所述薄膜层（120），并将所述薄膜层（120）固定在所述芯基板（110）上。核心基板（110）是包括PI或FR4的绝缘基板。

94. 发明公开

KR1020070101213A 배선막 상호 접속용 부재와 그 제조 방법 无效
标题翻译：用于互连接线的构件及其制造方法
公开(公告)号：KR1020070101213A
公开(公告)日：2007-10-16
申请号：KR1020077007837
申请日：2005-09-06
申请人： 인벤사스 코포레이션
发明人： 이이지마도모오 , 오다이라히로시 , 시마다도모카즈 , 이이지마아키후미
IPC分类号： H05K3/46 , H05K3/40
CPC分类号： H05K3/462 , H05K1/036 , H05K3/06 , H05K3/4038 , H05K2201/0154 , H05K2201/0355 , H05K2201/09827 , H05K2201/10378 , H05K2203/0113 , H05K2203/066 , H05K2203/1189 , H05K2203/1461 , Y10T29/49156
摘要： The connection resistance between a metal bump (8) and a metal layer (10) for forming a wiring film deposited later is further decreased, the connection stability is enhanced, the wiring path passing through the metal bump (8) is further shortened, the planarity is enhanced, and the metal bump (8) does not come out easily. A wiring film interconnecting member wherein a plurality of pillar-like metal bumps (8) composed of copper and having a cross-sectional area of the top surface smaller than that of the bottom surface and interconnecting the wiring films of a multilayer wiring board are buried in an interlayer insulation film (10) in such a way that at least one end projects. The upper surface of the interlayer insulation film (10) is so curved as to be high at a part in contact with the metal bump (8) and lower gradually as being farther therefrom.
摘要翻译：金属凸块（8）和用于形成稍后沉积的布线膜的金属层（10）之间的连接电阻进一步降低，连接稳定性提高，穿过金属凸块（8）的布线路径进一步缩短，平坦度提高，并且金属凸块（8）不容易脱出。一种布线膜互连构件，其中埋设有由铜构成的多个柱状金属凸块（8），其顶表面的横截面积小于底面的横截面面积并且互连多层布线板的布线膜在层间绝缘膜（10）中，至少一个端部突出。层间绝缘膜（10）的上表面弯曲成与金属凸块（8）接触的部分高，并且随着其越远逐渐下降。

95. 发明公开

KR1020070094896A 다층배선기판의 제조방법 失效
标题翻译：生产多层接线板的方法
公开(公告)号：KR1020070094896A
公开(公告)日：2007-09-27
申请号：KR1020077013198
申请日：2005-09-29
申请人： 데쿠세리아루즈 가부시키가이샤 , 인벤사스 코포레이션
发明人： 시미즈카즈히로 , 야기마사노부 , 하나무라,켄이치로 , 타카야스미츠유키 , 나가이키요에 , 이지마토모우
IPC分类号： H05K3/46 , H01L21/3205
CPC分类号： H05K3/4038 , B32B37/26 , B32B2457/08 , H05K3/022 , H05K3/06 , H05K3/4647 , H05K2201/0355 , H05K2203/0384 , H05K2203/0733 , H05K2203/1461 , Y10T29/49128 , Y10T29/49156 , Y10T29/49163
摘要： A process for producing a multilayer wiring board, comprising the steps of forming an insulating layer on a base material furnished with interlayer connection bumps, interposing the resultant mass between stainless steel plates and performing thermal compression bonding of a copper foil on the insulating layer, and patterning the copper foil. In the thermal compression bonding of a copper foil, a metal foil is interposed at least between the copper foil and each of the stainless steel plates. In this step, the interposed metal foil at the surface is provided with a mold release layer. Consequently, sticking of the product after molding (copper foil bonding) to the stainless steel plate can be prevented, and there can be obtained a multilayer wiring board that is free from occurrence of wrinkle and ruggedness and excels in dimensional stability.
摘要翻译：一种多层布线板的制造方法，其特征在于，在具有层间连接凸块的基材上形成绝缘层，在所述绝缘层之间插入所述质量不锈钢板之间并进行铜箔的热压接，图案化铜箔。在铜箔的热压接中，至少在铜箔和不锈钢板之间插入金属箔。在该步骤中，表面上插入的金属箔设置有脱模层。因此，能够防止成形后的产品（铜箔接合）粘附到不锈钢板上，并且可以获得不产生皱纹和粗糙度并且尺寸稳定性优异的多层布线板。

96. 发明公开

KR1020070065789A 회로판 및 그 제조방법 无效
标题翻译：电路板结构及其制作方法
公开(公告)号：KR1020070065789A
公开(公告)日：2007-06-25
申请号：KR1020060120239
申请日：2006-11-30
申请人： 피닉스 프리시젼 테크날로지 코포레이션
发明人： 왕싱-루 , 왕시엔쇼우 , 츄시-핑
IPC分类号： H05K3/40
CPC分类号： H05K3/4682 , H05K1/115 , H05K1/185 , H05K3/064 , H05K3/4038
摘要： A circuit board and a fabricating method thereof are provided to fabricate the circuit board without using a core, thereby effectively decreasing a thickness of the circuit board and thus easily diminish a size of a package product. A carrier board made of metal is prepared. An insulation protective layer is formed on one side of the carrier board, and plural openings are formed on the insulation protection to expose a portion of the carrier substrate. A circuit structure is formed on a surface of the insulation protective layer and in the opening. A dielectric layer is formed on the insulation protective layer and the circuit structure, and an opening is formed on the dielectric layer to expose the circuit structure.
摘要翻译：提供一种电路板及其制造方法来制造电路板而不使用芯，从而有效地减小电路板的厚度，从而容易减小包装产品的尺寸。准备了金属制的载板。绝缘保护层形成在承载板的一侧上，并且在绝缘保护件上形成多个开口以露出载体基板的一部分。电路结构形成在绝缘保护层的表面和开口中。在绝缘保护层和电路结构上形成电介质层，在电介质层上形成开口以露出电路结构。

97. 发明公开

KR1020070047926A 차동 신호 전송용 배선 기판 및 그 제조 방법 无效
标题翻译：用于差分转换的基板及其制造方法
公开(公告)号：KR1020070047926A
公开(公告)日：2007-05-08
申请号：KR1020050104810
申请日：2005-11-03
申请人： 삼성전자주식회사
发明人： 강선원 , 김문정
IPC分类号： H05K1/11 , H05K3/40
CPC分类号： H05K1/113 , H05K1/025 , H05K3/4038
摘要： 본 발명은 배선 기판에 관한 것으로서, 차동 신호를 이용하는 배선 기판 회로의 신호 전송 특성을 향상시킬 수 있는 차동 신호 전송용 배선 기판 및 그 제조 방법에 관한 것이다. 본 발명은 비아 홀이 형성되어 있는 유전체 층의 양면에 형성되는 제 1 및 제 2 신호선과, 하나의 비아 홀에 함께 형성되고 유전체 층 양면의 제 1 및 제 2 신호선을 각기 전기적으로 연결하는 제 1 및 제 2 비아를 포함하며, 제 1 및 제 2 비아는 전기적으로 분리되어 있는 차동 신호 전송용 배선 기판을 제공한다. 또한, 차동 신호 전송용 배선 기판의 제조 방법은 (a) 상부면과 하부면에 각각 형성되어 있는 제 1 및 제 2 신호선이 하나의 비아에 전기적으로 연결되어 있는 반제품 상태의 기판을 준비하는 단계, (b) 제 1 및 제 2 신호선이 전기적으로 분리되도록 비아를 제 1 및 제 2 비아로 분리하는 단계, (c) 제 1 및 제 2 비아의 사이에 유전 물질을 충진시키는 단계를 포함하여 이루어진다. 이에 의하면, 제 1 및 제 2 비아의 거리가 제 1 신호선과 제 2 신호선과의 거리와 유사하게 형성되기 때문에, 비아 부분에서 발생되는 임피던스의 불연속 현상이 완화되는 효과가 있다. 따라서, 신호선들 간에 최적화된 결합력을 유지할 수 있게 되므로, 회로의 신호 전송 특성을 향상시킬 수 있다.
비아, 임피던스, 차동 신호, 평형 신호, 배선 기판

98. 发明公开

KR1020070001408A 칩 실장형 인쇄회로기판의 제조방법 有权
标题翻译：印刷电路板安装芯片制造方法
公开(公告)号：KR1020070001408A
公开(公告)日：2007-01-04
申请号：KR1020050056882
申请日：2005-06-29
申请人： 삼성전기주식회사
发明人： 정회구 , 이종진 , 최재민 , 강명삼 , 박정현
IPC分类号： H05K3/46
CPC分类号： H05K3/4697 , H05K3/0044 , H05K3/022 , H05K3/4038 , H05K3/4602 , H05K2201/0145
摘要： A manufacturing method of a printed circuit board for mounting a chip is provided to realize a miniaturization, lightness, and slimness of product by mounting more than one chip on a manufactured cavity. A manufacturing method of a printed circuit board for mounting a chip includes the steps of: preparing a core on which a predetermined circuit pattern is formed(S100); laminating an insulation layer on an upper face of the core, wherein an opening unit is formed at the insulation layer, corresponding to a chip intended to be mounted(S110); forming a cavity using the opening unit and the core upper face by laminating a thermoplastic film on an upper face of the insulation layer and thermally pressurizing the thermoplastic film(S120); removing the thermoplastic film(S130); and forming an upper circuit pattern on the upper face of the insulation layer, corresponding to the predetermined circuit pattern(S140). Wherein, in the third step, a shape of the cavity is maintained by filling an inside of the cavity with the molten thermoplastic film.
摘要翻译：提供了一种用于安装芯片的印刷电路板的制造方法，以通过在制造的腔体上安装多于一个的芯片来实现产品的小型化，轻量化和薄型化。用于安装芯片的印刷电路板的制造方法包括以下步骤：制备其上形成有预定电路图案的芯（S100）; 在所述芯的上表面上层压绝缘层，其中在所述绝缘层处形成开口单元，对应于要安装的芯片（S110）; 通过在所述绝缘层的上表面层叠热塑性膜并对所述热塑性膜进行热加压来形成使用所述开口单元和所述芯上表面的空腔（S120）。去除热塑性薄膜（S130）; 以及在所述绝缘层的上表面上形成对应于所述预定电路图案的上电路图案（S140）。其中，在第三步骤中，通过用熔融的热塑性膜填充空腔的内部来保持空腔的形状。

99. 发明公开

KR1020060103351A 프린트배선판 및 그 제조방법 有权
标题翻译：印刷线路板及其制造方法
公开(公告)号：KR1020060103351A
公开(公告)日：2006-09-28
申请号：KR1020067017008
申请日：1998-01-05
申请人： 이비덴 가부시키가이샤
发明人： 타카다마사루 , 코바야시히로유키 , 치하라켄지 , 미노우라히사시 , 츠카다키요타카 , 콘도미츠히로
IPC分类号： H05K3/10
CPC分类号： H05K3/28 , H01L24/32 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83385 , H01L2924/00011 , H01L2924/01078 , H01L2924/12042 , H01L2924/15184 , H01L2924/15311 , H05K1/112 , H05K3/0035 , H05K3/027 , H05K3/242 , H05K3/243 , H05K3/4038 , H05K3/421 , H05K3/4602 , H05K2201/0305 , H05K2201/0394 , H05K2201/068 , H05K2201/09527 , H05K2201/0959 , H05K2201/0969 , H05K2201/09781 , H05K2203/0554 , H05K2203/107 , H05K2203/175 , H01L2924/00014 , H01L2924/00 , H01L2924/01005 , H01L2924/01033
摘要： A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.
摘要翻译：在具有导体电路（6）的绝缘板（7）的表面上印刷包括热固性树脂的阻焊剂。然后将阻焊剂热固化以形成具有低热膨胀系数的绝缘膜（1）。然后将激光束（2）施加到要形成开口的绝缘膜的部分，以烧掉用于形成开口（10）的相同部分，由此导体电路（6）暴露。该开口可以通过在其内表面上形成金属电镀膜而形成为导电孔。优选地，形成外部连接垫以覆盖开口。通过使用在电镀完成后优选用激光束切断的电镀铅来形成金属涂膜。

100. 发明公开

KR1020060070935A 칩 내장형 인쇄회로기판 및 그 제조 방법 失效
标题翻译：嵌入式印刷电路板及其制造方法
公开(公告)号：KR1020060070935A
公开(公告)日：2006-06-26
申请号：KR1020040109761
申请日：2004-12-21
申请人： 삼성전기주식회사
发明人： 조석현 , 류창섭 , 이석규 , 홍종국 , 안진용
IPC分类号： H05K1/18
CPC分类号： H05K1/185 , H05K3/26 , H05K3/4038 , H05K3/4623 , H05K3/4697
摘要： 본 발명은 일반적인 회로를 포함하는 회로층을 형성한 후, 경화된 수지(resin)로만 이루어진 원자재와 그 양면에 미경화된 수지와 이를 보호하기 위한 보호 필름이 도포되어 있는 원자재에 구멍을 형성하고, 그 속에 전기전도성 잉크를 이용하여 충진(plugging)시키고, 보호 필름을 제거 한 후 중심층을 형성하여 한번에 가열, 가압하는 일괄 적층 칩 내장형 인쇄회로기판 및 그 제조 방법에 관한 것이다.
본 발명에 따른 인쇄회로기판은 도전성 잉크가 충진된 비아로 형성되어 있고, 상기 비아홀에 접속된 칩을 내장한 중심층; 상기 중심층의 양면에 적층되며, 상기 비아홀을 통해 상기 중심층의 칩과 전기적으로 직접 접속되는 회로 패턴 및 비아홀이 형성된 회로층;을 포함하는 것을 특징으로 한다.
인쇄회로기판, 일괄 적층, 회로층, 중심층, 도전성 잉크, 칩
摘要翻译：本发明并形成在形成包含公共电路的电路层之后，原料用保护膜来保护的未固化树脂中的孔和该原料与仅由树脂固化物的两个表面（树脂）被施加，在涉及到填充（堵塞），加热，然后去除保护膜，以形成在一个时间一个中心层，嵌入印刷电路板的批次层压芯片和用于通过使用导电性油墨加压的制造方法。

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