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1. 发明专利

JP2014022492A Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2014022492A
公开(公告)日：2014-02-03
申请号：JP2012158495
申请日：2012-07-17
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： YAMAZAKI SHUNPEI , SAKAMOTO NAOYA , SATO TAKAHIRO , KOSHIOKA SHUNSUKE , CHO TAKAYUKI , YAMAMOTO YOSHITAKA , MATSUO TAKUYA , MATSUKIZONO HIROSHI , KANZAKI YOSUKE
IPC分类号： H01L29/786 , H01L21/28 , H01L21/336 , H01L29/41 , H01L29/417
CPC分类号： H01L29/7869 , H01L29/201
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device which used a copper-containing metal film for wiring or signal lines in a transistor using an oxide semiconductor film, and which has stable electric characteristics.SOLUTION: A semiconductor device comprises: a gate electrode 104; a gate insulation film 106 formed on the gate electrode 104; an oxide semiconductor film 108 including a channel formation region 108a formed at a position contacting the gate insulation film and overlapping the gate electrode; a source electrode 110 and a drain electrode 112 which are formed on the oxide semiconductor film 108; and an oxide insulation film 114 formed on the oxide semiconductor film, the source electrode and the drain electrode. The source electrode and the drain electrode include: first metal films 110a, 112a having ends lying on ends of the channel formation region, respectively; second copper-containing metal films 110b, 112b formed on the first metal films 110a, 112a, respectively; and third metal films 110c, 112c formed on the second metal films, respectively. Each second metal films are formed inside the respective ends of the first metal films.
摘要翻译：要解决的问题：提供一种使用氧化物半导体膜的晶体管中使用含铜金属膜进行布线或信号线的高可靠性的半导体装置，其具有稳定的电特性。解决方案：半导体器件包括：栅极电极104; 形成在栅电极104上的栅极绝缘膜106; 氧化物半导体膜108，其包括形成在与栅极绝缘膜接触并与栅电极重叠的位置处的沟道形成区域108a; 形成在氧化物半导体膜108上的源电极110和漏电极112; 以及形成在氧化物半导体膜，源电极和漏电极上的氧化物绝缘膜114。源电极和漏电极包括：分别具有位于沟道形成区的端部的端部的第一金属膜110a，112a; 分别形成在第一金属膜110a，112a上的第二含铜金属膜110b，112b; 以及形成在第二金属膜上的第三金属膜110c，112c。每个第二金属膜形成在第一金属膜的相应端部内。

2. 发明专利

JP2009054991A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009054991A
公开(公告)日：2009-03-12
申请号：JP2008145684
申请日：2008-06-03
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： ICHIJO MITSUHIRO , TANAKA TETSUHIRO , OTSUKI TAKASHI , YASUMOTO KIYOHARU , OKAZAKI KENICHI , YAMAZAKI SHUNPEI , SAKAMOTO NAOYA
IPC分类号： H01L21/318 , C23C16/42 , C23C16/44 , H01L21/336 , H01L29/786
CPC分类号： H01L21/31608 , C23C16/4404 , H01L21/0214 , H01L21/02164 , H01L21/02271 , H01L21/02274 , H01L21/3145 , H01L21/3185 , H01L27/1214 , H01L29/4908
摘要： PROBLEM TO BE SOLVED: To propose a method of manufacturing a semiconductor device with high yield which includes a semiconductor element having a film with reduced mixing of impurity. SOLUTION: In the manufacturing method of the semiconductor device that forms an insulating film using a plasma CVD device in contact with a semiconductor layer provided on a substrate having an insulating surface, after an inner wall of a reaction chamber of a plasma CVD device is coated with a film not including an impurity of the insulated film, the substrate is inserted into the reaction chamber to form the insulating film on the substrate. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提出一种制造具有高产率的半导体器件的方法，其包括具有减少杂质混合的膜的半导体元件。解决方案：在使用等离子体CVD装置与设置在具有绝缘表面的基板上的半导体层接触的半导体器件的制造方法中，在等离子体CVD的反应室的内壁之后器件涂覆有不包括绝缘膜杂质的膜，将衬底插入反应室中以在衬底上形成绝缘膜。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2012182121A Light-emitting device, manufacturing method of the same, illuminating device and display device 审中-公开
标题翻译：发光装置，其制造方法，照明装置和显示装置
公开(公告)号：JP2012182121A
公开(公告)日：2012-09-20
申请号：JP2012023726
申请日：2012-02-07
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： TANADA YOSHIFUMI , SAKAMOTO NAOYA , ADACHI HIROKI , EGUCHI SHINGO , ONO KOJI , YOSHIZUMI KENSUKE , SHINODA HIROTO
IPC分类号： H05B33/26 , H01L51/50 , H05B33/10 , H05B33/12 , H05B33/22
CPC分类号： H01L51/5212 , H01L27/3279 , H01L51/5228 , H01L2251/5361
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable light-emitting device which inhibits potential drop due to resistance of an upper electrode; to provide a highly reliable light-emitting device capable of forming an EL layer and an upper electrode without using a metal mask; and to provide an illuminating device and a display device to which such light-emitting device is applied.SOLUTION: A configuration in which auxiliary wiring for assisting conductivity of an upper electrode is provided on a substrate side is focused. The conductive auxiliary wiring included in a light-emitting device is provided on the substrate, and formed such that a part of a side face protrudes in a horizontal direction with respect to the substrate. Further, an EL layer formed in a region including a lower electrode layer and the auxiliary wiring is physically divided by the auxiliary wiring. An upper electrode layer similarly formed may be electrically connected with at least the part of the side face of the auxiliary wiring. Still further, such auxiliary wiring may be applied to an illuminating device and a display device.
摘要翻译：要解决的问题：提供一种抑制由上部电极的电阻引起的电位降低的高可靠性发光装置; 以提供能够在不使用金属掩模的情况下形成EL层和上电极的高度可靠的发光装置; 并且提供应用这种发光装置的照明装置和显示装置。解决方案：集中了在基板侧设置用于辅助上电极的导电性的辅助布线的结构。包括在发光器件中的导电辅助布线设置在基板上，并且形成为使得侧面的一部分相对于基板在水平方向上突出。此外，在包括下电极层和辅助布线的区域中形成的EL层在物理上被辅助布线分开。类似地形成的上电极层可以与辅助布线的至少一部分侧面电连接。此外，这种辅助布线可以应用于照明装置和显示装置。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JP2005116518A Display device and manufacturing method of the same 有权
标题翻译：其显示装置及其制造方法
公开(公告)号：JP2005116518A
公开(公告)日：2005-04-28
申请号：JP2004264020
申请日：2004-09-10
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , TAKAYAMA TORU , SAKAMOTO NAOYA , AKIMOTO KENGO , SATO KEIJI , MARUYAMA YOSHIKI
IPC分类号： H05B33/26 , H01L51/50 , H05B33/10 , H05B33/14
摘要： PROBLEM TO BE SOLVED: To provide a display device using a bright light-emitting element with a good light emitting property and low power consumption, in comparison with a conventional light-emitting element having a structure of laminating an organic compound on an electrode composed of an inorganic material. SOLUTION: A lamination structure of a translucent oxide conductive layer containing silicon or a silicon oxide is used as a hole injection electrode (positive electrode), in place of a conventional translucent oxide conductive layer like ITO, or a lamination structure of a translucent oxide conductive layer containing silicon or a silicon oxide with different contents is used as a hole injection electrode. It is preferable that the density of the silicon or the silicon oxide in the conductive layer at a side connected to a TFT is 1 to 6 atom%, and the density of the silicon or the silicon oxide at the side of the organic compound-containing layer is 7 to 15 atom%. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：解决方案：为了提供使用具有良好的发光性能和低功耗的亮发光元件的显示装置，与具有将有机化合物层叠在一起的结构的传统发光元件相比较由无机材料构成的电极。解决方案：使用含有硅或氧化硅的半透明氧化物导电层的叠层结构作为空穴注入电极（正极），代替常规的透明氧化物导电层如ITO，或层叠结构使用含有硅或具有不同含量的氧化硅的半透明氧化物导电层作为空穴注入电极。优选的是，与TFT连接的一侧的导电层中的硅或氧化硅的密度为1〜6原子％，并且含有机化合物的一侧的硅或氧化硅的密度层为7〜15原子％。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2010192451A Light-emitting device 有权
标题翻译：发光装置
公开(公告)号：JP2010192451A
公开(公告)日：2010-09-02
申请号：JP2010086652
申请日：2010-04-05
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , TAKAYAMA TORU , SAKAMOTO NAOYA , AKIMOTO KENGO , SATO KEIJI , MARUYAMA YOSHIKI
IPC分类号： H05B33/28 , G09F9/30 , H01L27/32 , H01L51/50 , H01L51/52 , H05B33/10 , H05B33/26
CPC分类号： H01L51/5206 , H01L27/3244 , H01L27/3246 , H01L27/3281 , H01L27/3295 , H01L51/5215 , Y10S428/917
摘要： PROBLEM TO BE SOLVED: To solve the following problem: in a conventional light-emitting element of a structure in which an organic compound is laminated on an electrode formed of an inorganic material, sufficient luminance cannot be obtained, power consumption is higher, a half-life period of luminance is short, and stability is to be improved. SOLUTION: In the light-emitting device, a lamination structure of a translucent oxide conductive layer containing silicon or silicon oxide is adopted as a hole injection electrode (a positive electrode) in place of a conventional translucent oxide conductive layer of an ITO or the like. Meanwhile, a lamination structure of a translucent oxide conductive layer containing a different content of silicon or silicon oxide is adopted. Preferably, a silicon or silicon oxide concentration in a conductive layer on a side to be connected with a TFT shall be 1-6 atom% and a silicon or silicon oxide concentration on a side of a layer containing an organic compound shall be 7-15 atom%. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决以下问题：在由无机材料形成的电极上层叠有机化合物的结构的现有的发光元件中，不能获得足够的亮度，功耗较高亮度的半衰期短，稳定性提高。解决方案：在发光器件中，采用含有硅或氧化硅的半透明氧化物导电层的叠层结构作为空穴注入电极（正电极）来代替ITO的常规半透明氧化物导电层或类似物。同时，采用含有不同含量的硅或氧化硅的半透明氧化物导电层的叠层结构。优选地，与TFT连接的一侧中的导电层中的硅或氧化硅浓度应为1-6原子％，并且在含有机化合物的层的一侧上的硅或氧化硅浓度应为7-15 原子％。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2005093402A Light emitting device 有权
标题翻译：发光装置
公开(公告)号：JP2005093402A
公开(公告)日：2005-04-07
申请号：JP2003329189
申请日：2003-09-19
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , AKIMOTO KENGO , TAKAYAMA TORU , SAKAMOTO NAOYA , MARUYAMA YOSHIKI , SATO KEIJI
IPC分类号： H05B33/28 , H01L51/50 , H05B33/14 , H05B33/22 , H05B33/26
摘要： PROBLEM TO BE SOLVED: To provide a bright and high-stability light emitting device having an excellent light emission characteristic with low power consumption because a sufficient light emission characteristic can not be provided by a structure using a light emitting element having a structure composed by stacking a conventional organic material on an electrode formed of an inorganic material. SOLUTION: This light emitting device is provided with an insulating or semi-insulating barrier layer in a thickness at a level allowing a tunnel current to be carried between a hole injection electrode and a hole injection area or a hole transportation area of an EL layer. The light emitting device is so structured that the hole injection electrode is equipped with an electrode layer formed of an oxide conductive material containing silicon or silicon oxide; and the insulating or semi-insulating barrier layer containing at least one kind selected from oxygen, nitrogen and carbon, and silicon is formed between the electrode layer and the hole injection area or the hole transportation area in the EL layer. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：解决的问题：为了提供具有低功耗的优异发光特性的明亮且高稳定性的发光器件，因为通过使用具有结构的发光元件的结构不能提供足够的发光特性通过在由无机材料形成的电极上堆叠常规有机材料而构成。解决方案：该发光器件设置有绝缘或半绝缘阻挡层，其厚度为允许隧道电流在空穴注入电极和空穴注入区域或空穴注入区域之间承载的水平 EL层。发光装置的结构使得空穴注入电极配备有由含硅或氧化硅的氧化物导电材料形成的电极层; 并且在EL层中的电极层和空穴注入区域或空穴传输区域之间形成包含选自氧，氮和碳中的至少一种的绝缘或半绝缘阻挡层和硅。版权所有（C）2005，JPO＆NCIPI

7. 发明专利

JP2009260322A Method of fabricating semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009260322A
公开(公告)日：2009-11-05
申请号：JP2009073265
申请日：2009-03-25
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： SAKAMOTO NAOYA , SATO TAKAHIRO , OIKAWA YOSHIAKI , SATO KITARU , AIHARA YAMATO , CHO TAKAYUKI , KAMINAGA MASAMI
IPC分类号： H01L21/3205 , G06K19/07 , G06K19/077 , H01L21/28 , H01L21/306 , H01L21/3065 , H01L21/3213 , H01L21/822 , H01L23/52 , H01L27/04
CPC分类号： G06K19/07749 , G06K19/07779 , G06K19/07783 , H01L21/32134 , H01L21/32136 , H01L21/76829 , H01L21/76838 , H01L23/53223 , H01L27/124 , H01L27/1266 , H01L27/13 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To form a conductive film, which has a steep slope at an end, secures a desired film thickness, and suppresses a difference in shape from a mask pattern, by using etching. SOLUTION: After the conductive film of not less than 1 to 10 μm in film thickness containing aluminum or aluminum alloy is etched to a predetermined film thickness using wet etching, the rest is etched by dry etching to suppress side etching and a decrease in film thickness of a mask. Thus, the side etching is suppressed and the decrease in film thickness of the mask is also suppressed, so that even the conductive film whicih is thick having a thickness of 1 to 10 μm and contains aluminum or aluminum alloy is etched to have the steep slope at the end, to secure the desired film thickness, and to suppress the difference in shape from the mask pattern. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：通过使用蚀刻来形成端部具有陡峭斜率的导电膜，确保期望的膜厚度，并且抑制形状与掩模图案的差异。解决方案：使用湿蚀刻将包含铝或铝合金的膜厚度不小于1至10μm的导电膜蚀刻至预定的膜厚后，通过干蚀刻蚀刻其余部分，以抑制侧蚀刻和降低在面膜的膜厚度。因此，抑制了侧面蚀刻，并且还抑制了掩模的膜厚度的降低，使得即使导致厚度为1至10μm的厚度的包含铝或铝合金的导电膜被蚀刻以具有陡峭的斜率在最后，确保所需的膜厚度，并且抑制形状与掩模图案的差异。版权所有（C）2010，JPO＆INPIT

8. 发明专利

JP2006237624A Semiconductor device and inverter circuit 审中-公开
标题翻译：半导体器件和逆变器电路
公开(公告)号：JP2006237624A
公开(公告)日：2006-09-07
申请号：JP2006071716
申请日：2006-03-15
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , KOYAMA JUN , NAKAJIMA SETSUO , SAKAMOTO NAOYA
IPC分类号： H01L29/786 , G02F1/1368 , H01L21/822 , H01L21/8234 , H01L21/8238 , H01L27/00 , H01L27/04 , H01L27/08 , H01L27/088 , H01L27/092
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and an inverter circuit having a TFT in which the threshold can be controlled. SOLUTION: The semiconductor device comprises a plurality of TFTs each having a back gate electrode, a semiconductor active layer provided in contact with the back gate electrode through a first gate insulating film, and a gate electrode provided in contact with the semiconductor active layer through a second gate insulating film, and a circuit for controlling the threshold of the plurality of TFTs wherein the back gate electrode is applied with an arbitrary voltage by the threshold control circuit. COPYRIGHT: (C)2006,JPO&NCIPI

9. 发明专利

JP2006203241A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2006203241A
公开(公告)日：2006-08-03
申请号：JP2006071717
申请日：2006-03-15
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , KOYAMA JUN , NAKAJIMA SETSUO , SAKAMOTO NAOYA
IPC分类号： H01L29/786 , H01L21/336 , H01L21/8234 , H01L21/8238 , H01L27/00 , H01L27/08 , H01L27/088 , H01L27/092
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor including a TFT capable of controlling threshold voltage. SOLUTION: This semiconductor device comprises: a first conductive layer formed on a substrate; a first insulating film formed on the first conductive layer; a crystalline silicon film having a source region, a drain region, a low-concentration impurity region, and a channel forming region formed on the first insulating film; a second insulating film forme on the crystalline silicon film; and a second conductive layer formed on the second insulating film; wherein the low-concentration impurity region partially overlaps with the first conductive layer and is formed as to extend outside of the end part of the first conductive layer without overlapping with the second conductive layer. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种包括能够控制阈值电压的TFT的半导体。解决方案：该半导体器件包括：形成在衬底上的第一导电层; 形成在第一导电层上的第一绝缘膜; 具有形成在第一绝缘膜上的源极区，漏极区，低浓度杂质区和沟道形成区的晶体硅膜; 晶体硅膜上的第二绝缘膜; 以及形成在所述第二绝缘膜上的第二导电层; 其中所述低浓度杂质区域与所述第一导电层部分重叠，并且形成为在所述第一导电层的端部的外侧延伸，而不与所述第二导电层重叠。版权所有（C）2006，JPO＆NCIPI

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