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1. 发明专利

JP2014207286A 半導体装置、表示装置及び半導体装置の作製方法有权
标题翻译：半导体器件，显示器件和半导体器件的制造方法
公开(公告)号：JP2014207286A
公开(公告)日：2014-10-30
申请号：JP2013083132
申请日：2013-04-11
申请人：株式会社半導体エネルギー研究所 , Semiconductor Energy Lab Co Ltd , シャープ株式会社 , Sharp Corp
发明人： HIZUKA JUNICHI , OKAZAKI KENICHI , TAKAHASHI MASAHIRO , MATSUO TAKUYA , MORI SHIGEYASU , KANZAKI YOSUKE , MATSUKIZONO HIROSHI
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/66969 , H01L29/78618 , H01L29/78696
摘要：【課題】チャネル長の縮小を抑制した新規な半導体装置を提供する。【解決手段】結晶部を含む酸化物半導体層112と、前記酸化物半導体層112に接するソース電極層108及びドレイン電極層110と、を有し、前記酸化物半導体層112は、チャネル形成領域と、前記ソース電極層108及び前記ドレイン電極層110と接するn型領域112aと、を有し、前記チャネル形成領域と、前記n型領域112aで、前記結晶部の結晶方向が異なることを特徴とする半導体装置である。【選択図】図1
摘要翻译：要解决的问题：提供抑制沟道长度减小的新的半导体器件。解决方案：半导体器件包括：包括晶体部分的氧化物半导体层112; 与氧化物半导体层112接触的源极电极层108和漏电极层110.氧化物半导体层112具有沟道形成区域和与源电极层108和漏极接触的n型区域112a 电极层110.晶体部分中的晶体取向在沟道形成区域和n型区域112a之间不同。

2. 发明专利

JP2013222812A Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013222812A
公开(公告)日：2013-10-28
申请号：JP2012093303
申请日：2012-04-16
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： OKAZAKI KENICHI , YOKOYAMA MASATOSHI , SAKAKURA MASAYUKI , SHIMA YUKINORI , KANZAKI YOSUKE , MATSUKIZONO HIROSHI , MATSUO TAKUYA , YAMAMOTO YOSHITAKA
IPC分类号： H01L29/786 , H01L21/20 , H01L21/336
CPC分类号： H01L29/7869 , H01L21/02172 , H01L29/66742 , H01L29/66969 , H01L29/78606 , H01L29/78696
摘要： PROBLEM TO BE SOLVED: To suppress occurrence of a conductive mode failure even in a transistor which uses an oxide semiconductor film having a short channel length.SOLUTION: A semiconductor device comprises: a gate electrode 304; a gate insulating film 306 formed on the gate electrode; an oxide semiconductor film 308 formed on the gate insulating film; and a source electrode 310a and a drain electrode 310b formed on the oxide semiconductor film. The length L of a channel formed on the oxide semiconductor film is 1 to 50 μm. A rotation angle 2θ measured by X-ray diffraction in the oxide semiconductor film has a peak near 31°.
摘要翻译：要解决的问题：即使在使用具有短沟道长度的氧化物半导体膜的晶体管中，也抑制导电模式故障的发生。解决方案：半导体器件包括：栅电极304; 形成在栅电极上的栅极绝缘膜306; 形成在栅极绝缘膜上的氧化物半导体膜308; 以及形成在氧化物半导体膜上的源电极310a和漏电极310b。形成在氧化物半导体膜上的沟道的长度L为1〜50μm。旋转角度2＆amp; 在氧化物半导体膜中通过X射线衍射测得的峰值接近31°。

3. 发明专利

JP2014022492A Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2014022492A
公开(公告)日：2014-02-03
申请号：JP2012158495
申请日：2012-07-17
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： YAMAZAKI SHUNPEI , SAKAMOTO NAOYA , SATO TAKAHIRO , KOSHIOKA SHUNSUKE , CHO TAKAYUKI , YAMAMOTO YOSHITAKA , MATSUO TAKUYA , MATSUKIZONO HIROSHI , KANZAKI YOSUKE
IPC分类号： H01L29/786 , H01L21/28 , H01L21/336 , H01L29/41 , H01L29/417
CPC分类号： H01L29/7869 , H01L29/201
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device which used a copper-containing metal film for wiring or signal lines in a transistor using an oxide semiconductor film, and which has stable electric characteristics.SOLUTION: A semiconductor device comprises: a gate electrode 104; a gate insulation film 106 formed on the gate electrode 104; an oxide semiconductor film 108 including a channel formation region 108a formed at a position contacting the gate insulation film and overlapping the gate electrode; a source electrode 110 and a drain electrode 112 which are formed on the oxide semiconductor film 108; and an oxide insulation film 114 formed on the oxide semiconductor film, the source electrode and the drain electrode. The source electrode and the drain electrode include: first metal films 110a, 112a having ends lying on ends of the channel formation region, respectively; second copper-containing metal films 110b, 112b formed on the first metal films 110a, 112a, respectively; and third metal films 110c, 112c formed on the second metal films, respectively. Each second metal films are formed inside the respective ends of the first metal films.
摘要翻译：要解决的问题：提供一种使用氧化物半导体膜的晶体管中使用含铜金属膜进行布线或信号线的高可靠性的半导体装置，其具有稳定的电特性。解决方案：半导体器件包括：栅极电极104; 形成在栅电极104上的栅极绝缘膜106; 氧化物半导体膜108，其包括形成在与栅极绝缘膜接触并与栅电极重叠的位置处的沟道形成区域108a; 形成在氧化物半导体膜108上的源电极110和漏电极112; 以及形成在氧化物半导体膜，源电极和漏电极上的氧化物绝缘膜114。源电极和漏电极包括：分别具有位于沟道形成区的端部的端部的第一金属膜110a，112a; 分别形成在第一金属膜110a，112a上的第二含铜金属膜110b，112b; 以及形成在第二金属膜上的第三金属膜110c，112c。每个第二金属膜形成在第一金属膜的相应端部内。

4. 发明专利

JP2013222819A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013222819A
公开(公告)日：2013-10-28
申请号：JP2012093513
申请日：2012-04-17
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： YOKOYAMA MASATOSHI , MURAKAWA TSUTOMU , OKAZAKI KENICHI , SAKAKURA MASAYUKI , MATSUO TAKUYA , KANZAKI YOSUKE , MATSUKIZONO HIROSHI , YAMAMOTO YOSHITAKA
IPC分类号： H01L29/786 , G02F1/1368 , H01L51/50
CPC分类号： H01L29/7869 , H01L29/78696
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which inhibits generation of a parasitic channel on a lateral face of an oxide semiconductor film on which an active layer is formed.SOLUTION: A semiconductor device comprises: a gate electrode 106; an oxide semiconductor film 110; a source electrode 114a and a drain electrode 114b; and a channel region formed in the oxide semiconductor film. The channel region is formed between a first lateral face 214a of the source electrode and a second lateral face 214b of the drain electrode opposite to the first lateral face 214a. The oxide semiconductor film has a lateral face overlapping the gate electrode, and the lateral face includes a high resistance region positioned between a first region 206a closest from one end 314a of the first lateral face 214a and a second region 206b closest from one end 314b of the second lateral face 214b. The first high resistance region has an undulating lateral face and the like.
摘要翻译：要解决的问题：提供一种抑制在其上形成有源层的氧化物半导体膜的侧面上产生寄生沟道的半导体器件。解决方案：半导体器件包括：栅电极106; 氧化物半导体膜110; 源电极114a和漏电极114b; 以及形成在氧化物半导体膜中的沟道区。沟道区形成在源电极的第一侧面214a和与第一侧面214a相对的漏电极的第二侧面214b之间。氧化物半导体膜具有与栅电极重叠的侧面，侧面包括位于最靠近第一侧面214a的一端314a的第一区域206a和最靠近第一侧面214a的一端314b的第二区域206b之间的高电阻区域第二侧面214b。第一高电阻区域具有起伏的侧面等。

5. 发明专利

JP2013183001A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2013183001A
公开(公告)日：2013-09-12
申请号：JP2012045498
申请日：2012-03-01
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： OKAZAKI KENICHI , MATSUO TAKUYA , YAMAMOTO YOSHITAKA , MATSUKIZONO HIROSHI , KANZAKI YOSUKE
IPC分类号： H01L21/336 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/78603
摘要： PROBLEM TO BE SOLVED: To inhibit diffusion of a metal element contained in a glass substrate into a gate insulation film or into an oxide semiconductor film.SOLUTION: A semiconductor device comprises: a glass substrate 102; an underlying insulation film 104 composed of a metal oxide formed on the glass substrate 102; a gate electrode 106 formed on the underlying insulation film 104; a gate insulation film 108 formed on the gate electrode 106; an oxide semiconductor film 110 which is formed on the gate insulation film 108 and provided at a position overlapping the gate electrode 106; and a source electrode 114a and a drain electrode 114b which are electrically connected with the oxide semiconductor film 110. A concentration of a metal element contained in the glass substrate 102 in a region at a depth of 3 nm and over from a surface of the underlying insulation film 104 is not more than 1×10atoms/cm.
摘要翻译：要解决的问题：抑制包含在玻璃基板中的金属元素扩散到栅极绝缘膜或氧化物半导体膜中。解决方案：半导体器件包括：玻璃基板102; 由形成在玻璃基板102上的金属氧化物构成的基底绝缘膜104; 形成在下面的绝缘膜104上的栅电极106; 形成在栅电极106上的栅极绝缘膜108; 形成在栅极绝缘膜108上并设置在与栅电极106重叠的位置的氧化物半导体膜110; 以及与氧化物半导体膜110电连接的源电极114a和漏电极114b。从底层的表面开始，在深度为3nm以上的区域中包含的玻璃基板102中的金属元素的浓度绝缘膜104不超过1×10原子/ cm。

6. 发明专利

JP2014103142A Semiconductor device and display device 有权
标题翻译：半导体器件和显示器件
公开(公告)号：JP2014103142A
公开(公告)日：2014-06-05
申请号：JP2012252106
申请日：2012-11-16
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： MIYAKE HIROYUKI , YAMAZAKI SHUNPEI , TANADA YOSHIFUMI , SATO MANABU , SASAKI TOSHINARI , OKAZAKI KENICHI , HIZUKA JUNICHI , MATSUO TAKUYA , MATSUKIZONO HIROSHI , KANZAKI YOSUKE , MORI SHIGEYASU
IPC分类号： H01L29/786 , G02F1/1343 , H01L21/336
CPC分类号： H01L27/1225 , H01L27/124 , H01L29/78648
摘要： PROBLEM TO BE SOLVED: To provide a highly-reliable semiconductor device in which a threshold voltage of a transistor can be controlled.SOLUTION: A semiconductor device includes: a transistor having a gate electrode 116, a gate insulating film 117 formed on the gate electrode, a semiconductor layer 118 formed on the gate insulating film, and a source electrode 120 and a drain electrode 122 formed on the semiconductor layer; a first insulating film 124 formed of an inorganic material on the transistor; a second insulating film 126 formed of an organic material on the first insulating film; a first conductive film 128 formed on the second insulating film and formed in a region overlapped with the semiconductor layer; a third insulating film 138 formed of an inorganic material on the first conductive film; and a second conductive film 148 formed on the third insulating film and formed in a region overlapped with the first conductive film. An absolute value of a first potential given to the first conductive film is larger than that of a second potential given to the second conductive film.
摘要翻译：要解决的问题：提供可以控制晶体管的阈值电压的高可靠性的半导体器件。解决方案：一种半导体器件包括：具有栅极电极116的晶体管，形成在栅电极上的栅极绝缘膜117 形成在栅极绝缘膜上的半导体层118以及形成在半导体层上的源电极120和漏电极122; 由晶体管上的无机材料形成的第一绝缘膜124; 在第一绝缘膜上由有机材料形成的第二绝缘膜126; 形成在第二绝缘膜上并形成在与半导体层重叠的区域中的第一导电膜128; 在第一导电膜上由无机材料形成的第三绝缘膜138; 以及形成在第三绝缘膜上并形成在与第一导电膜重叠的区域中的第二导电膜148。给予第一导电膜的第一电位的绝对值大于给予第二导电膜的第二电位的绝对值。

7. 发明专利

JP2012054546A Manufacturing method of microcrystalline silicon film and manufacturing method of thin film transistor 有权
标题翻译：微晶硅薄膜的制造方法和薄膜晶体管的制造方法
公开(公告)号：JP2012054546A
公开(公告)日：2012-03-15
申请号：JP2011171096
申请日：2011-08-04
申请人： Semiconductor Energy Lab Co Ltd , Sharp Corp , シャープ株式会社 , 株式会社半導体エネルギー研究所
发明人： MIYAIRI HIDEKAZU , IENAGA TAKASHI , MORIGUCHI MASAO , KANZAKI YOSUKE
IPC分类号： H01L21/20 , H01L21/205 , H01L21/316 , H01L21/336 , H01L29/786
CPC分类号： H01L21/02488 , H01L21/02502 , H01L21/02532 , H01L21/0262 , H01L21/02658 , H01L21/32105 , H01L29/04 , H01L29/66765 , H01L29/78678 , H01L29/78696
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a microcrystalline silicon film with improved adhesion between an insulation film and a microcrystalline silicon film.SOLUTION: A manufacturing method of a microcrystalline silicon film includes: forming a microcrystalline silicon film or an amorphous silicon film with the thickness (for example greater than 0 nm and less than or equal to 5 nm) that allows full oxidation by later plasma oxidation or the like, or microcrystalline silicon grains with the height (for example greater than 0 nm and less than or equal to 5 nm) that allows full oxidation by later plasma oxidation or the like, on an insulation film 55; forming silicon oxide grains 57a or a silicon oxide film on the insulation film by performing plasma processing or plasma oxidation for inputting oxygen into the microcrystalline silicon grains, the microcrystalline silicon film, or the amorphous silicon film; and forming a microcrystalline silicon film 59 on the silicon oxide grains or the silicon oxide film.
摘要翻译：要解决的问题：提供具有改善的绝缘膜和微晶硅膜之间的粘附性的微晶硅膜的制造方法。解决方案：微晶硅膜的制造方法包括：形成具有允许稍后充分氧化的厚度（例如大于0nm且小于或等于5nm）的微晶硅膜或非晶硅膜等离子体氧化等，或在绝缘膜55上允许通过稍后的等离子体氧化等完全氧化的高度（例如大于0nm且小于或等于5nm）的微晶硅晶粒; 通过进行等离子体处理或等离子体氧化，将氧气输入到微晶硅晶粒，微晶硅膜或非晶硅膜中，在绝缘膜上形成氧化硅晶粒57a或氧化硅膜; 以及在氧化硅晶粒或氧化硅膜上形成微晶硅膜59。版权所有（C）2012，JPO＆INPIT

8. 发明专利

JP2011258937A Microcrystalline silicon film and method of depositing the same, and semiconductor device 有权
标题翻译：微晶硅薄膜及其沉积方法和半导体器件
公开(公告)号：JP2011258937A
公开(公告)日：2011-12-22
申请号：JP2011103505
申请日：2011-05-06
申请人： Semiconductor Energy Lab Co Ltd , Sharp Corp , シャープ株式会社 , 株式会社半導体エネルギー研究所
发明人： TEZUKA YOSHIAKI , JINBO YASUHIRO , SASAKI TOSHINARI , MIYAIRI HIDEKAZU , KANZAKI YOSUKE , MORIGUCHI MASAO
IPC分类号： H01L21/205 , C23C16/24 , H01L21/336 , H01L29/786
CPC分类号： H01L21/02513 , C23C16/24 , C23C16/45523 , C23C16/50 , H01L21/02422 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L29/04 , H01L29/66765 , H01L29/78696
摘要： PROBLEM TO BE SOLVED: To provide a method of depositing a microcrystalline silicon film having high crystallinity.SOLUTION: The method of depositing a microcrystalline silicon film comprises: a step of depositing a first microcrystalline silicon film 57 on an insulating film 55 by plasma CVD under first condition; and a step of depositing a second microcrystalline silicon film 59 on the first microcrystalline silicon film under second condition. The first condition is to use gas containing hydrogen and sedimentary gas containing silicon as material gas to be supplied into a processing chamber, dilute the sedimentary gas by setting the flow rate of hydrogen to 50-1000 times that of the sedimentary gas and to set the pressure in the processing chamber in the range of 67-1333 Pa. The second condition is to use gas containing hydrogen and sedimentary gas containing silicon as material gas to be supplied into the processing chamber, dilute the sedimentary gas by setting the flow rate of hydrogen to 100-2000 times that of the sedimentary gas and to set the pressure in the processing chamber in the range of 1333-13332 Pa.
摘要翻译：要解决的问题：提供一种沉积具有高结晶度的微晶硅膜的方法。解决方案：沉积微晶硅膜的方法包括：在第一条件下通过等离子体CVD在绝缘膜55上沉积第一微晶硅膜57的步骤; 以及在第二条件下在第一微晶硅膜上沉积第二微晶硅膜59的步骤。第一个条件是使用含有氢气和含硅沉积气体作为原料气体供入处理室，通过将氢气流量设定为沉积气体的50-1000倍而使沉积气体稀释，并将处理室内的压力在67-1333Pa范围内，第二个条件是使用含有氢的气体和含有硅的沉积气体作为原料气体供入处理室，通过设定氢气的流量来稀释沉积气体到沉积气体的100-2000倍，并将处理室中的压力设定在1333-13332帕的范围内。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2014207285A 表示装置及び電子機器有权
标题翻译：显示设备和电子设备
公开(公告)号：JP2014207285A
公开(公告)日：2014-10-30
申请号：JP2013083131
申请日：2013-04-11
申请人：株式会社半導体エネルギー研究所 , Semiconductor Energy Lab Co Ltd , シャープ株式会社 , Sharp Corp
发明人： HIZUKA JUNICHI , KATAYAMA MASAHIRO , SHIMA YUKINORI , OKAZAKI KENICHI , MATSUO TAKUYA , MORI SHIGEYASU , KANZAKI YOSUKE , MATSUKIZONO HIROSHI
IPC分类号： H01L29/786 , G02F1/1368 , H01L21/336
CPC分类号： H01L27/1225 , H01L23/3121 , H01L23/564 , H01L27/1248 , H01L2924/0002 , H01L2924/0001 , H01L2924/00
摘要：【課題】トランジスタの電気特性の変動を抑制すると共に、信頼性を向上させる。【解決手段】画素部104と、前記画素部の外側に設けられる駆動回路部106と、を有し、前記画素部は、画素トランジスタと、前記画素トランジスタを覆う無機材料で形成される第1の絶縁層122と、前記第1の絶縁層上に設けられ、且つ有機材料で形成される第2の絶縁層124と、前記第2の絶縁層上に設けられ、且つ無機材料で形成される第3の絶縁層128と、を有し、前記駆動回路部は、前記画素トランジスタに信号を供給する駆動トランジスタと、前記駆動トランジスタを覆う前記第1の絶縁層と、を有し、前記駆動回路部において、前記第2の絶縁層は形成されていない表示装置である。【選択図】図1
摘要翻译：要解决的问题：抑制晶体管的电特性的变化并提高晶体管的可靠性。解决方案：显示装置具有设置在像素部分外部的像素部分104和驱动电路部分106。像素部分包括像素晶体管，覆盖像素晶体管并由无机材料形成的第一绝缘层122，设置在第一绝缘层上并由有机材料形成的第二绝缘层124和第三绝缘层绝缘层128，其设置在第二绝缘层上并由无机材料形成。驱动电路部分包括用于向像素晶体管提供信号的驱动晶体管和覆盖驱动晶体管的第一绝缘层。在驱动电路部分中，不形成第二绝缘层。

10. 发明专利

JP2014090068A Display device and electronic apparatus 有权
标题翻译：显示设备和电子设备
公开(公告)号：JP2014090068A
公开(公告)日：2014-05-15
申请号：JP2012238918
申请日：2012-10-30
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： HIZUKA JUNICHI , SHIMA YUKINORI , HOSAKA HIROYASU , OKAZAKI KENICHI , MATSUO TAKUYA , MORI SHIGEYASU , KANZAKI YOSUKE , MATSUKIZONO HIROSHI
IPC分类号： H01L21/318 , G02F1/1368 , G09F9/30 , H01L21/312 , H01L21/316 , H01L21/336 , H01L29/786
CPC分类号： H01L27/1225 , H01L27/3262
摘要： PROBLEM TO BE SOLVED: To suppress variation in electrical characteristics of a transistor, and to improve reliability thereof.SOLUTION: A display device has a pixel part 104 and a driving circuit part 106 provided outside the pixel part. The pixel part has a pixel transistor 252, a first insulating film 124 covering the pixel transistor and formed of an inorganic material, a second insulating film 126 provided on the first insulating film and formed of an organic material, and a third insulating film 130 provided on the second insulating film and formed of an inorganic material. The driving circuit part has a driving transistor 250 for supplying a signal to the pixel transistor, the first insulating film covering the driving transistor, and the second insulating film formed on the first insulating film. The display device has, in the driving circuit part, either a region in which the third insulating film is not formed on the second insulating film or a region in which the second insulating film is not covered with the third insulating film.
摘要翻译：要解决的问题：抑制晶体管的电特性的变化并提高其可靠性。解决方案：显示装置具有设置在像素部分外部的像素部分104和驱动电路部分106。像素部分具有像素晶体管252，覆盖像素晶体管并由无机材料形成的第一绝缘膜124，设置在第一绝缘膜上并由有机材料形成的第二绝缘膜126和设置在第一绝缘膜130上的第三绝缘膜130 在第二绝缘膜上并由无机材料形成。驱动电路部分具有用于向像素晶体管提供信号的驱动晶体管250，覆盖驱动晶体管的第一绝缘膜和形成在第一绝缘膜上的第二绝缘膜。显示装置在驱动电路部分中，在第二绝缘膜上没有形成第三绝缘膜的区域或第二绝缘膜未被第三绝缘膜覆盖的区域。

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