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1. 发明专利

JP2009260322A Method of fabricating semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009260322A
公开(公告)日：2009-11-05
申请号：JP2009073265
申请日：2009-03-25
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： SAKAMOTO NAOYA , SATO TAKAHIRO , OIKAWA YOSHIAKI , SATO KITARU , AIHARA YAMATO , CHO TAKAYUKI , KAMINAGA MASAMI
IPC分类号： H01L21/3205 , G06K19/07 , G06K19/077 , H01L21/28 , H01L21/306 , H01L21/3065 , H01L21/3213 , H01L21/822 , H01L23/52 , H01L27/04
CPC分类号： G06K19/07749 , G06K19/07779 , G06K19/07783 , H01L21/32134 , H01L21/32136 , H01L21/76829 , H01L21/76838 , H01L23/53223 , H01L27/124 , H01L27/1266 , H01L27/13 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To form a conductive film, which has a steep slope at an end, secures a desired film thickness, and suppresses a difference in shape from a mask pattern, by using etching. SOLUTION: After the conductive film of not less than 1 to 10 μm in film thickness containing aluminum or aluminum alloy is etched to a predetermined film thickness using wet etching, the rest is etched by dry etching to suppress side etching and a decrease in film thickness of a mask. Thus, the side etching is suppressed and the decrease in film thickness of the mask is also suppressed, so that even the conductive film whicih is thick having a thickness of 1 to 10 μm and contains aluminum or aluminum alloy is etched to have the steep slope at the end, to secure the desired film thickness, and to suppress the difference in shape from the mask pattern. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：通过使用蚀刻来形成端部具有陡峭斜率的导电膜，确保期望的膜厚度，并且抑制形状与掩模图案的差异。解决方案：使用湿蚀刻将包含铝或铝合金的膜厚度不小于1至10μm的导电膜蚀刻至预定的膜厚后，通过干蚀刻蚀刻其余部分，以抑制侧蚀刻和降低在面膜的膜厚度。因此，抑制了侧面蚀刻，并且还抑制了掩模的膜厚度的降低，使得即使导致厚度为1至10μm的厚度的包含铝或铝合金的导电膜被蚀刻以具有陡峭的斜率在最后，确保所需的膜厚度，并且抑制形状与掩模图案的差异。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2014030014A Semiconductor device and semiconductor device manufacturing method 有权
标题翻译：半导体器件和半导体器件制造方法
公开(公告)号：JP2014030014A
公开(公告)日：2014-02-13
申请号：JP2013141215
申请日：2013-07-05
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , AIHARA YAMATO , KAMINAGA MASAMI
IPC分类号： H01L29/786 , G02F1/1368 , H01L21/28 , H01L21/336 , H01L51/50
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which inhibits immersion of an impurity possibly causing variation in electrical characteristics into a semiconductor layer, and has stable electrical characteristics; and provide a manufacturing method of the semiconductor device.SOLUTION: A semiconductor device having a structure (so-called top-contact structure) having a source electrode and a drain electrode on a semiconductor layer comprises a structure in which a semiconductor layer at a position which does not overlap the source electrode or the drain electrode is made thinner than a semiconductor layer at a position which overlaps the source electrode or the drain electrode; a recess is provided in the semiconductor layer; and a rising part from a bottom face to a lateral face of the recess has a curved shape. In the structure, a lateral face of the source electrode or the drain electrode and the lateral face of the recess have no level difference.
摘要翻译：要解决的问题：提供一种半导体装置，其抑制可能引起电特性变化的杂质浸入到半导体层中，并且具有稳定的电特性; 并提供半导体器件的制造方法。解决方案：具有在半导体层上具有源电极和漏极的结构（所谓的顶部接触结构）的半导体器件包括其中位于半导体器件的位置处的半导体层的结构与源极电极或漏极电极重叠的位置的半导体层的厚度比源极电极或漏极电极重叠的位置薄，在半导体层中设置凹部; 并且从凹部的底面到侧面的上升部分具有弯曲的形状。在该结构中，源电极或漏电极的侧面和凹部的侧面没有电平差。

3. 发明专利

JP2012084852A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2012084852A
公开(公告)日：2012-04-26
申请号：JP2011195363
申请日：2011-09-07
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KAMINAGA MASAMI , AIHARA YAMATO , TOCHIBAYASHI KATSUAKI , ARAKAWA TORU
IPC分类号： H01L21/336 , H01L21/28 , H01L21/3065 , H01L29/417 , H01L29/786
CPC分类号： H01L29/66969 , H01L21/0237 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/441 , H01L21/47573 , H01L29/045 , H01L29/24 , H01L29/45 , H01L29/66742 , H01L29/78606 , H01L29/7869
摘要： PROBLEM TO BE SOLVED: To provide a technique for manufacturing a semiconductor device having a high performance and high reliable transistor.SOLUTION: When forming a wiring layer from a conductive layer, a protective conductive film for protecting an oxide semiconductor layer is formed between the oxide semiconductor layer and the conductive layer to perform two stages of etching. A first etching step employs an etching method performed under a condition that the protective conductive film is less prone to be etched than the conductive layer and an etching selection ratio of the conductive layer to the protective conductive film is high. A second etching step employs an etching method performed under a condition that the protective conductive film is more prone to be etched than the oxide semiconductor layer and the etching selection ratio of the protective conductive film to the oxide semiconductor layer is high.
摘要翻译：要解决的问题：提供一种具有高性能和高可靠性晶体管的半导体器件的制造技术。解决方案：当从导电层形成布线层时，在氧化物半导体层和导电层之间形成用于保护氧化物半导体层的保护导电膜，以进行两个阶段的蚀刻。第一蚀刻步骤采用在保护导电膜比导电层更不容易被蚀刻的条件下进行的蚀刻方法，并且导电层与保护性导电膜的蚀刻选择比率高。第二蚀刻步骤采用在保护导电膜比氧化物半导体层更易于蚀刻的条件下进行的蚀刻方法，并且保护性导电膜与氧化物半导体层的蚀刻选择比高。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JP2012003256A Liquid crystal display device and manufacturing method of the same 审中-公开
标题翻译：液晶显示装置及其制造方法
公开(公告)号：JP2012003256A
公开(公告)日：2012-01-05
申请号：JP2011111014
申请日：2011-05-18
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： AIHARA YAMATO , KAMINAGA MASAMI , SATO KITARU , ARAKAWA TORU
IPC分类号： G02F1/1368
CPC分类号： H01L27/1262 , G02F1/133553 , G02F1/13725
摘要： PROBLEM TO BE SOLVED: To provide a reflection guest-host liquid crystal display device with favorable visibility and high image quality for performing display as eye-friendly as paper.SOLUTION: In a liquid crystal display device having a guest-host liquid crystal layer held between a first substrate provided with a reflection film serving as a pixel electrode layer (also called a first electrode layer) and a second substrate provided with a common electrode layer (also called a second electrode layer), the reflection film serving as the pixel electrode layer protrudes to the liquid crystal layer so that first convexoconcave of micron size and second convexoconcave of nano size on the first convexoconcave are formed.
摘要翻译：要解决的问题：提供具有良好的可见性和高图像质量的反射客体主体液晶显示装置，用于执行如纸般的友好的显示。解决方案：在具有住宿主液晶层的液晶显示装置中，该液晶显示装置保持在设置有用作像素电极层（也称为第一电极层）的反射膜的第一基板和设置有像素电极层公共电极层（也称为第二电极层），用作像素电极层的反射膜突出到液晶层，从而形成第一凹凸上的微米尺寸的第一凸凹和纳米尺寸的第二凸凹。版权所有（C）2012，JPO＆INPIT

5. 发明专利

JP2011197653A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011197653A
公开(公告)日：2011-10-06
申请号：JP2011034648
申请日：2011-02-21
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： KAMINAGA MASAMI , AIHARA YAMATO
IPC分类号： G02F1/1368 , G02F1/133 , G02F1/1335 , G02F1/1343 , G09F9/30 , H01L29/786
CPC分类号： G02F1/133553 , G02F1/133345 , G02F1/133524 , G02F1/133555 , G02F1/1336 , G02F1/13439 , G02F1/1368 , H01L27/1225
摘要： PROBLEM TO BE SOLVED: To provide a display device of which the displayed image can be favorably recognized, and to provide a manufacturing method of the display device with high productivity.SOLUTION: Over a substrate, a pixel electrode that reflects incident light through a liquid crystal layer, a light-transmitting pixel electrode, and a structure whose side surface is covered with a reflective layer and which is positioned to overlap with the light-transmitting pixel electrode are provided. The structure is formed over a light-transmitting etching-stop layer, and the etching-stop layer remains below the structure as a light-transmitting layer.
摘要翻译：要解决的问题：提供可以有利地识别所显示的图像的显示装置，并且提供高生产率的显示装置的制造方法。解决方案：在基板上，将入射光反射通过液体的像素电极晶体层，透光像素电极和侧表面被反射层覆盖并且被定位成与透光像素电极重叠的结构。该结构形成在透光蚀刻停止层上，并且蚀刻停止层保持在作为透光层的结构的下方。

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