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1. 发明专利

JP2003008154A Printed wiring board, coaxial cable, and electronic device 审中-公开
标题翻译：印刷线路板，同轴电缆和电子设备
公开(公告)号：JP2003008154A
公开(公告)日：2003-01-10
申请号：JP2001188912
申请日：2001-06-21
申请人： Nec Corp , 日本電気株式会社
发明人： KIKUCHI HIDEO , KANEKO TOSHIYUKI , KIKUCHI HIDEKI , KINOSHITA KAZUHIRO , KAIYA KIYOHIKO , AKIMOTO YUTAKA
IPC分类号： H01B11/06 , H05K1/02 , H05K1/18
CPC分类号： H05K1/182 , H01R13/6471 , H05K1/0218 , H05K1/0243 , H05K2201/093 , H05K2201/09354 , H05K2201/09809 , H05K2201/10356
摘要： PROBLEM TO BE SOLVED: To suppress common-mode resonance currents with stability to reduce EMI without materially increasing the manufacturing cost. SOLUTION: In a printed wiring board 20, a frame-shaped additional conductor 17 is electrically connected to a T-shaped pattern constituting a ground pattern 14 so that recessed portions 16 are closed. Thus, the width of the peripheral portion of the T-shaped pattern is increased so that the recessed portions 16 are encircled with the frame-shaped additional conductors 17.
摘要翻译：要解决的问题：为了抑制共模谐振电流的稳定性，以降低EMI，而不会大幅度提高制造成本。解决方案：在印刷线路板20中，框状的附加导体17电连接到构成接地图案14的T形图案，使得凹部16闭合。因此，T形图案的周边部分的宽度增加，使得凹陷部分16被框架形附加导体17环绕。

2. 发明专利

JPH11274310A System and method for compacting graphic layout 失效
标题翻译：用于计算图形布局的系统和方法
公开(公告)号：JPH11274310A
公开(公告)日：1999-10-08
申请号：JP7594298
申请日：1998-03-24
申请人： Nec Corp , 日本電気株式会社
发明人： KIKUCHI HIDEO , AKIMOTO YUTAKA , KANEKO TOSHIYUKI
IPC分类号： H01L21/82 , G06F17/50
CPC分类号： G06F17/5081
摘要： PROBLEM TO BE SOLVED: To compact a graphic layout at once correspondingly to a layout having oblique wiring, by eliminating the obstacle encountered at the time of compacting the graphic layout. SOLUTION: A terminal graph drawing means 103 prepares terminal graph data using the terminals of parts (except wiring) as nodes and calculates the moving amounts of the nodes of the graphic data, when the nodes approach the nodes at the other ends by calculating the moving limit areas accessible from the longitudinal, transversal, and oblique directions through a wiring zone containing the width of and intervals required by the wiring held between the constituent pieces of nodes at both ends of the terminal graph data. A parts compacting means 107 compacts the parts by moving the parts by slightly deflecting the moving directions, in which the parts are moved in the X and Y-directions so that the moving directions do not cross the limit areas.
摘要翻译：要解决的问题：通过消除在压缩图形布局时遇到的障碍物，一次对应于具有倾斜布线的布局来紧凑图形布局。解决方案：终端图形绘制装置103使用部件（布线除外）的端子作为节点来准备终端图形数据，并且当节点通过计算移动的图形数据的节点接近节点时，计算图形数据的节点的移动量限制区域可以从纵向，横向和斜方向通过布线区域接收，该布线区域包含端子图数据两端的节点之间保持的布线所需的布线宽度和间隔。零件压紧装置107通过使部件在X和Y方向上移动的运动方向略微偏转来移动部件，从而使部件压紧，使得移动方向不超过极限区域。

3. 发明专利

JP2005338696A Optical component and its manufacturing method 审中-公开
标题翻译：光学元件及其制造方法
公开(公告)号：JP2005338696A
公开(公告)日：2005-12-08
申请号：JP2004160909
申请日：2004-05-31
申请人： Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Nec Corp , 三菱電機株式会社 , 日本電気株式会社 , 松下電器産業株式会社
发明人： KIKUCHI HIDEO , SASAKI JUNICHI , MATSUI TERUHITO , ITOU KATSUMICHI
IPC分类号： G02B6/42 , G02B6/122 , H01L31/02 , H01L33/38 , H01L33/60 , H01L33/62 , H01S5/022 , H01L33/00
摘要： PROBLEM TO BE SOLVED: To provide an optical component 18, which is reduced in total production cost, obtained by joining a structure 1 to the semiconductor substrate 2 of a light receiving/emitting element, wherein the structure 1 has a concave mirror 8 for converting the optical path 20 of the light receiving/emitting part 7 from vertical to parallel to the substrate face, and then by optically coupling this optical component 18 with an optical transmission line 19 on a mounting substrate 21 to mount it thereon. SOLUTION: The basic structure of the optical component 18 is protected by covering the light receiving/emitting part 7 of the semiconductor substrate 2 of the element with the resin mold 4 of the structure 1. The structure 1 is provided with an optical system that converts, with a concave mirror 8 formed on the slope 14 of a recessed part 9 in the resin mold 4, the optical path 20 of the light receiving/emitting part 7 to the optical path 20 parallel to the surface of the semiconductor substrate 2 of the element. The array of this structure 1 is together stuck to the semiconductor substrate 2 of the element with a setting resin 6 filled in the recessed part 9. Thereafter, the optical component 18 is manufactured in which the array is divided into respective pieces for each light receiving/emitting part 7, and then, this optical component 18 is installed on a mounting substrate 21 on which an optical transmission line 19 is mounted. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种通过将结构1连接到光接收/发射元件的半导体衬底2而获得的总成本降低的光学部件18，其中结构1具有凹面镜 8，用于将光接收/发射部分7的光路20从垂直方向平行于基板面转换，然后将该光学部件18与安装基板21上的光传输线19光学耦合以将其安装在其上。解决方案：通过用结构1的树脂模具4覆盖元件的半导体衬底2的光接收/发射部分7来保护光学部件18的基本结构。结构1设置有光学系统，其将形成在树脂模具4中的凹部9的斜面14上的凹面镜8，光接收/发射部分7的光路20平行于半导体衬底的表面转换到光路20 2元素。该结构体1的阵列通过填充在凹部9中的固化树脂6一起粘贴在元件的半导体基板2上。此后，制造光学部件18，其中阵列被分成各个部分，用于每个光接收 /发射部分7，然后将该光学部件18安装在安装有光传输线19的安装基板21上。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2004071658A Electronic equipment equipped with chip component and its manufacturing method 有权
公开(公告)号：JP2004071658A
公开(公告)日：2004-03-04
申请号：JP2002225416
申请日：2002-08-01
申请人： Nec Corp , 日本電気株式会社
发明人： KIKUCHI HIDEO , SASAKI JUNICHI
IPC分类号： H05K9/00 , H01C1/06 , H01G2/22 , H01G4/228 , H01L21/60 , H01L23/00 , H01L23/485 , H01L23/552 , H01S5/022 , H05K1/02 , H05K1/18
CPC分类号： H01L24/81 , H01C1/06 , H01G2/22 , H01G4/228 , H01L23/552 , H01L24/10 , H01L24/13 , H01L2224/05568 , H01L2224/05573 , H01L2224/13 , H01L2224/13099 , H01L2224/131 , H01L2224/14051 , H01L2224/16 , H01L2224/16235 , H01L2224/1703 , H01L2224/17515 , H01L2224/2929 , H01L2224/293 , H01L2224/73153 , H01L2224/73253 , H01L2224/81201 , H01L2224/8121 , H01L2224/81815 , H01L2224/83851 , H01L2224/92225 , H01L2924/0001 , H01L2924/00011 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/12043 , H01L2924/15192 , H01L2924/15787 , H01L2924/16152 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H05K1/0218 , H05K1/181 , H05K2201/10371 , H05K2201/10734 , H01L2224/81801 , H01L2224/29075 , H01L2924/00 , H01L2224/05599
摘要： PROBLEM TO BE SOLVED: To sufficiently obtain a shielding effect and cooling effect simultaneously in the shielding structure of a chip component. SOLUTION: The electronic equipment equipped with the chip component is formed of a shield conductor 3, a ceiling plate 4 having left-and-right and fore-and-rear sizes which perfectly covers the chip component 1, and side plates 5 integrated with the ceiling plate 4 and formed so as to be at a position lower than the ceiling plate 4 while being arranged at both sides of left-and-right direction of the chip component 1. Further, openings 8 for opening both sides of fore-and-rear direction of the chip component 1 are formed at both side ends in the fore-and-rear direction of the shield conductor 3, while the side plates 5 for the shield conductor 3 are electrically connected to the ground conductor pattern 11 of a mounting substrate 10 through a plurality of shielding bumps 17 along the fore-and-rear direction of the same. COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2006032595A Printed wiring board and electronic device 审中-公开
标题翻译：印刷线路板和电子设备
公开(公告)号：JP2006032595A
公开(公告)日：2006-02-02
申请号：JP2004208223
申请日：2004-07-15
申请人： Nec Corp , 日本電気株式会社
发明人： KIKUCHI HIDEO , IBARAKI OSAMU , MORI TOSHINORI
IPC分类号： H05K3/46 , H05K1/02
摘要： PROBLEM TO BE SOLVED: To reduce an EMI generated from a printed wiring board of an electronic device. SOLUTION: The printed wiring board 1 is divided into a plurality of division areas 3, and an order is reversed in the layer faces formed with an electric power face pattern 4 and a ground face pattern 5 of the adjacent division areas 3. Areas of the electric power face pattern 4 of the adjacent division areas 3 are electrically connected to each other, and areas of the ground face pattern 5 are electrically connected to each other. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：减少由电子设备的印刷线路板产生的EMI。解决方案：印刷电路板1被划分为多个划分区域3，并且在相邻划分区域3的形成有电功率面部图案4和接地面图案5的层面中顺序颠倒。相邻分割区域3的电力面图案4的区域彼此电连接，并且接地面图案5的区域彼此电连接。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2005303116A Optical module and method for manufacturing same 审中-公开
标题翻译：光学模块及其制造方法
公开(公告)号：JP2005303116A
公开(公告)日：2005-10-27
申请号：JP2004118824
申请日：2004-04-14
申请人： Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Nec Corp , 三菱電機株式会社 , 日本電気株式会社 , 松下電器産業株式会社
发明人： KIKUCHI HIDEO , SASAKI JUNICHI , MATSUI TERUHITO , ITOU KATSUMICHI
IPC分类号： H01L31/10 , H01S5/022
摘要： PROBLEM TO BE SOLVED: To provide an optical module in which all bump electrodes can be freely wired on the backside or surface of a chip even in the case of a compound semiconductor.
SOLUTION: As the basic configuration of an optical component 25, the optical component 25 is constituted of coupling a semiconductor chip 2 of a light emitting/receiving element only with a structure 1, and a light emitting/receiving part 5 in the semiconductor chip 2 of the light emitting/receiving element is covered with a plate 11 of the structure 1 so as to be protected. An element electrode pad 22 formed on the semiconductor chip 2 of the light emitting/receiving element is bonded with a metal layer 12 formed on the bottom of the plate 11 of the structure 1 to draw it out, and the semiconductor chip 2 of the light emitting/receiving element is fixed on the plate 11 by the junction point. The optical path 33 of the light emitting/receiving part 5 is transformed into an optical path 33 parallel with the surface of the semiconductor chip 2 of the light emitting/receiving element by a concave mirror 6 formed on the slant surface 15 of the plate 11 to obtain the optical component 25.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：即使在化合物半导体的情况下，提供一种光学组件，其中所有凸起电极可以自由地布线在芯片的背面或表面上。解决方案：作为光学部件25的基本结构，光学部件25仅由结构体1将发光/接收元件的半导体芯片2和发光/接收部件5的发光/ 发光/接收元件的半导体芯片2被结构体1的板11覆盖以便被保护。形成在发光/接收元件的半导体芯片2上的元件电极焊盘22与形成在结构体1的板11的底部上的金属层12接合以将其拉出，并且将光的半导体芯片2 发光/接收元件通过连接点固定在板11上。发光/接收部分5的光路33通过形成在板11的倾斜表面15上的凹面镜6变换成与发光/接收元件的半导体芯片2的表面平行的光路33 以获得光学部件25.版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JPH11272734A Graphic layout compression system and method therefor 失效
标题翻译：图形布局压缩系统及其方法
公开(公告)号：JPH11272734A
公开(公告)日：1999-10-08
申请号：JP7617698
申请日：1998-03-24
申请人： Nec Corp , 日本電気株式会社
发明人： KIKUCHI HIDEO , SHIMOZU TAKESHI
IPC分类号： H05K3/00 , G06F17/50 , H01L21/82
CPC分类号： G06F17/5081
摘要： PROBLEM TO BE SOLVED: To prevent a compaction processing from faulting.
SOLUTION: A terminal restriction graph generation means 104 generates terminal restriction graph data having parts terminals (except wiring) as nodes and calculates a movement limit distance which allows a node to come close to another node in the moving direction of parts with a wiring zone, where the width of wiring interposed between element piece numbers of nodes in both ends in terminal restriction graph data and a required space are added, between them with respect to the extent of movement of the node to another node in the other end in this terminal restriction graph and stores this calculated limit distance as a parts relative movement limit length. The terminal restriction graph generation means 104 generates parts restriction graph data where minimum values of parts relative movement limit lengths between same parts terminals are recorded as graph length, and a parts compaction means 107 uses this data to perform compaction of the layout of parts.
COPYRIGHT: (C)1999,JPO
摘要翻译：要解决的问题：防止压实处理发生故障。解决方案：终端限制图生成装置104生成具有作为节点的部分终端（布线除外）的终端限制图数据，并计算允许节点在具有布线区的部分的移动方向上靠近另一节点的移动限制距离，其中插入在终端限制图数据中两端的节点的元件号之间的布线宽度和所需的空间相对于该终端限制中的另一端的节点相对于另一节点的移动程度而相加将此计算的极限距离存储为零件相对移动限制长度。终端限制图生成装置104生成零件限制图数据，其中相同部件之间的零件相对移动限制长度的最小值被记录为图形长度，并且零件压缩装置107使用该数据来执行部件布局的压缩。

8. 发明专利

JP2007256298A Optical module and method for manufacturing the same 审中-公开
标题翻译：光学模块及其制造方法
公开(公告)号：JP2007256298A
公开(公告)日：2007-10-04
申请号：JP2004079612
申请日：2004-03-19
申请人： Nec Corp , 日本電気株式会社
发明人： KIKUCHI HIDEO , SASAKI JUNICHI
IPC分类号： G02B6/42 , G02B6/122 , G02B7/198
CPC分类号： G02B6/4214 , G02B6/4249
摘要： PROBLEM TO BE SOLVED: To provide an optical module produced at a low cost and used for conversion at 90 degrees of an optical path using a reflector having a reflective surface of high position and profile accuracy, and also to provide a manufacturing method of the same. SOLUTION: A reflective surface 2 is formed accurately by pressing a presser against the surface of each of reflectors 1a coupled in a coupling body 30 of a thin-plate reflector on a flat base, and one end of each metal wire 3 is press-fixed to each of the opposite ends at the lower part of the coupling body 30. The coupling body 30 is arranged on a substrate 5, and the metal wire 3 is turned so that the angle between the central axis of the reflective surface 2 and the substrate 5 may be about 45° or 135°, thus maximizing the optical coupling between an optical transmission line 6 and an optical element 9. The other end of each metal wire 3 is press-fixed to the substrate 5. The coupling body 30 is buried entirely in a transparent filler, which is cured to form a transparent material part 13. Division into individual reflectors 1a is performed to obtain a plurality of optical modules. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种以低成本制造的光学模块，并且使用具有高位置和轮廓精度的反射表面的反射器在90度的光路上进行转换，并且还提供一种制造方法一样的。解决方案：通过将压脚按压在耦合在平坦的底座上的薄板反射器的联接体30中的每个反射器1a的表面上，并且每个金属丝3的一端是按压固定到联接体30的下部的每个相对端。联接体30设置在基板5上，并且金属丝3被转动，使得反射表面2的中心轴线之间的角度并且基板5可以是大约45°或135°，从而使光传输线6和光学元件9之间的光学耦合最大化。每个金属丝3的另一端被压固到基板5.联接体 30完全掩埋在透明填料中，其被固化以形成透明材料部分13.执行分成各个反射器1a以获得多个光学模块。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2006013048A Light emitting optical semiconductor element and light receiving optical semiconductor element 审中-公开
标题翻译：发光光学半导体元件和光接收光学半导体元件
公开(公告)号：JP2006013048A
公开(公告)日：2006-01-12
申请号：JP2004186505
申请日：2004-06-24
申请人： Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Nec Corp , 三菱電機株式会社 , 日本電気株式会社 , 松下電器産業株式会社
发明人： MATSUI TERUHITO , ITOU KATSUMICHI , KIKUCHI HIDEO
IPC分类号： H01S5/183 , H01L31/10
摘要： PROBLEM TO BE SOLVED: To provide a light emitting optical semiconductor element, which couples an optical semiconductor element to an optical waveguide with good accuracy.
SOLUTION: The light emitting optical semiconductor element is made on a semiconductor substrate 2 which transmits a light emitting wavelength, for emitting a light in a vertical direction to the plane 100 of the semiconductor substrate. This element is integrally provided with an emitter 11 in which one end of an optical waveguide 12 for guiding a light emitted outside the light emitting optical semiconductor element is positioned, and a reflection surface 8 which is a part of the surface which reflects the emitted light in the vertical direction to the plane of the semiconductor substrate so as to be guided to one end of the optical waveguide of the emission part.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种发光光学半导体元件，其以良好的精度将光学半导体元件耦合到光波导。解决方案：发光光学半导体元件制造在半导体衬底2上，该半导体衬底2透射发光波长，用于沿垂直方向发射与半导体衬底的平面100的光。该元件一体地设置有发射器11，其中定位用于引导发光光学半导体元件外部的光的光波导12的一端和作为反射发光的表面的一部分的反射面8 在与半导体衬底的平面垂直的方向上被引导到发射部分的光波导的一端。版权所有（C）2006，JPO＆NCIPI

10. 发明专利

JP2006003818A Semiconductor integrated circuit chip and its manufacturing method 审中-公开
标题翻译：半导体集成电路芯片及其制造方法
公开(公告)号：JP2006003818A
公开(公告)日：2006-01-05
申请号：JP2004182703
申请日：2004-06-21
申请人： Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Nec Corp , 三菱電機株式会社 , 日本電気株式会社 , 松下電器産業株式会社
发明人： MATSUI TERUHITO , ITOU KATSUMICHI , KIKUCHI HIDEO
IPC分类号： G02B6/42 , H01L31/0232 , H01S5/022
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit chip equipped with a photoelectric transducing mechanism which can combine a photosemiconductor element with an optical waveguide with sufficient accuracy and in an stable state and to provide its manufacturing method.
SOLUTION: The semiconductor integrated circuit chip is provided with structure which is formed on a semiconductor integrated circuit substrate 2 where an electronic circuit is formed and with which the photosemiconductor element 5 and the optical waveguide 6 for performing light signal transmission are disposed and the photoelectric transducing mechanism including an optical reflection section 4 which carries out optical path conversion of light that is emitted from the photosemiconductor element 5 or is made incident on the photosemiconductor element and which combines the light with the optical waveguide 6. These structure and mechanism are formed by processing a part of the semiconductor integrated circuit substrate by using photoengraving technology or the like.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种配备有光电转换机构的半导体集成电路芯片，其能够以足够的精度和稳定的状态将光半导体元件与光波导组合并提供其制造方法。解决方案：半导体集成电路芯片设置有形成在形成有电子电路的半导体集成电路基板2上并且配置有用于进行光信号传输的光半导体元件5和光波导6的结构，光电转换机构包括：光反射部分4，其执行从光半导体元件5发射或入射到光半导体元件上并将光与光波导6组合的光的光路转换。这些结构和机制是通过使用光刻技术等处理半导体集成电路基板的一部分而形成。版权所有（C）2006，JPO＆NCIPI

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