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1. 发明专利

JP2010184365A Support device for designing particle dispersion to thermosetting resin, support method and program 审中-公开
标题翻译：用于设计颗粒分散到热固性树脂的支持装置，支持方法和程序
公开(公告)号：JP2010184365A
公开(公告)日：2010-08-26
申请号：JP2009028371
申请日：2009-02-10
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SAEKI JUNICHI , KONO TSUTOMU , TERAMAE TOSHIYA
IPC分类号： B29C37/00 , B29C45/76 , G06F17/50
CPC分类号： Y02T10/82
摘要： PROBLEM TO BE SOLVED: To estimate a behavior of a stirred particle rapidly precisely in a process of compounding the particle in a thermosetting resin.
SOLUTION: The support device of designing the particle dispersion to the thermosetting resin is composed of a model-making part 12 and a flow-analyzing part 13. The model-making part 12 defines shapes of a stirring vessel and a liquified resin part. An analyzing part 14 of the number of the particles in a cluster in the flow-analyzing part 13 calculates a change rate with time of the number of the particles in the cluster fed in the liquified thermosetting resin to obtain an approximate increase amount or an approximate decrease amount of the number of the particles in the cluster after a lapse of a minute time and successively obtain the number of the particles in the cluster at a new time. A thermosetting resin viscosity-analyzing part 15 in the flow-analyzing part 13 calculates the viscosity in the analyzing part 14 of the number of the particles in the cluster by using a viscosity calculating equation. A temperature and shear rate-analyzing part 16 in the flow-analyzing part 13 calculates a temperature and a distribution of a shear rate, and substitutes the result in the analyzing part 14 of the number of the particles in the cluster to successively calculate the distribution and change with time of the number of the particles in the cluster in a stirred layer.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：在将热塑性树脂中的颗粒复合的过程中快速精确地估计搅拌的颗粒的行为。解决方案：将颗粒分散体设计成热固性树脂的支撑装置由模制部件12和流动分析部件13构成。模制部件12限定搅拌容器和液化树脂的形状部分。流分析部13中的簇中的粒子数的分析部14计算在液化热固性树脂中供给的簇中的粒子数目随时间的变化率，以获得近似增加量或近似值在经过一段时间之后减少簇中的颗粒数量，并在新的时间连续获得簇中的颗粒数。流分析部13中的热固性树脂粘度分析部15通过使用粘度计算式来计算分析部14中的粒子数的粘度。流量分析部13中的温度和剪切速率分析部16计算剪切速度的温度和分布，并将分析部14中的粒子数的结果代入群中，以连续地计算分布并且随着时间的推移随着时间的推移而在簇中的颗粒数量发生变化。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2008230089A Design supporting device for resin molding, supporting method and supporting program 有权
标题翻译：用于树脂模制的设计支持设备，支持方法和支持计划
公开(公告)号：JP2008230089A
公开(公告)日：2008-10-02
申请号：JP2007074108
申请日：2007-03-22
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SAEKI JUNICHI , KONO TSUTOMU
IPC分类号： B29C45/76 , G06F17/50
CPC分类号： G06F17/5009 , G06F2217/16 , G06F2217/41 , G06F2217/80
摘要： PROBLEM TO BE SOLVED: To predict quickly and highly accurately the packing behavior at the time of resin injection regarding a thermosetting resin molding having a complicated obstacle.
SOLUTION: The model preparing section consists of a space-and-obstacle separation model preparing section and a space-and-obstacle synthesis model preparing section. The space-and-obstacle synthesis model preparing section handles the obstacle in which narrow spaces are provided regularly as a porous body. The thermosetting resin flow analyzing section consists of a space-and-obstacle separation analyzing section and a space-and-obstacle synthesis analyzing section and both have viscosity calculating formula on the thermosetting resin. The space-and-obstacle separation analyzing section analyzes by combining masses, kinetic momentums and energy conservation equations, the space-and-obstacle synthesis analyzing section analyzes by combining conservation equations objectifying the shape simplified as the porous body, and the resin flow behavior is analyzed while conducting the data giving-and-receiving in the interface of the space-and-obstacle separation model and the space-and-obstacle synthesis model.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了快速准确地预测树脂注射时对具有复杂障碍物的热固性树脂模制品的填充行为。解决方案：模型准备部分由空间和障碍物分离模型准备部分和空间与障碍物合成模型准备部分组成。空间障碍物合成模型准备部分处理作为多孔体定期提供狭窄空间的障碍物。热固性树脂流分析部由空间障碍物分离分析部和空间障碍物合成分析部构成，两者都具有热固性树脂的粘度计算式。空间障碍物分离分析部分通过组合质量，动力学和能量守恒方程进行分析，通过将简化为多孔体的形状组合的守恒方程和树脂流动行为相结合的空间与障碍物合成分析部分在空间和障碍物分离模型和空间障碍物合成模型的界面中进行数据给出和分析的同时进行分析。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2003158140A SEMICONDUCTOR PACKAGE, MANUFACTURING METHOD THEREOF, MODULE AND ELECTRONIC INSTRUMENT 审中-公开
公开(公告)号：JP2003158140A
公开(公告)日：2003-05-30
申请号：JP2001357775
申请日：2001-11-22
申请人： HITACHI LTD
发明人： TERAMAE TOSHIYA , SAEKI JUNICHI , ICHINOSE YASUJI , SUZUKI SHUICHI
IPC分类号： H01L21/60 , H01L21/56 , H01L23/31 , H01L23/485 , H01L29/06
摘要： PROBLEM TO BE SOLVED: To realize a small-size package structure capable of restraining cost-up and obtaining high reliability, in the semiconductor package of 2-electrode structure. SOLUTION: The package is constituted of an anode electrode and a cathode electrode which are provided in one plane of the surface of a semiconductor chip, projected electrodes formed on respective electrodes to connect the electrodes to an external substrate, and an insulation resin provided on a surface part of the projected electrodes, excluding at least the connecting parts for the external substrate and the surface of the semiconductor chip.

4. 发明专利

JP2003091561A THREE-DIMENSIONAL FOAMING ANALYSIS METHOD, PRODUCT DESIGN SUPPORT METHOD USING THE SAME, PROGRAM FOR EXECUTING THESE, AND RECORDING MEDIUM FOR RECORDING THESE 审中-公开
公开(公告)号：JP2003091561A
公开(公告)日：2003-03-28
申请号：JP2001282549
申请日：2001-09-18
申请人： HITACHI LTD
发明人： KONO TSUTOMU , ARAKI KUNINARI , SAEKI JUNICHI , IZEKI TAKASHI
IPC分类号： G06F17/50 , G06F19/00 , G06Q50/00 , G06Q50/04 , G06F17/60
摘要： PROBLEM TO BE SOLVED: To develop a computation method and a computation program capable of analyzing foaming flowing action for achieving correctness of foaming passage structure and correctness of foaming material injecting quantity. SOLUTION: Density is inputted as a function including a time term and a thickness term, density computed at a specified time is substituted in a continuity expression and an equation of motion to determine flow speed and pressure, and temperature is determined by an equation of energy. Heat conductivity is a function of density, and viscosity is a function including the time term. At this time, if computation is converged or not is determined, and when not, boundary conditions and molding conditions are corrected. When computation is converged, the density and pressure distribution are determined. When the density and pressure distribution are out of tolerable design ranges, an analysis program using computation methods for correcting model form, characteristic values, or molding conditions is used, thereby correctness of foaming passage structure and correctness of foaming material injecting quantity are achieved.

5. 发明专利

JP2002103407A METHOD FOR DESIGNING AND MANUFACTURING MOLDED ARTICLE 失效
公开(公告)号：JP2002103407A
公开(公告)日：2002-04-09
申请号：JP2001086298
申请日：2001-03-23
申请人： HITACHI LTD
发明人： SAEKI JUNICHI , KAWAKAMI KAZUHIKO , MASUDA MITSUYASU
IPC分类号： B29C45/26 , B29C45/00 , B29C45/14 , B29C45/76 , H01L21/56
摘要： PROBLEM TO BE SOLVED: To provide a simple molded article designing method capable of preventing the generation of the molding defectiveness of a molded article including a part. SOLUTION: In the internal model of a cavity, assuming that the viscosity of a molten resin is uniform (S101), the volume of the molten resin and the space volume of a flow channel are compared (S102, S105) and, on the basis of the comparison result, part data and cavity data not leaving voids not only in the flow channel on the back surface of the part but also the flow channel between parts are determined (S108).

6. 发明专利

JP2000195986A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JP2000195986A
公开(公告)日：2000-07-14
申请号：JP37032698
申请日：1998-12-25
申请人： HITACHI LTD
发明人： HOZOJI HIROYUKI , TSUNODA SHIGEHARU , SERIZAWA KOJI , SAEKI JUNICHI
IPC分类号： H05K1/18 , H01L21/60 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To make the terminals of a semiconductor device difficult to deform before the mounting and make them relax its mounting stress after the mounting, by connecting with its respective electrodes arranged in an area-array form annular terminals for connecting with the electrodes of a mounting board its respective electrodes arranged in an area-array form. SOLUTION: A semiconductor element 1 is mounted on a circuit board 2 for connecting it electrically with the circuit board 2 by bonding wires 3. On the back surface of the circuit board 2 to its surface of mounting thereon the semiconductor element 1, electrodes 4 used for the connection with a mounting board whereon the semiconductor device is mounted are provided to connect them via solders 5 with terminals 6 formed into annular shape. Furthermore, for protecting the semiconductor element 1 and the connecting portions of the bonding wires 3 with the board 2, the semiconductor element mounting surface of the board 2 is coated with a sealing resin 7, etc. As the metal for forming the annular terminals 6, alloys can be utilized wherein one kind of gold, silver, lead, and so forth or two or more kinds of them are mixed with an alloy made of iron/nickel, and the foregoing alloys subjected to an suitable plating with satisfactory wettable solders can be also utilized.

7. 发明专利

JPH11186453A BGA TYPE SEMICONDUCTOR DEVICE AND MOUNTING STRUCTURAL BODY FOR THE DEVICE 失效
公开(公告)号：JPH11186453A
公开(公告)日：1999-07-09
申请号：JP35790997
申请日：1997-12-25
申请人： HITACHI LTD
发明人： HOZOJI HIROYUKI , TSUNODA SHIGEHARU , SAEKI JUNICHI , KANEMITSU NOBUYA , HARUTA AKIRA , SATO TOSHIYA , TANAKA TADAYOSHI , NAGAI AKIRA
IPC分类号： H01L21/60 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a BGA type semiconductor device whose mounting on a mounting substrate or whose repair work can be easily attained, and the mounting structural body. SOLUTION: A BGA type semiconductor device is provided with a flexible substrate 2 whose surface is provided with a wiring pattern 10, and whose central part is opened; semiconductor element 6 arranged in an opening 2b of the flexible substrate 2, and whose surface is provided with an electrode 6a connected with a wiring pattern 10; resin 8 for sealing the surface of the semiconductor element 6 and a terminal area with the electrode 6a in the wiring pattern 10; and a metallic board-shaped body 1 with a difference in level corresponding to a difference in height between the back face of the semiconductor element 6 and the back face of the flexible substrate 2, which is provided with a central high plate-shaped part 1a and a surrounding low plate-shaped part 1b bonded with adhesive between each back face, and an opening at the difference in level part for connecting the central high plate-shaped part 1a with the surrounding plate-shaped part 1b or at the neighboring part of the difference in level part.

8. 发明专利

JPH1098073A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH1098073A
公开(公告)日：1998-04-14
申请号：JP16619397
申请日：1997-06-23
申请人： HITACHI LTD
发明人： HASHIZUME TAKANORI , TANAKA TADAYOSHI , SAEKI JUNICHI , TOJO SHINJI , HARUTA AKIRA , ANJO ICHIRO , NISHIMURA ASAO , NISHI KUNIHIKO , NAGAI AKIRA
IPC分类号： H01L21/60 , H01L23/12 , H01L23/28
摘要： PROBLEM TO BE SOLVED: To realize a semiconductor integrated circuit which is not only enhanced in number of pins, lessened in size, weight and thickness but also enhanced in mounting stability by a method, wherein the outer terminals of a semiconductor chip are arranged on the periphery of the semiconductor chip, and bump electrodes are arranged in two rows on the periphery of a region located outside the semiconductor chip. SOLUTION: Bonding pads 7 are arranged as a square along the periphery of a semiconductor chip 1. A flexible board 2 is composed of a tape 8 and a wiring 10, bonded to the tape 8 through the intermediary of adhesive material 9. A solder resist 3 is formed on the main surface of the wiring 10, excluding a part where solder bumps 4 are connected to the bump lands 12 of the wiring 10 through the opening provided to the solder resist 3, so as to protect the exposed part of the wiring 10. The solder bumps 4 are arranged in two rows in an outer region outside the periphery of the semiconductor chip 1, so as to be separated from each other by a distance of 0.5mm. A reinforcing frame 5 is bonded with an adhesive agent 13.

9. 发明专利

JPH1022435A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH1022435A
公开(公告)日：1998-01-23
申请号：JP17247096
申请日：1996-07-02
申请人： HITACHI LTD
发明人： TAKAHASHI MASAAKI , OGAWA TOSHIO , YAMADA KAZUJI , AIDA MASAHIRO , KAMIMURA NORITAKA , SUZUKI KAZUHIRO , KOKADO HIROYOSHI , OGINO MASAHIKO , ISHII TOSHIAKI , SAEKI JUNICHI , TSUNODA SHIGEHARU , ENDO TSUNEHIRO , SHIGEMURA TATSUYA , KUMAZAWA TETSUO , NAKATSU KINYA
IPC分类号： H01L21/56 , H01L23/50 , H01L23/52
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and manufacture thereof which enable sufficient improvement in insulating property. SOLUTION: A portion 22 to be an input/output terminal of a lead frame 2 connected with an electronic component, such as, a semiconductor chip 4, is bent and arranged in an upper mold 91 (c). After the portion 22 is resin-sealed, it is pulled up to be an input/output terminal (e), thereby enabling formation of an input/output terminal on the upper surface of a resin layer by a transfer mold method. Thus, even though transfer mold sealing of a thermosetting resin is carried out, a semiconductor device having an input/output terminal on a surface of a base board opposite to a heat sink surface may be easily provided. Therefore, a semiconductor device in which the dielectric strength between the input/output terminal and a cooling fin is significantly improved and which may be applied to a semiconductor module for electric power, such as, an inverter device, may be easily provided.

10. 发明专利

JPH09181107A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH09181107A
公开(公告)日：1997-07-11
申请号：JP1221797
申请日：1997-01-27
申请人： HITACHI LTD
发明人： SAEKI JUNICHI , KANEDA AIZO , TSUNODA SHIGEHARU , YOSHIDA ISAMU , NISHI KUNIHIKO
IPC分类号： B29C45/26 , B29C45/02 , B29C45/14 , B29L31/34 , H01L21/56
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device allowing compatibility of production efficiency and quality improvement. SOLUTION: On a metal mold consisting of a plurality of pots 2 for pressure- supplying, for instance, molding resin, an interconnection path 10 interconnecting the pots 2 and a plurality of cavities 5, 7, 9 arranged in series, a lead frame 11 whereon a plurality of tabs mounting semiconductor chips are arranged in the length-to-width directions respectively. Then, resin is thrown into the pots 2 and the pots 2 are pressed by a plurality of plungers 17 so as to inject resin into the cavities 5, 7, 9 inside a metal mold. In this way, productivity of resin-molded semiconductors and sharp improvement in the product quality can be made compatible.

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