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1. 发明专利

JPH1098073A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH1098073A
公开(公告)日：1998-04-14
申请号：JP16619397
申请日：1997-06-23
申请人： HITACHI LTD
发明人： HASHIZUME TAKANORI , TANAKA TADAYOSHI , SAEKI JUNICHI , TOJO SHINJI , HARUTA AKIRA , ANJO ICHIRO , NISHIMURA ASAO , NISHI KUNIHIKO , NAGAI AKIRA
IPC分类号： H01L21/60 , H01L23/12 , H01L23/28
摘要： PROBLEM TO BE SOLVED: To realize a semiconductor integrated circuit which is not only enhanced in number of pins, lessened in size, weight and thickness but also enhanced in mounting stability by a method, wherein the outer terminals of a semiconductor chip are arranged on the periphery of the semiconductor chip, and bump electrodes are arranged in two rows on the periphery of a region located outside the semiconductor chip. SOLUTION: Bonding pads 7 are arranged as a square along the periphery of a semiconductor chip 1. A flexible board 2 is composed of a tape 8 and a wiring 10, bonded to the tape 8 through the intermediary of adhesive material 9. A solder resist 3 is formed on the main surface of the wiring 10, excluding a part where solder bumps 4 are connected to the bump lands 12 of the wiring 10 through the opening provided to the solder resist 3, so as to protect the exposed part of the wiring 10. The solder bumps 4 are arranged in two rows in an outer region outside the periphery of the semiconductor chip 1, so as to be separated from each other by a distance of 0.5mm. A reinforcing frame 5 is bonded with an adhesive agent 13.

2. 发明专利

JP2003243446A METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2003243446A
公开(公告)日：2003-08-29
申请号：JP2002043882
申请日：2002-02-20
申请人： HITACHI LTD , MCS KK
发明人： TOJO SHINJI , KANEMITSU NOBUYA , KOYANAGI AKIRA
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To prevent the deviation of alignment between an inner lead and a projected electrode of a semiconductor chip resulting from the fluctuation of the manufacturing a film substrate. SOLUTION: A distance A up to the other end from one end of a line of the output side inner lead 5a of a film substrate, a distance B up to one end of a line of the input side inner lead 5a from one end of a line of the output side inner lead 5a, a distance C up to the other end of a line of the input side inner lead 5a from one end of a line of the output side inner lead 5a, a distance between A and B up to one end of a line of the input side inner lead 5a from the other end of a line of the output side inner lead 5a, a distance between A and C up to the other end of a line of the input side inner lead 5a from the other end of a line of the output side inner lead 5a, and a distance between C and B up to one end from the other end of a line of the input side inner lead 5a are measured. When these sizes A, B, C, A-B, A-C and B-C are within the allowance of the alignment of the inner lead 5a and an Au bump, the film substrate is determined as a good product. COPYRIGHT: (C)2003,JPO

3. 发明专利

JP2003179103A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR 审中-公开
公开(公告)号：JP2003179103A
公开(公告)日：2003-06-27
申请号：JP2001379938
申请日：2001-12-13
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： TOJO SHINJI , ICHIHARA SEIICHI , KANEMITSU NOBUYA
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To improve the bending slit part of a lead of a semiconductor device in bending strength and to restrain a tin plating layer from affecting the manufacturing of a semiconductor device, even if the tin plating layer formed on a lead becomes defective. SOLUTION: In a semiconductor device, a tin plating layer is formed on the copper lead of a tape carrier package; a copper foil 2 is provided on an insulating tape 1 and formed into a lead 3 through etching; and a first solder resist layer 9 is applied on the bent part of the lead 3, a first tin-plating operation is performed on the lead 3 in this state, a second solder resist layer is applied on a part of the lead 3 other than an outer lead and an inner lead which are plated with tin once, the outer lead and the inner lead once plated with tin are plated with tin once again, the inner lead and the electrode of a semiconductor chip are electrically connected together through a gold bump, and the semiconductor chip and the electrical joint are sealed up with resin for manufacturing the semiconductor device. COPYRIGHT: (C)2003,JPO

4. 发明专利

JP2001358170A SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JP2001358170A
公开(公告)日：2001-12-26
申请号：JP2000179877
申请日：2000-06-15
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： TOJO SHINJI , KANEMITSU NOBUYA , ICHIHARA SEIICHI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To prevent reliability of a semiconductor device from lowering due to stripping of a metal wiring formed on a tape-like wiring board, in the semiconductor device, which comprises a semiconductor chip having outer electrodes connected through bump electrodes to the metal wiring. SOLUTION: The semiconductor device is composed of a semiconductor chip, a tape board having a conductive metal wiring and a protective film for protecting the metal wiring on the surface of an insulative tape material, bump electrodes for connecting outer electrodes of the semiconductor chip to the metal wiring on the tape board, and a sealing resin filled between the semiconductor chip and the tape board, and the top ends f the metal wiring are at a distance from its portions for connecting the bump electrode, as much as the stresses exerted on connections of the bump electrodes with the metal wiring are dispersed to lessen the stripping of the metal wiring form the tape material.

5. 发明专利

JPH1098070A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS PRODUCTION 失效
公开(公告)号：JPH1098070A
公开(公告)日：1998-04-14
申请号：JP24936496
申请日：1996-09-20
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST , HITACHI DEVICE ENG
发明人： TOJO SHINJI , ICHIHARA SEIICHI , KOYAMA HIROSHI , AKIMOTO KOJI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device and its production method, by which a highly reliable TCP(tape carrier package) structure can be realized by improving flow of resin to the rear surface of a tape and suppressing the generation of cracks during a temperature cycle testing. SOLUTION: This semiconductor package of TCP structure is formed of a semiconductor chip 1, where a plurality of bumps 5 are formed on the main surface, a tape carrier 2 where a wiring 9 is formed on the main surface of a tape 7, and a solder resist 3 formed on the main surface of the tape carrier 2. The bumps 5 of the semiconductor chip 1 is connected with an inner lead 10 of the wiring 9 of the tape carrier 2, and the connected part is filled with a resin 4, forming a package structure. Further, on the main surface of the chip 1, a load-side end part, provided with the bumps 5 is made to be stepped 6, and the stepped horizontal part is overlapped with the end part on the opening side of the tape carrier 2 with a specified clearance in between.

6. 发明专利

JP2003124262A METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2003124262A
公开(公告)日：2003-04-25
申请号：JP2001311540
申请日：2001-10-09
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： TOJO SHINJI , KANEMITSU NOBUYA , ICHIHARA SEIICHI
IPC分类号： H01L21/56 , H01L21/60 , H01L23/498
摘要： PROBLEM TO BE SOLVED: To highly precisely connect the projected electrode of a semiconductor chip with the lead of a film substrate. SOLUTION: The pitch of an inner lead is previously corrected by considering the fluctuation of a lead pitch when the projected electrode of the semiconductor chip is connected to the inner lead of the film substrate. The pitch of an outer lead is previously corrected by considering the fluctuation of the lead pitch when the electrode of a liquid crystal substrate is connected to the outer lead of the film substrate.

7. 发明专利

JPH098208A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH098208A
公开(公告)日：1997-01-10
申请号：JP15020095
申请日：1995-06-16
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KIMURA MAKOTO , TOJO SHINJI , FUJIOKA TAKAHIRO , NARISAWA AKIHIKO , TANIGAWA YOSHIYUKI , KANEMITSU NOBUYA , AKIMOTO KOJI , MORI HIROYUKI
IPC分类号： H01L23/50 , G02F1/13 , G09G3/20 , H01L21/3205 , H01L21/60 , H01L23/12 , H01L23/495 , H01L23/52
摘要： PURPOSE: To provide a semiconductor device for a liquid crystal display which can be reduced in size without deteriorating the function and reliability of the device and can increase the display area of a liquid crystal display by fixing the size of the picture frame of the display device or can reduce the side of the picture frame by fixing the display area. CONSTITUTION: A lead-on-chip semiconductor device is constituted in such a way that the thin resin film 3a of a tape 3 for TCP is provided on the entire peripheral surface of the main surface of a semiconductor chip 1 and leads 4a and 4b are provided on the thin film 3a. Then the leads 4a and 4b are electrically connected to the input-output electrode pads or bumps 2a and 2b of the chip 1 and the electrically connecting sections are covered and sealed with a sealing resin 5.

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