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    • 4. 发明专利
    • CLEANING METHOD OF GAS PROCESSING EQUIPMENT
    • JP2002217166A
    • 2002-08-02
    • JP2001012257
    • 2001-01-19
    • TOSHIBA CORP
    • SAKAI ITSUKOOIWA NORIHISA
    • H01L21/302H01L21/3065
    • PROBLEM TO BE SOLVED: To effectively clean a stacked material in a circulation path in a gas processing equipment in which gas is circulated and recycled. SOLUTION: A cleaning method is provided for cleaning the gas processing equipment which comprises a processing unit 11 for carrying out a fixed process by introducing a process gas, a first exhaust unit 22, a secondary exhaust unit 23, first piping 25 and 28 for supplying a portion of an exhausted gas from the first exhaust unit and a secondary piping 27 branched from a first piping and connected to a secondary exhaust unit. The equipment has a gas circulation function of carrying out a fixed process to circulate a process gas from the gas exhaust unit of the processing unit to the gas inlet part of the processing unit through the first exhaust unit and the first piping. In the cleaning method of the gas processing equipment, times required for carrying out a fixed process by circulating the process gas in the circulation path are added up and the stacked material stacked at least in the circulation path is removed by a dry cleaning process at a stage when the added up time approaches a fixed time.
    • 7. 发明专利
    • MANUFACTURE OF SEMICONDUCTOR DEVICE
    • JPH05226609A
    • 1993-09-03
    • JP2357092
    • 1992-02-10
    • TOSHIBA CORP
    • SAKAI ITSUKOHAYASAKA NOBUOOKANO HARUO
    • H01L27/04H01L21/822H01L21/8242H01L27/10H01L27/108
    • PURPOSE:To make an unevenness on the surface of an electrode and then to materialize a highly integrated semiconductor device by down-flow etching a grain boundary of a polycrystalline substance selectively with halogen including gas. CONSTITUTION:An element isolation insulating film 102 is formed on the surface of a P-type silicon substrate 101. Then, on the whole surface, a silicon oxide film and a polycrystalline silicon film are deposited and patterned. After that, a gate insulating film 103 and a gate electrode 104 are formed. Then, ions are injected with the gate insulating film 103 and the gate electrode 104 used as a mask and a source and a drain region, both of which are formed of an n-type diffusion layer 105, are formed. Nextly, a silicon oxide film 106 is deposited and an opening is made in it to form a storage node contact 107. Then, a polycrystalline silicon film 109 is deposited on the whole surface and phosphorus is doped and the film 109 is patterned to form a capacitor lower electrode. And, the natural oxide film is removed and CF4 gas is dissolved and excited and a grain boundary of the capacitor lower electrode is selectively etched by down-flow processing to form a lot of recessed and protruding parts and thereby DRAM can be highly integrated.