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1. 发明专利

JP2014022492A Semiconductor device and manufacturing method of the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2014022492A
公开(公告)日：2014-02-03
申请号：JP2012158495
申请日：2012-07-17
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： YAMAZAKI SHUNPEI , SAKAMOTO NAOYA , SATO TAKAHIRO , KOSHIOKA SHUNSUKE , CHO TAKAYUKI , YAMAMOTO YOSHITAKA , MATSUO TAKUYA , MATSUKIZONO HIROSHI , KANZAKI YOSUKE
IPC分类号： H01L29/786 , H01L21/28 , H01L21/336 , H01L29/41 , H01L29/417
CPC分类号： H01L29/7869 , H01L29/201
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device which used a copper-containing metal film for wiring or signal lines in a transistor using an oxide semiconductor film, and which has stable electric characteristics.SOLUTION: A semiconductor device comprises: a gate electrode 104; a gate insulation film 106 formed on the gate electrode 104; an oxide semiconductor film 108 including a channel formation region 108a formed at a position contacting the gate insulation film and overlapping the gate electrode; a source electrode 110 and a drain electrode 112 which are formed on the oxide semiconductor film 108; and an oxide insulation film 114 formed on the oxide semiconductor film, the source electrode and the drain electrode. The source electrode and the drain electrode include: first metal films 110a, 112a having ends lying on ends of the channel formation region, respectively; second copper-containing metal films 110b, 112b formed on the first metal films 110a, 112a, respectively; and third metal films 110c, 112c formed on the second metal films, respectively. Each second metal films are formed inside the respective ends of the first metal films.
摘要翻译：要解决的问题：提供一种使用氧化物半导体膜的晶体管中使用含铜金属膜进行布线或信号线的高可靠性的半导体装置，其具有稳定的电特性。解决方案：半导体器件包括：栅极电极104; 形成在栅电极104上的栅极绝缘膜106; 氧化物半导体膜108，其包括形成在与栅极绝缘膜接触并与栅电极重叠的位置处的沟道形成区域108a; 形成在氧化物半导体膜108上的源电极110和漏电极112; 以及形成在氧化物半导体膜，源电极和漏电极上的氧化物绝缘膜114。源电极和漏电极包括：分别具有位于沟道形成区的端部的端部的第一金属膜110a，112a; 分别形成在第一金属膜110a，112a上的第二含铜金属膜110b，112b; 以及形成在第二金属膜上的第三金属膜110c，112c。每个第二金属膜形成在第一金属膜的相应端部内。

2. 发明专利

JP2013222818A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013222818A
公开(公告)日：2013-10-28
申请号：JP2012093512
申请日：2012-04-17
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： YOKOYAMA MASATOSHI , MURAKAWA TSUTOMU , OKAZAKI KENICHI , SAKAKURA MASAYUKI , MATSUO TAKUYA , ODA AKIHIRO , MORI SHIGEYASU , YAMAMOTO YOSHITAKA
IPC分类号： H01L21/336 , G02F1/1368 , H01L29/786 , H01L51/50
CPC分类号： H01L29/7869
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which inhibits generation of a parasitic channel at an end region of an oxide semiconductor film.SOLUTION: A semiconductor device comprises: a gate electrode 106; an oxide semiconductor film 110; a source electrode 114A and a drain electrode 114b; and a channel region formed in the oxide semiconductor film. The channel region is formed between a first lateral face 214a of the source electrode and a second lateral face 214b of the drain electrode opposite to the first lateral face 214a. The oxide semiconductor film includes an end region 206 which does not overlap the gate electrode. The end region which does not overlap is positioned between a first region 206a closest from one end 314a of the first lateral face 214a and a second region 206b closest from one end 314b of the second lateral face 214b.
摘要翻译：要解决的问题：提供一种抑制在氧化物半导体膜的端部区域产生寄生通道的半导体器件。解决方案：半导体器件包括：栅电极106; 氧化物半导体膜110; 源电极114A和漏电极114b; 以及形成在氧化物半导体膜中的沟道区。沟道区形成在源电极的第一侧面214a和与第一侧面214a相对的漏电极的第二侧面214b之间。氧化物半导体膜包括不与栅电极重叠的端部区域206。不重叠的端部区域位于从第一侧面214a的一端314a最近的第一区域206a和最靠近第二侧面214b的一端314b的第二区域206b之间。

3. 发明专利

JP2003037064A Method and apparatus for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法和装置
公开(公告)号：JP2003037064A
公开(公告)日：2003-02-07
申请号：JP2002142264
申请日：2002-05-17
申请人： Semiconductor Energy Lab Co Ltd , Sharp Corp , シャープ株式会社 , 株式会社半導体エネルギー研究所
发明人： NAKAJIMA SETSUO , SHIGA AIKO , MAKITA NAOKI , MATSUO TAKUYA
IPC分类号： H01L21/20 , H01L21/336 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a technology for manufacturing a TFT in which variation of electrical characteristics is suppressed. SOLUTION: Contamination of a semiconductor film is suppressed by performing oxidation having an effect of removing organic matters following to removal of a native oxide formed on the surface of the semiconductor film, thereby forming a clean oxide film and then performing laser annealing. A TFT in which variation of electrical characteristics is suppressed can be obtained when a semiconductor film thus obtained is employed in the active layer of the TFT and the electrical characteristics can be enhanced. Furthermore, productivity can be enhanced while minimizing lowering of throughput by employing an apparatus in this invention for manufacturing a semiconductor device.
摘要翻译：要解决的问题：提供一种抑制电特性变化的TFT的制造技术。解决方案：通过在除去形成在半导体膜表面上的自然氧化物之后进行具有去除有机物质的效果的氧化来抑制半导体膜的污染，从而形成干净的氧化膜，然后进行激光退火。如果在TFT的有源层中使用由此获得的半导体膜，则可以获得抑制电特性变化的TFT，并且可以提高电特性。此外，通过采用本发明的用于制造半导体器件的装置，可以最大限度地提高生产率，同时最小化吞吐量降低。

4. 发明专利

JP2014207285A 表示装置及び電子機器有权
标题翻译：显示设备和电子设备
公开(公告)号：JP2014207285A
公开(公告)日：2014-10-30
申请号：JP2013083131
申请日：2013-04-11
申请人：株式会社半導体エネルギー研究所 , Semiconductor Energy Lab Co Ltd , シャープ株式会社 , Sharp Corp
发明人： HIZUKA JUNICHI , KATAYAMA MASAHIRO , SHIMA YUKINORI , OKAZAKI KENICHI , MATSUO TAKUYA , MORI SHIGEYASU , KANZAKI YOSUKE , MATSUKIZONO HIROSHI
IPC分类号： H01L29/786 , G02F1/1368 , H01L21/336
CPC分类号： H01L27/1225 , H01L23/3121 , H01L23/564 , H01L27/1248 , H01L2924/0002 , H01L2924/0001 , H01L2924/00
摘要：【課題】トランジスタの電気特性の変動を抑制すると共に、信頼性を向上させる。【解決手段】画素部104と、前記画素部の外側に設けられる駆動回路部106と、を有し、前記画素部は、画素トランジスタと、前記画素トランジスタを覆う無機材料で形成される第1の絶縁層122と、前記第1の絶縁層上に設けられ、且つ有機材料で形成される第2の絶縁層124と、前記第2の絶縁層上に設けられ、且つ無機材料で形成される第3の絶縁層128と、を有し、前記駆動回路部は、前記画素トランジスタに信号を供給する駆動トランジスタと、前記駆動トランジスタを覆う前記第1の絶縁層と、を有し、前記駆動回路部において、前記第2の絶縁層は形成されていない表示装置である。【選択図】図1
摘要翻译：要解决的问题：抑制晶体管的电特性的变化并提高晶体管的可靠性。解决方案：显示装置具有设置在像素部分外部的像素部分104和驱动电路部分106。像素部分包括像素晶体管，覆盖像素晶体管并由无机材料形成的第一绝缘层122，设置在第一绝缘层上并由有机材料形成的第二绝缘层124和第三绝缘层绝缘层128，其设置在第二绝缘层上并由无机材料形成。驱动电路部分包括用于向像素晶体管提供信号的驱动晶体管和覆盖驱动晶体管的第一绝缘层。在驱动电路部分中，不形成第二绝缘层。

5. 发明专利

JP2014090068A Display device and electronic apparatus 有权
标题翻译：显示设备和电子设备
公开(公告)号：JP2014090068A
公开(公告)日：2014-05-15
申请号：JP2012238918
申请日：2012-10-30
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： HIZUKA JUNICHI , SHIMA YUKINORI , HOSAKA HIROYASU , OKAZAKI KENICHI , MATSUO TAKUYA , MORI SHIGEYASU , KANZAKI YOSUKE , MATSUKIZONO HIROSHI
IPC分类号： H01L21/318 , G02F1/1368 , G09F9/30 , H01L21/312 , H01L21/316 , H01L21/336 , H01L29/786
CPC分类号： H01L27/1225 , H01L27/3262
摘要： PROBLEM TO BE SOLVED: To suppress variation in electrical characteristics of a transistor, and to improve reliability thereof.SOLUTION: A display device has a pixel part 104 and a driving circuit part 106 provided outside the pixel part. The pixel part has a pixel transistor 252, a first insulating film 124 covering the pixel transistor and formed of an inorganic material, a second insulating film 126 provided on the first insulating film and formed of an organic material, and a third insulating film 130 provided on the second insulating film and formed of an inorganic material. The driving circuit part has a driving transistor 250 for supplying a signal to the pixel transistor, the first insulating film covering the driving transistor, and the second insulating film formed on the first insulating film. The display device has, in the driving circuit part, either a region in which the third insulating film is not formed on the second insulating film or a region in which the second insulating film is not covered with the third insulating film.
摘要翻译：要解决的问题：抑制晶体管的电特性的变化并提高其可靠性。解决方案：显示装置具有设置在像素部分外部的像素部分104和驱动电路部分106。像素部分具有像素晶体管252，覆盖像素晶体管并由无机材料形成的第一绝缘膜124，设置在第一绝缘膜上并由有机材料形成的第二绝缘膜126和设置在第一绝缘膜130上的第三绝缘膜130 在第二绝缘膜上并由无机材料形成。驱动电路部分具有用于向像素晶体管提供信号的驱动晶体管250，覆盖驱动晶体管的第一绝缘膜和形成在第一绝缘膜上的第二绝缘膜。显示装置在驱动电路部分中，在第二绝缘膜上没有形成第三绝缘膜的区域或第二绝缘膜未被第三绝缘膜覆盖的区域。

6. 发明专利

JP2005183774A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005183774A
公开(公告)日：2005-07-07
申请号：JP2003424370
申请日：2003-12-22
申请人： Semiconductor Energy Lab Co Ltd , Sharp Corp , シャープ株式会社 , 株式会社半導体エネルギー研究所
发明人： ARAO TATSUYA , KITAKADO HIDETO , MATSUO TAKUYA , KIYOUHO MASANORI
IPC分类号： H01L27/08 , H01L21/336 , H01L21/8234 , H01L27/088 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which prevents spot-facing in an underlayer insulating film under a semiconductor layer. SOLUTION: In the manufacturing method of the semiconductor device, semiconductor layers 3a, 3b are formed on the underlayer insulating film 2, a first insulating film 4 is formed on the semiconductor layers 3a, 3b, and the first insulating film 4 located on a channel formation region of the semiconductor layer 3a at a low voltage driving side is removed by etching using the semiconductor layer 3a as an etching stopper. Consequently, a second insulating film 6 is formed on the channel formation region of the semiconductor layer 3a and the first insulating film 4 with the first insulating film 4 left on a source region and a drain region of the semiconductor layer 3a and the semiconductor layer 3b. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种防止在半导体层下面的下层绝缘膜中的点对准的半导体器件。解决方案：在半导体器件的制造方法中，半导体层3a，3b形成在下层绝缘膜2上，第一绝缘膜4形成在半导体层3a，3b上，第一绝缘膜4位于在半导体层3a的低电压驱动侧的沟道形成区域上通过使用半导体层3a作为蚀刻停止层的蚀刻来去除。因此，第二绝缘膜6形成在半导体层3a和第一绝缘膜4的沟道形成区上，第一绝缘膜4留在半导体层3a和半导体层3b的源极区域和漏极区域上。版权所有（C）2005，JPO＆NCIPI

7. 发明专利

JP2014207286A 半導体装置、表示装置及び半導体装置の作製方法有权
标题翻译：半导体器件，显示器件和半导体器件的制造方法
公开(公告)号：JP2014207286A
公开(公告)日：2014-10-30
申请号：JP2013083132
申请日：2013-04-11
申请人：株式会社半導体エネルギー研究所 , Semiconductor Energy Lab Co Ltd , シャープ株式会社 , Sharp Corp
发明人： HIZUKA JUNICHI , OKAZAKI KENICHI , TAKAHASHI MASAHIRO , MATSUO TAKUYA , MORI SHIGEYASU , KANZAKI YOSUKE , MATSUKIZONO HIROSHI
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/66969 , H01L29/78618 , H01L29/78696
摘要：【課題】チャネル長の縮小を抑制した新規な半導体装置を提供する。【解決手段】結晶部を含む酸化物半導体層112と、前記酸化物半導体層112に接するソース電極層108及びドレイン電極層110と、を有し、前記酸化物半導体層112は、チャネル形成領域と、前記ソース電極層108及び前記ドレイン電極層110と接するn型領域112aと、を有し、前記チャネル形成領域と、前記n型領域112aで、前記結晶部の結晶方向が異なることを特徴とする半導体装置である。【選択図】図1
摘要翻译：要解决的问题：提供抑制沟道长度减小的新的半导体器件。解决方案：半导体器件包括：包括晶体部分的氧化物半导体层112; 与氧化物半导体层112接触的源极电极层108和漏电极层110.氧化物半导体层112具有沟道形成区域和与源电极层108和漏极接触的n型区域112a 电极层110.晶体部分中的晶体取向在沟道形成区域和n型区域112a之间不同。

8. 发明专利

JP2013222812A Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013222812A
公开(公告)日：2013-10-28
申请号：JP2012093303
申请日：2012-04-16
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： OKAZAKI KENICHI , YOKOYAMA MASATOSHI , SAKAKURA MASAYUKI , SHIMA YUKINORI , KANZAKI YOSUKE , MATSUKIZONO HIROSHI , MATSUO TAKUYA , YAMAMOTO YOSHITAKA
IPC分类号： H01L29/786 , H01L21/20 , H01L21/336
CPC分类号： H01L29/7869 , H01L21/02172 , H01L29/66742 , H01L29/66969 , H01L29/78606 , H01L29/78696
摘要： PROBLEM TO BE SOLVED: To suppress occurrence of a conductive mode failure even in a transistor which uses an oxide semiconductor film having a short channel length.SOLUTION: A semiconductor device comprises: a gate electrode 304; a gate insulating film 306 formed on the gate electrode; an oxide semiconductor film 308 formed on the gate insulating film; and a source electrode 310a and a drain electrode 310b formed on the oxide semiconductor film. The length L of a channel formed on the oxide semiconductor film is 1 to 50 μm. A rotation angle 2θ measured by X-ray diffraction in the oxide semiconductor film has a peak near 31°.
摘要翻译：要解决的问题：即使在使用具有短沟道长度的氧化物半导体膜的晶体管中，也抑制导电模式故障的发生。解决方案：半导体器件包括：栅电极304; 形成在栅电极上的栅极绝缘膜306; 形成在栅极绝缘膜上的氧化物半导体膜308; 以及形成在氧化物半导体膜上的源电极310a和漏电极310b。形成在氧化物半导体膜上的沟道的长度L为1〜50μm。旋转角度2＆amp; 在氧化物半导体膜中通过X射线衍射测得的峰值接近31°。

9. 发明专利

JP2005210109A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005210109A
公开(公告)日：2005-08-04
申请号：JP2004374153
申请日：2004-12-24
申请人： Semiconductor Energy Lab Co Ltd , Sharp Corp , シャープ株式会社 , 株式会社半導体エネルギー研究所
发明人： ONUMA HIDETO , SAKAKURA MASAYUKI , MITANI YASUHIRO , MATSUO TAKUYA , KITAKADO HIDETO
IPC分类号： H01L21/20 , H01L21/336 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method which suppresses the growth of pores in a crystalline semiconductor film.
SOLUTION: The semiconductor device manufacturing method comprises a step of forming an amorphous silicon film 3 on a substrate 1 having an insulation surface, adding a metal element such as Ni onto the amorphous silicon film 3 for accelerating the crystallization of the amorphous silicon film, heat treating the amorphous silicon film 3 to crystallize this film, thus forming a crystalline silicon film 5 on the substrate, removing a silicon oxide film formed by the heat treatment on the crystalline silicon film 5 surface with a solution containing organic solvents and a fluoride, and irradiating the crystalline silicon film 5 with a laser beam or a strong light beam.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供抑制结晶半导体膜中的孔的生长的半导体器件及其制造方法。解决方案：半导体器件制造方法包括在具有绝缘表面的衬底1上形成非晶硅膜3的步骤，在非晶硅膜3上添加诸如Ni的金属元素以加速非晶硅的结晶化膜，热处理非晶硅膜3以使该膜结晶，从而在基板上形成结晶硅膜5，通过含有有机溶剂的溶液和在结晶硅膜5表面上除去通过热处理形成的氧化硅膜，并且用激光束或强光束照射结晶硅膜5。版权所有（C）2005，JPO＆NCIPI

10. 发明专利

JP2005191212A Semiconductor device and manufacturing method therefor 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005191212A
公开(公告)日：2005-07-14
申请号：JP2003429510
申请日：2003-12-25
申请人： Semiconductor Energy Lab Co Ltd , Sharp Corp , シャープ株式会社 , 株式会社半導体エネルギー研究所
发明人： FUJIKAWA SAISHI , SATO TOMOHIKO , SASAGAWA SHINYA , MATSUO TAKUYA , KITAKADO HIDETO
IPC分类号： H01L29/423 , H01L21/265 , H01L21/336 , H01L21/8234 , H01L27/08 , H01L27/088 , H01L29/41 , H01L29/49 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and a manufacturing method therefor, in which generation of damage or contamination of semiconductor layer can be controlled, even when gate insulating films are formed into different thicknesses. SOLUTION: The semiconductor device is manufactured by forming semiconductor layers 3a, 3b on a substrate, forming first insulating films 4, respectively on the semiconductor layers 3a, 3b, forming a second insulating film 5 on the semiconductor layer 3b via the first insulating film 4, and forming a third insulating film 6 on the second insulating film 5. The first insulating film 4, formed on the semiconductor layer 3a, forms a first gate insulating film, and the first to third insulating films 4 to 6 formed on the semiconductor layer 3b form a second gate insulating film. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：即使当栅极绝缘膜形成为不同的厚度时，提供可以控制半导体层的损伤或污染的产生的半导体器件及其制造方法。解决方案：半导体器件通过在衬底上形成半导体层3a，3b来制造，分别在半导体层3a，3b上形成第一绝缘膜4，在半导体层3b上形成第二绝缘膜5，经由第一绝缘膜4，并且在第二绝缘膜5上形成第三绝缘膜6.形成在半导体层3a上的第一绝缘膜4形成第一栅极绝缘膜，形成在第一绝缘膜4上的第一至第三绝缘膜4至6 半导体层3b形成第二栅极绝缘膜。版权所有（C）2005，JPO＆NCIPI

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