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131. 发明专利

JP2011258773A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011258773A
公开(公告)日：2011-12-22
申请号：JP2010132332
申请日：2010-06-09
申请人： Rohm Co Ltd , ローム株式会社
发明人： YOSHIMOCHI KENICHI
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/0649 , H01L29/1095 , H01L29/41766 , H01L29/4236 , H01L29/42372 , H01L29/4238 , H01L29/456 , H01L29/4916 , H01L29/4925 , H01L29/66727 , H01L29/66734 , H01L29/7811
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which enables a reduction in the number of manufacturing processes without sacrificing the performance and also has sufficient breakdown resistance, and to provide a manufacturing method of the semiconductor device.SOLUTION: A semiconductor device 1 comprises: source metal embedded in a source contact groove penetrating through a source region 4 to reach a channel region 5; and a gate insulating film 8 formed on a side wall of a gate trench 7 formed so as to penetrate through the source region 4 and the channel region 5, and reach a drain region 6. The semiconductor device 1 further includes: a polysilicon gate 10 embedded in the gate trench 7 so that the entire part is positioned under a surface of the source region 4; and gate metal 14, 22 and 162 which are embedded in a gate contact groove 21 formed in the polysilicon gate 10 so as to reach the depth of the channel region 5, and which are in contact with the polysilicon gate 10.
摘要翻译：要解决的问题：提供一种半导体器件，其能够在不牺牲性能的同时减少制造工艺的数量并且还具有足够的耐击穿性，并且提供半导体器件的制造方法。解决方案：半导体器件1包括：源极金属，其嵌入源极接触槽中，穿过源极区域4到达沟道区域5; 以及形成在栅极沟槽7的侧壁上的栅极绝缘膜8，其形成为穿透源极区域4和沟道区域5，并到达漏极区域6.半导体器件1还包括：多晶硅栅极10 嵌入栅极沟槽7中，使得整个部分位于源极区域4的表面下方; 以及栅极金属14,22和162，其嵌入形成在多晶硅栅极10中的栅极接触槽21中，以便到达沟道区5的深度并与多晶硅栅极10接触。（C）2012，JPO＆INPIT

132. 发明专利

JP4843204B2 Integrated fet and schottky device 有权
公开(公告)号：JP4843204B2
公开(公告)日：2011-12-21
申请号：JP2004227165
申请日：2004-08-03
申请人：インターナショナルレクティフィアーコーポレイション
发明人：ダビデ・チオラ , ドナルド・ヘ , リトゥ・ソディ
IPC分类号： H01L29/78 , H01L29/872 , H01L21/329 , H01L21/336 , H01L21/8234 , H01L21/8248 , H01L27/02 , H01L27/04 , H01L27/06 , H01L27/088 , H01L29/40 , H01L29/423 , H01L29/45 , H01L29/47 , H01L29/76
CPC分类号： H01L29/407 , H01L27/0629 , H01L29/42368 , H01L29/456 , H01L29/66727 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/8725
摘要： A semiconductor device including a schottky device and a trench type semiconductor switching device such as a MOSFET formed in a common die.

133. 发明专利

JP2011216847A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011216847A
公开(公告)日：2011-10-27
申请号：JP2010280431
申请日：2010-12-16
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： INOMATA HISAO
IPC分类号： H01L29/06 , H01L29/78
CPC分类号： H01L29/7813 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/7811
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device of an SJ structure having improved breakdown voltage and breakdown resistance.SOLUTION: The semiconductor device 1 includes a transistor element 200 formed on a semiconductor substrate 101, the transistor element having a parallel structure composed of a first conductive drift region 202 and a second conductive column region 205 and a second conductive base region 203. The parallel structure composed of the first conductive drift region 202 and the second conductive column regions 205 and a second conductive annular diffusion region 303 located on a side of the base region 203 to be separated therefrom are formed in an outer peripheral region 300X outside an element forming region. The annular diffusion region 303 has an innermost end 303A and a portion close thereto that are located on the column region 205, and an outermost end 303B that is located outside the outermost column region 205. A field insulating film 306 covering the annular diffusion region 303 is overlaid on a semiconductor layer 201 of the outer peripheral region 300X.
摘要翻译：要解决的问题：提供具有改进的击穿电压和耐击穿性的SJ结构的半导体器件。解决方案：半导体器件1包括形成在半导体衬底101上的晶体管元件200，该晶体管元件具有由第一导电漂移区域202和第二导电柱区域205以及第二导电基极区域203.由第一导电漂移区域202和第二导电柱区域205以及位于一侧的第二导电环形扩散区域303构成的并联结构在元件形成区域外侧的外周区域300X上形成有与基板区域203分离的基板区域203。环状扩散区域303具有位于列区域205上的最内端303A和靠近其的部分，以及位于最外侧列区域205外侧的最外端303B。覆盖环状扩散区域303的场绝缘膜306 覆盖在外周区域300X的半导体层201上。

134. 发明专利

JP2011211020A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011211020A
公开(公告)日：2011-10-20
申请号：JP2010078280
申请日：2010-03-30
申请人： Rohm Co Ltd , ローム株式会社
发明人： OKUMURA KEIKI , MIURA MINEO , NAKANO YUUKI , KAWAMOTO NORIAKI , ABE HIDETOSHI
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66734 , H01L21/02164 , H01L21/02271 , H01L21/02529 , H01L21/0254 , H01L21/0465 , H01L21/31111 , H01L29/0615 , H01L29/0619 , H01L29/0657 , H01L29/0696 , H01L29/0886 , H01L29/1095 , H01L29/1608 , H01L29/4236 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/45 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66068 , H01L29/7811 , H01L29/7813
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that has superior breakdown voltage characteristics and is manufactured in good yield.SOLUTION: The semiconductor device 1 has a vertical structure in which an N-type source region 15 and an N-type drift region 13 are arranged spaced apart from each other across a P-type body region 12 in a vertical direction perpendicular to a surface 9 (main surface) of an epitaxial layer 8. On the epitaxial layer 8, a gate insulating film 19 is formed. On the gate insulating film, a gate electrode 20 is formed, and faces the body region 12. Between mutually adjacent body regions 12 (in an inter-body region 16), a P-type implantation region 21 is formed by implanting a P-type impurity into the epitaxial layer 8.
摘要翻译：要解决的问题：提供具有优异的击穿电压特性并以良好的产率制造的半导体器件。解决方案：半导体器件1具有垂直结构，其中N型源极区15和N型漂移区13 在垂直于外延层8的表面9（主表面）的垂直方向上在P型体区12彼此间隔开排列。在外延层8上形成栅极绝缘膜19。在栅极绝缘膜上形成栅电极20，面向体区12.在相互相邻的体区12（体间区域16）之间形成有P型注入区21，将杂质掺杂到外延层8中。

135. 发明专利

JP2011204710A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011204710A
公开(公告)日：2011-10-13
申请号：JP2010067569
申请日：2010-03-24
申请人： Fuji Electric Co Ltd , 富士電機株式会社
发明人： LU HONG-FEI
IPC分类号： H01L29/06 , H01L21/336 , H01L29/739 , H01L29/78
CPC分类号： H01L29/7818 , H01L21/266 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/66348 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/8611
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a stable termination structure of high breakdown voltage wherein the length of the termination structure region is short and influence of the external charges is very small.SOLUTION: The semiconductor device includes: a first conductivity type n-type drift layer 1; a second conductivity type VLD region 17 which is formed on a chip inner circumferential side of a termination structure region 33 provided on one principal surface of the n-type drift layer 1 and which is higher in concentration than the n-type drift layer 1; and a second conductivity type first clip layer 17e which is formed on a chip outer circumferential side of the VLD region 17 so as to be separated from the VLD region 17 and which is higher in concentration than the n-type drift layer 1. The device can also include a first conductivity type channel stopper layer 6 which is formed on a chip outer circumferential side of the first clip layer 17e so as to be separated from the first clip layer 17e and which is higher in concentration than the n-type drift layer 1.
摘要翻译：要解决的问题：提供一种具有稳定的高击穿电压的端接结构的半导体器件，其中终端结构区域的长度短并且外部电荷的影响非常小。解决方案：半导体器件包括：第一导电类型 n型漂移层1; 第二导电型VLD区域17，其形成在设置在n型漂移层1的一个主表面上并且浓度高于n型漂移层1的端接结构区域33的芯片内周侧上; 以及第二导电型第一夹层17e，其形成在VLD区17的芯片外圆周侧上，以便与VLD区17分离，并且其浓度高于n型漂移层1.该器件还可以包括第一导电型沟道阻挡层6，其形成在第一夹层17e的芯片外周侧上以与第一夹层17e分离并且其浓度高于n型漂移层 1。

136. 发明专利

JP4771694B2 Trench gate power devices and the edge termination technology 有权
公开(公告)号：JP4771694B2
公开(公告)日：2011-09-14
申请号：JP2004502327
申请日：2003-04-10
申请人：フェアチャイルド・セミコンダクター・コーポレーション
发明人：ジュンゾン
IPC分类号： H01L29/78 , H01L21/336 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/40
CPC分类号： H01L29/407 , H01L29/0657 , H01L29/0847 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/66734 , H01L29/7811 , H01L29/7813
摘要： Merging together the drift regions in a low-power trench MOSFET device via a dopant implant through the bottom of the trench permits use of a very small cell pitch, resulting in a very high channel density and a uniformly doped channel and a consequent significant reduction in the channel resistance. By properly choosing the implant dose and the annealing parameters of the drift region, the channel length of the device can be closely controlled, and the channel doping may be made highly uniform. In comparison with a conventional device, the threshold voltage is reduced, the channel resistance is lowered, and the drift region on-resistance is also lowered. Implementing the merged drift regions requires incorporation of a new edge termination design, so that the PN junction formed by the P epi-layer and the N substrate can be terminated at the edge of the die.

137. 发明专利

JP2011171551A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2011171551A
公开(公告)日：2011-09-01
申请号：JP2010034595
申请日：2010-02-19
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： FUJIWARA HIROKAZU , KONISHI MASAKI , KATSUNO TAKASHI , WATANABE YUKIHIKO , SOEJIMA SHIGEMASA , KAWAI JUN , YAMAMOTO TAKEO , ENDO TAKESHI
IPC分类号： H01L21/28 , H01L21/268 , H01L21/304 , H01L21/336 , H01L29/12 , H01L29/47 , H01L29/78 , H01L29/872
CPC分类号： H01L21/268 , C21D1/09 , C22F1/10 , H01L21/0485 , H01L21/0495 , H01L21/324 , H01L21/67115 , H01L29/0615 , H01L29/0619 , H01L29/1095 , H01L29/1608 , H01L29/45 , H01L29/47 , H01L29/6606 , H01L29/66068 , H01L29/7811 , H01L29/7813 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To produce a silicon carbide semiconductor device by a manufacturing method to previously execute a front surface structure forming step and then execute a rear surface structure forming step and also assure characteristics of the silicon carbide semiconductor device.
SOLUTION: The method of manufacturing silicon carbide semiconductor device including a front surface electrode and a rear surface electrode includes the front surface structure forming step and the rear surface structure forming step. The front surface structure forming step includes a front surface electrode material layer forming step to form a front surface electrode material layer as the front surface electrode material in contact with a semiconductor substrate and a first annealing step to execute an annealing process to the front surface electrode material layer. The rear surface structure forming step includes a rear surface electrode material layer forming step to form the rear surface electrode material layer as the rear surface electrode layer material in contact with the semiconductor substrate, a second annealing step to achieve ohmic contact between the rear surface electrode material layer and the semiconductor substrate through laser irradiation to the rear surface electrode material layer, and a rear surface structure forming step to be executed after the front surface structure forming step.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了通过制造方法制造碳化硅半导体器件，以预先执行前表面结构形成步骤，然后执行后表面结构形成步骤，并且还确保碳化硅半导体器件的特性。解决方案：制造包括前表面电极和后表面电极的碳化硅半导体器件的方法包括前表面结构形成步骤和后表面结构形成步骤。前表面结构形成步骤包括：前表面电极材料层形成步骤，用于形成作为与半导体衬底接触的正面电极材料的正面电极材料层，以及对前表面电极执行退火处理的第一退火步骤材料层。后表面电极材料层形成步骤包括：背面电极材料层形成步骤，用于形成背面电极材料层作为与半导体衬底接触的背面电极层材料;第二退火步骤，用于实现后表面电极之间的欧姆接触材料层和半导体衬底通过激光照射到后表面电极材料层，以及后表面结构形成步骤，以在前表面结构形成步骤之后执行。版权所有（C）2011，JPO＆INPIT

138. 发明专利

JP2011142269A Manufacturing method of semiconductor device and semiconductor device 审中-公开
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：JP2011142269A
公开(公告)日：2011-07-21
申请号：JP2010003094
申请日：2010-01-08
申请人： Toshiba Corp , 株式会社東芝
发明人： ISHIKAWA HIROCHIKA , SATO SHINYA , SUGAYA HIROYUKI , SAKUMA TOMONORI
IPC分类号： H01L29/78 , H01L21/329 , H01L21/336 , H01L29/739 , H01L29/861
CPC分类号： H01L21/02381 , H01L21/0243 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L21/02639 , H01L29/0634 , H01L29/0638 , H01L29/1095 , H01L29/42368 , H01L29/66712 , H01L29/7802 , H01L29/7811
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device suppressing a crystal defect having an effect on reliability and a manufacturing method for the semiconductor device.
SOLUTION: The semiconductor device 1 includes an n-type silicon layer 12 as a first conductivity type first semiconductor layer with trenches 13 and p-type silicon pillars 14 as second conductivity type second semiconductor layers embedded in the trenches 13 and provided with cavities BD in the inside. In the semiconductor device 1, the length of the cavity BD along the depth direction of the trench 13 is 5 μm or less or 15 μm or more.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供抑制对可靠性产生影响的晶体缺陷的半导体器件和用于半导体器件的制造方法。解决方案：半导体器件1包括作为第一导电类型的第一半导体层的n型硅层12，其具有沟槽13和p型硅柱14，作为嵌入沟槽13中的第二导电类型的第二半导体层，腔BD内部。在半导体装置1中，空洞BD沿着沟槽13的深度方向的长度为5μm以下或15μm以上。版权所有（C）2011，JPO＆INPIT

139. 发明专利

JP2011114028A SiC SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译： SiC半导体器件及其制造方法
公开(公告)号：JP2011114028A
公开(公告)日：2011-06-09
申请号：JP2009266464
申请日：2009-11-24
申请人： Denso Corp , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー
发明人： KONISHI MASAKI , FUJIWARA HIROKAZU , ENDO TAKESHI , YAMAMOTO TAKEO , KATSUNO TAKASHI , WATANABE YUKIHIKO
IPC分类号： H01L29/47 , H01L21/336 , H01L29/06 , H01L29/12 , H01L29/78 , H01L29/872
CPC分类号： H01L29/7811 , H01L29/0623 , H01L29/0661 , H01L29/0696 , H01L29/1608
摘要： PROBLEM TO BE SOLVED: To provide an SiC semiconductor device allowing a depletion layer smooth from the inside toward the outside to be formed in an end region of a semiconductor substrate using silicon carbide as a material.
SOLUTION: The semiconductor device 10 includes a semiconductor substrate 25 using silicon carbide as a material. The semiconductor substrate 25 includes an element region 12 and an end region 14 surrounding the circumference of the element region. In the end region 14, a plurality of grooves 17, 19, 21, 23 taking a round outside the element region 12 are formed. Bottom faces of the plurality of grooves are formed to sequentially reduce the depth from the groove on the inner peripheral side to the groove on the outer peripheral side. On the respective lower sides of the plurality of grooves, p-type regions 16, 18, 20, 22 of which the circumferences are surrounded by a drift layer 26 are formed.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种使用碳化硅作为材料在半导体衬底的端部区域内形成从内向外平滑的耗尽层的SiC半导体器件。解决方案：半导体器件10包括使用碳化硅作为材料的半导体衬底25。半导体衬底25包括元件区域12和围绕元件区域的圆周的端部区域14。在端部区域14中，形成有多个在元件区域12外侧圆形的槽17,19,21,23。多个槽的底面形成为顺序地减小从内周侧的槽到外周侧的槽的深度。在多个槽的相应的下侧形成有由漂移层26围绕的周围的p型区域16,18,20,22。版权所有（C）2011，JPO＆INPIT

140. 发明专利

JP4696356B2 Semiconductor device 有权
公开(公告)号：JP4696356B2
公开(公告)日：2011-06-08
申请号：JP2000380884
申请日：2000-12-14
申请人：株式会社デンソー
发明人：規仁戸倉 , 憲司河野
IPC分类号： H01L29/06 , H01L29/41 , H01L21/822 , H01L27/04 , H01L29/40 , H01L29/739 , H01L29/78
CPC分类号： H01L29/404 , H01L29/0638 , H01L29/1095 , H01L29/7395 , H01L29/7808 , H01L29/7811

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