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1. 发明专利

JP2012069798A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2012069798A
公开(公告)日：2012-04-05
申请号：JP2010214245
申请日：2010-09-24
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： FUJIWARA HIROKAZU , KONISHI MASAKI , MORIMOTO ATSUSHI , KATSUNO TAKASHI , WATANABE YUKIHIKO , SOEJIMA SHIGEMASA , KAWAI JUN , ENDO TAKESHI , YAMAMOTO TAKEO
IPC分类号： H01L21/28
CPC分类号： H01L29/872 , H01L23/3192 , H01L2224/05567 , H01L2224/06181 , H01L2924/00014 , H01L2924/12032 , H01L2924/00 , H01L2224/05552
摘要： PROBLEM TO BE SOLVED: To provide a technique capable of forming an excellent ohmic electrode in an atmosphere other than a non-oxidative atmosphere.SOLUTION: A method of manufacturing a semiconductor device having an ohmic electrode comprises the steps of: forming a metal layer 30e on a semiconductor substrate 50; forming a transmission film 30f on the metal layer 30e; heating the metal layer 30e by irradiating the metal layer 30e with an electromagnetic wave through the transmission film 30f; and removing the transmission film 30f.
摘要翻译：解决的问题：提供能够在非氧化性气氛以外的气氛中形成优异的欧姆电极的技术。解决方案：制造具有欧姆电极的半导体器件的方法包括以下步骤：在半导体衬底50上形成金属层30e; 在金属层30e上形成透射膜30f; 通过透过薄膜30f用电磁波照射金属层30e来加热金属层30e; 并移除透射膜30f。版权所有（C）2012，JPO＆INPIT

2. 发明专利

JP2011100948A Semiconductor device, and method for manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011100948A
公开(公告)日：2011-05-19
申请号：JP2009256438
申请日：2009-11-09
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： WATANABE YUKIHIKO , KATSUNO TAKASHI , SOEJIMA SHIGEMASA , YAMAMOTO TAKEO , ENDO TAKESHI , FUJIWARA HIROKAZU , KONISHI MASAKI
IPC分类号： H01L29/47 , H01L29/861 , H01L29/872
CPC分类号： H01L29/872
摘要： PROBLEM TO BE SOLVED: To decrease a heat damage caused by annealing when the annealing is performed to a back electrode.
SOLUTION: A semiconductor device includes: a silicon carbide substrate 10 where a vertical short key diode is formed; an anode electrode 20 that is provided on a front surface of the silicon carbide substrate 10; a cathode electrode 50 that is provided on a back surface of the silicon carbide substrate 10; and a conductive adiabatic region 40 that is provided between the silicon carbide substrate 10 and the cathode electrode 50. The adiabatic region 40 has heat conductivity smaller than that of a semiconductor material of the silicon carbide substrate 10.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：当对后电极进行退火时，减少由退火引起的热损伤。解决方案：半导体器件包括：形成垂直短路二极管的碳化硅衬底10; 设置在碳化硅衬底10的前表面上的阳极电极20; 设置在碳化硅衬底10的背面上的阴极50; 以及设置在碳化硅衬底10和阴极电极50之间的导电绝热区域40.绝热区域40的导热系数小于碳化硅衬底10的半导体材料的热导率。（C） 2011年，JPO＆INPIT

3. 发明专利

JP2009253042A N-type compound semiconductor substrate, laminated body of metal film and method for reducing leakage current thereof 审中-公开
标题翻译： N型复合半导体基板，金属膜层压体及降低其漏电流的方法
公开(公告)号：JP2009253042A
公开(公告)日：2009-10-29
申请号：JP2008099579
申请日：2008-04-07
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： ISHIKO MASAYASU , WATANABE YUKIHIKO , KATSUNO TAKASHI , ENDO TAKESHI , YAMAMOTO TAKEO , FUJIWARA HIROKAZU , KONISHI MASAKI
IPC分类号： H01L21/28 , H01L21/316
摘要： PROBLEM TO BE SOLVED: To provide a method for reducing a leakage current flowing between a compound semiconductor and a metal film in a laminated body in which the n-type compound semiconductor and the metal film are laminated.
SOLUTION: After laminating the metal film 2 on the n-type compound semiconductor substrate 6, the metal film 2 is anodically oxidized by applying a positive voltage to the compound semiconductor substrate 6. At this point the leakage current 30 flows between the compound semiconductor substrate 6 and the metal film 2. The leakage current 30 is concentrated to a crystal defect 32, and a thick oxidation product 34 is formed on the surface 2a of the metal film 2 corresponding to the site where the crystal defect 32 exists. Due to the formation of the oxidation product 34, the leakage current 30 becomes difficult to flow along the crystal defect 32, and the leakage current 30 flowing between a compound semiconductor substrate 6 and a metal film 2 can be reduced.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种减少层叠体中的化合物半导体和金属膜之间流过的漏电流的方法，其中层叠有n型化合物半导体和金属膜。解决方案：在n型化合物半导体衬底6上层压金属膜2之后，通过向化合物半导体衬底6施加正电压来对金属膜2进行阳极氧化。此时，泄漏电流30在化合物半导体衬底6和金属膜2.漏电流30集中到晶体缺陷32，并且在与存在晶体缺陷32的位置相对应的金属膜2的表面2a上形成厚的氧化产物34。由于氧化产物34的形成，泄漏电流30变得难以沿着晶体缺陷32流动，并且可以减少在化合物半导体基板6和金属膜2之间流动的漏电流30。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2012199382A Method for manufacturing diode 有权
标题翻译：制造二极管的方法
公开(公告)号：JP2012199382A
公开(公告)日：2012-10-18
申请号：JP2011062399
申请日：2011-03-22
申请人： Toyota Central R&D Labs Inc , Denso Corp , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： ISHIKAWA TAKESHI , WATANABE YUKIHIKO , KATSUNO TAKASHI , ENDO TAKESHI , MORINO TOMOO , MORIMOTO JUN , FUJIWARA HIROKAZU , KONISHI MASAKI
IPC分类号： H01L29/47 , H01L21/329 , H01L29/06 , H01L29/861 , H01L29/868 , H01L29/872
CPC分类号： H01L29/872
摘要： PROBLEM TO BE SOLVED: To suppress a leak current caused by an etch pit formed on a surface part of an epitaxial layer in a manufacturing step.SOLUTION: A method for manufacturing a diode comprises: a cap layer formation step (S3) of forming a cap layer on a surface of an epitaxial layer; an annealing step (S4) of activating a dopant with the cap layer being formed; a cap layer removal step (S5) of removing the cap layer; a cleaning step (S6) of cleaning the surface of the epitaxial layer using an etching technique; and a bottom smoothening step (S7) of smoothening a bottom of an etch pit formed on a surface part of the epitaxial layer.
摘要翻译：要解决的问题：在制造步骤中抑制由形成在外延层的表面部分上的蚀刻坑引起的漏电流。解决方案：一种用于制造二极管的方法包括：在外延层的表面上形成覆盖层的覆盖层形成步骤（S3）; 激活具有所述覆盖层的掺杂剂的退火步骤（S4）; 去除帽层的帽层去除步骤（S5）; 使用蚀刻技术清洁外延层的表面的清洁步骤（S6）; 以及平滑在外延层的表面部分上形成的蚀刻坑的底部的底部平滑步骤（S7）。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2012160544A Method of manufacturing silicon carbide semiconductor device 审中-公开
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：JP2012160544A
公开(公告)日：2012-08-23
申请号：JP2011018505
申请日：2011-01-31
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： MORIMOTO JUN , FUJIWARA HIROKAZU , KONISHI MASAKI , ENDO TAKESHI , MORINO TOMOO , WATANABE YUKIHIKO , ISHIKAWA TAKESHI , KATSUNO TAKASHI
IPC分类号： H01L21/265 , H01L21/266
摘要： PROBLEM TO BE SOLVED: To omit a step of removing a pattern mask for ion implantation before forming a protective film in a manufacturing process of a semiconductor device using SiC as a material, in which an annealing step is performed in a state that the protection film is formed on a surface of a semiconductor substrate.SOLUTION: A method of manufacturing a semiconductor device using SiC as a material comprises: a deposition step of depositing a protective film using an organic film or a carbon film as a material, the protective film covering the whole of an ion implantation surface of a SiC substrate and being patterned according to a non-ion implantation region and an ion implantation region of the SiC substrate; an ion implantation step of implanting ions into the SiC substrate in which the protective film is formed; and an annealing step of annealing the SiC substrate after the ion implantation in a state that the whole of the ion implantation surface is covered with the protective film. The protective film is a carbon film at the start of the annealing step.
摘要翻译：要解决的问题：在使用SiC作为材料的半导体器件的制造工艺中，省略在形成保护膜之前去除用于离子注入的图案掩模的步骤，其中退火步骤在保护膜形成在半导体衬底的表面上。＆lt; P＆gt;解决方案：使用SiC作为材料制造半导体器件的方法包括：使用有机膜或碳膜作为材料沉积保护膜的沉积步骤，保护膜覆盖整个离子注入表面并且根据SiC衬底的非离子注入区域和离子注入区域进行图案化; 离子注入步骤，将离子注入到其中形成保护膜的SiC衬底中; 以及在整个离子注入表面被保护膜覆盖的状态下在离子注入之后退火SiC衬底的退火步骤。保护膜是退火步骤开始时的碳膜。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2012054347A Method for manufacturing silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：JP2012054347A
公开(公告)日：2012-03-15
申请号：JP2010194633
申请日：2010-08-31
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： ENDO TAKESHI , MIYAHARA SHINICHIRO , MORINO TOMOO , KONISHI MASAKI , FUJIWARA HIROKAZU , MORIMOTO ATSUSHI , ISHIKAWA TAKESHI , KATSUNO TAKASHI , WATANABE YUKIHIKO
IPC分类号： H01L21/336 , H01L21/265 , H01L29/12 , H01L29/78
CPC分类号： H01L29/7813 , H01L21/30604 , H01L21/3065 , H01L29/1608 , H01L29/4236 , H01L29/66068
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a silicon carbide semiconductor device which prevents a formation of a high concentration layer on a bottom of a trench when, for example, the trench is rounded to configure a trench gate structure.SOLUTION: The method for manufacturing a SiC semiconductor device comprises: a step for forming a trench 6 before formation of an ntype source region 4; a step for executing rounding processing of the trench 6; an ion implanting and an activation annealing steps for forming the ntype source region 4 in a state that a resist 21 covers in the trench 6. Therefore the ntype source region 4 is moved in the activation annealing step, in addition to the rounding processing of the trench 6, thereby an n-type high concentration layer is prevented from being formed on the bottom of the trench 6. The method for manufacturing the SiC semiconductor device prevents the formation of the n-type high concentration layer on the bottom of the trench 6 when the trench 6 is rounded to configure the trench gate structure.
摘要翻译：要解决的问题：提供一种制造碳化硅半导体器件的方法，当例如沟槽被倒圆以构成沟槽栅极结构时，防止在沟槽的底部形成高浓度层。解决方案：用于制造SiC半导体器件的方法包括：在形成n + / SP>型源极区域4之前形成沟槽6的步骤; 用于执行沟槽6的舍入处理的步骤; 离子注入和激活退火步骤，用于在抗蚀剂21在沟槽6中覆盖的状态下形成n + 型源极区4.因此，n + 型源极区域4，从而防止在沟槽的底部形成n型高浓度层制造SiC半导体器件的方法防止了当沟槽6被倒圆以形成沟槽栅极结构时在沟槽6的底部形成n型高浓度层。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2011176183A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2011176183A
公开(公告)日：2011-09-08
申请号：JP2010039950
申请日：2010-02-25
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： FUJIWARA HIROKAZU , KONISHI MASAKI , YAMAMOTO TAKEO , ENDO TAKESHI , WATANABE YUKIHIKO , KATSUNO TAKASHI , SOEJIMA SHIGEMASA
IPC分类号： H01L21/28
CPC分类号： H01L21/0485 , H01L29/1608
摘要： PROBLEM TO BE SOLVED: To reduce contact resistance of an ohmic electrode which is ohmic-bonded to an SiC semiconductor substrate using silicon carbide as a material.
SOLUTION: The ohmic electrode includes an Fe-based electrode layer consisting principally of iron (Fe). The Fe-based electrode layer has austenite or martensite at least as parts thereof, thereby carbon can be solid-dissolved and taken in. The Fe-based electrode layer takes in the carbon as a by-product of a sinter processing process for the ohmic electrode to suppress an increase in contact resistance between the SiC semiconductor substrate and ohmic electrode, caused by accumulation of carbon on a junction interface between the SiC semiconductor substrate and ohmic electrode.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：使用碳化硅作为材料来降低欧姆接合到SiC半导体衬底的欧姆电极的接触电阻。解决方案：欧姆电极包括主要由铁（Fe）组成的Fe基电极层。 Fe基电极层至少具有奥氏体或马氏体，其中碳可以固体溶解并被吸收.Fe基电极层以作为欧姆的烧结加工工艺的副产物电极，以抑制SiC半导体衬底和欧姆电极之间的接合电阻的增加，这是由于在SiC半导体衬底和欧姆电极之间的结界面上积累碳引起的。版权所有（C）2011，JPO＆INPIT

8. 发明专利

JP2009266969A Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009266969A
公开(公告)日：2009-11-12
申请号：JP2008113063
申请日：2008-04-23
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： FUJIWARA HIROKAZU , KONISHI MASAKI , YAMAMOTO TAKEO , OKUNO HIDEKAZU , WATANABE YUKIHIKO , KATSUNO TAKASHI
IPC分类号： H01L21/265 , H01L29/47 , H01L29/872
CPC分类号： H01L29/47 , H01L21/046 , H01L29/1608 , H01L29/66143 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide such a technology that is aimed to easily remove a cap layer for protecting the surface of a silicon carbide substrate.
SOLUTION: The method of manufacturing a semiconductor device comprises: a process of doping conductive impurities in a silicon carbide substrate; a process of forming a cap layer on a surface of the silicon carbide substrate which is doped with conductive impurities; a first annealing process of heating the silicon carbide substrate under a deoxidation atmosphere wherein the cap layer is formed and activating the conductive impurities doped in the silicon carbide substrate; and a second annealing process of heating the silicon carbide substrate under an oxygen-containing atmosphere after the first annealing process and oxidizing the cap layer. The cap layer is formed of metal carbide of which melting point is higher than treatment temperature in the first annealing process and oxidation onset temperature of 1,000°C or below.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供旨在容易地去除用于保护碳化硅衬底的表面的覆盖层的技术。解决方案：制造半导体器件的方法包括：在碳化硅衬底中掺杂导电杂质的工艺; 在掺杂有导电杂质的碳化硅衬底的表面上形成覆盖层的工艺; 在脱氧气氛下加热碳化硅衬底的第一退火工艺，其中形成帽层并激活掺杂在碳化硅衬底中的导电杂质; 以及在第一退火处理之后在含氧气氛下加热碳化硅衬底并氧化覆盖层的第二退火工艺。盖层由熔融点高于第一退火处理温度和1000℃以下的氧化开始温度的金属碳化物形成。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2012199384A Method for manufacturing diode 有权
标题翻译：制造二极管的方法
公开(公告)号：JP2012199384A
公开(公告)日：2012-10-18
申请号：JP2011062415
申请日：2011-03-22
申请人： Toyota Central R&D Labs Inc , Denso Corp , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： ISHIKAWA TAKESHI , WATANABE YUKIHIKO , KATSUNO TAKASHI , ENDO TAKESHI , MORINO TOMOO , KONISHI MASAKI , MORIMOTO JUN , FUJIWARA HIROKAZU
IPC分类号： H01L33/34
CPC分类号： H01L29/872
摘要： PROBLEM TO BE SOLVED: To suppress a leak current caused by an etch pit formed on a surface part of an epitaxial layer in a manufacturing step.SOLUTION: A method for manufacturing a diode comprises: a cap layer formation step (S3) of forming a cap layer on a surface of an epitaxial layer; an annealing step (S4) of activating a dopant with the cap layer being formed; a cap layer removal step (S5) of removing the cap layer; a cleaning step (S6) of cleaning the surface of the epitaxial layer using an etching technique; a step (S7) of forming a second epitaxial layer on the surface of the epitaxial layer through crystal growth; and a polishing step (S8) of polishing the second epitaxial layer formed on the surface of the epitaxial layer.
摘要翻译：要解决的问题：在制造步骤中抑制由形成在外延层的表面部分上的蚀刻坑引起的漏电流。解决方案：一种用于制造二极管的方法包括：在外延层的表面上形成覆盖层的覆盖层形成步骤（S3）; 激活具有所述覆盖层的掺杂剂的退火步骤（S4）; 去除帽层的帽层去除步骤（S5）; 使用蚀刻技术清洁外延层的表面的清洁步骤（S6）; 通过晶体生长在所述外延层的表面上形成第二外延层的步骤（S7）; 以及研磨在外延层的表面上形成的第二外延层的研磨工序（S8）。版权所有（C）2013，JPO＆INPIT

10. 发明专利

JP2011176015A Silicon carbide semiconductor device with schottky barrier diode, and method of manufacturing the same 有权
标题翻译：具有肖特基二极管二极管的硅碳化硅半导体器件及其制造方法
公开(公告)号：JP2011176015A
公开(公告)日：2011-09-08
申请号：JP2010037388
申请日：2010-02-23
申请人： Denso Corp , Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社デンソー , 株式会社豊田中央研究所
发明人： YAMAMOTO TAKEO , ENDO TAKESHI , MORIMOTO ATSUSHI , FUJIWARA HIROKAZU , WATANABE YUKIHIKO , KATSUNO TAKASHI , ISHIKAWA TAKESHI
IPC分类号： H01L29/47 , H01L29/872
CPC分类号： H01L29/47 , H01L21/0495 , H01L29/0619 , H01L29/063 , H01L29/1608 , H01L29/402 , H01L29/6606 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To achieve both reduction in Schottky barrier height and reduction in leakage current.
SOLUTION: An interface layer comprising SiC
X is not formed on an interface between a Schottky electrode 4 and SiC, and respective particles of metal forming the Schottky electrode 4 are made to be in a state of lattice matching such that an atom arrangement is continuous, on a surface of the SiC. Specifically, a particle structure of the metal forming the Schottky electrode 4 is not made to be a columnar structure but is made to be a granular structure, and oxygen is made to be hardly taken in the interface through interfaces between the particles as compared with the columnar structure so that SiO
X is not formed, thereby the lattice matching between the metal forming the Schottky electrode 4 and the SiC is achieved.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：实现肖特基势垒高度的降低和漏电流的降低。解决方案：在肖特基电极4和SiC之间的界面上没有形成包含SiC X 的界面层，并且使形成肖特基电极4的各个金属颗粒处于晶格匹配使得原子排列是连续的，在SiC的表面上。具体地，形成肖特基电极4的金属的颗粒结构不是柱状结构，而是形成为颗粒状结构，并且通过与颗粒之间的界面相比，在界面中几乎不吸收氧。柱状结构，使得不形成SiO X ，从而实现形成肖特基电极4的金属与SiC之间的晶格匹配。版权所有（C）2011，JPO＆INPIT

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