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1. 发明公开

EP3217436A4 SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR 有权转让
公开(公告)号：EP3217436A4
公开(公告)日：2018-06-20
申请号：EP15856987
申请日：2015-08-12
申请人： AIR WATER INC
发明人： FUKAZAWA AKIRA , OUCHI SUMITO
IPC分类号： H01L29/872 , H01L21/20 , H01L21/205 , H01L21/329 , H01L29/26
CPC分类号： H01L29/267 , H01L21/02381 , H01L21/02447 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/02598 , H01L21/0262 , H01L21/20 , H01L21/205 , H01L29/1608 , H01L29/2003 , H01L29/207 , H01L29/6606 , H01L29/66212 , H01L29/872
摘要： A semiconductor device which can reduce power consumption and a method for manufacturing the same are provided. A semiconductor device comprises an Si (silicon) substrate, an SiC (silicon carbide) layer formed on the surface of the Si substrate, an AlN (aluminum nitride) layer formed on the surface of the SiC layer, an n-type GaN (gallium nitride) layer formed on the surface of the AlN layer, a first electrode formed at the surface side of the GaN layer, and a second electrode formed at the reverse face side of the Si substrate 1. The magnitude of electrical current which flows between the first electrode and the second electrode depends on electrical voltage between the first electrode and the second electrode.

2. 发明授权

EP2793255B8 MANUFACTURING METHOD OF A SEMICONDUCTOR DEVICE COMPRISING A SCHOTTKY DIODE AND A HIGH ELECTRON MOBILITY TRANSISTOR 有权转让
公开(公告)号：EP2793255B8
公开(公告)日：2018-01-17
申请号：EP13163861.1
申请日：2013-04-16
申请人： IMEC VZW
发明人： Decoutere, Stefaan , Lenci, Silvia
IPC分类号： H01L21/8252 , H01L29/778 , H01L27/06 , H01L29/872 , H01L29/20 , H01L29/10 , H01L29/06 , H01L29/66
CPC分类号： H01L29/66431 , H01L21/8252 , H01L27/0605 , H01L27/0623 , H01L27/0629 , H01L29/0619 , H01L29/1066 , H01L29/2003 , H01L29/66143 , H01L29/66212 , H01L29/66462 , H01L29/7783 , H01L29/7787 , H01L29/872
摘要： The present invention is related to semiconductor device comprising a Schottky diode (10) and a High Electron Mobility Transistor (20), formed on a III-nitride stack comprising at least a lower and an upper III-nitride layer (3,4) forming a heterojunction there between, so that a 2DEG layer (5) may be formed in the lower of the two layers. The 2DEG layers serves as the charge carrier for both the diode and the HEMT. In the device of the invention, a doped III-nitride layers is present between a portion of the anode of the diode and the III-nitride stack, said portion being located between the diode's Schottky junction and the cathode, and a further layer of doped III-nitride material is present between the gate electrode of the HEMT and the III-nitride stack. The thickness of said III-nitride layers is not equal, so that the turn-on voltage of the diode and the threshold voltage of the HEMT are tuned according to specific requirements. The invention equally involves a method of producing such a device.

3. 发明公开

EP3131122A1 INTEGRATED HIGH PERFORMANCE LATERAL SCHOTTKY DIODE 审中-公开
标题翻译： INTEGRIERTE LATERALE SCHOTTKY-HOCHLEISTUNGSDIODE
公开(公告)号：EP3131122A1
公开(公告)日：2017-02-15
申请号：EP16182759.7
申请日：2016-08-04
申请人： Power Integrations, Inc.
发明人： KUDYMOV, Alexey , RAMDANI, Jamal
IPC分类号： H01L29/872
CPC分类号： H01L29/475 , H01L29/2003 , H01L29/205 , H01L29/402 , H01L29/404 , H01L29/66143 , H01L29/66212 , H01L29/66462 , H01L29/7787 , H01L29/872
摘要： A diode includes a two-dimensional electron gas formed in a heterojunction defined between first and second semiconductor material layers. First and second layers of insulating material are disposed on the second semiconductor layer. First and second electrodes are disposed in the second layer of insulating material. The first electrode is coupled to the second semiconductor material layer. The second electrode is coupled to the heterojunction. Third and fourth layers of insulating material are disposed on the second insulating layer. A first via is disposed in the fourth layer of insulating material and coupled to the second electrode. A first field plate is disposed in the fourth layer of insulating material. An edge of the first field plate laterally extends towards first via. The first via is separated from an edge of the first via. The first field plate is coupled to the first electrode.
摘要翻译：二极管包括在第一和第二半导体材料层之间限定的异质结中形成的二维电子气。第一和第二层绝缘材料设置在第二半导体层上。第一和第二电极设置在第二绝缘材料层中。第一电极耦合到第二半导体材料层。第二电极耦合到异质结。第三和第四绝缘材料层设置在第二绝缘层上。第一通孔设置在第四绝缘材料层中并且耦合到第二电极。第一场板设置在第四绝缘材料层中。第一场板的边缘横向延伸朝向第一通孔。第一通孔与第一通孔的边缘分离。第一场板耦合到第一电极。

4. 发明授权

EP1947700B1 Low voltage diode with reduced parasitic resistance and method for fabricating 有权
标题翻译：具有降低的寄生电阻低电压二极管，和其制备方法
公开(公告)号：EP1947700B1
公开(公告)日：2016-01-06
申请号：EP07254498.4
申请日：2007-11-16
申请人： Cree, Inc.
发明人： Parikh, Primit , Heikman, Sten
IPC分类号： H01L29/872 , H01L21/329
CPC分类号： H01L29/66143 , H01L29/2003 , H01L29/475 , H01L29/66212 , H01L29/872

5. 发明公开

EP2184782A4 SCHOTTKY BARRIER DIODE 审中-公开
标题翻译：肖特基二极管
公开(公告)号：EP2184782A4
公开(公告)日：2013-03-27
申请号：EP08828484
申请日：2008-08-22
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HORII TAKU , MIYAZAKI TOMIHITO , KIYAMA MAKOTO
IPC分类号： H01L29/47 , H01L29/41 , H01L29/872
CPC分类号： H01L29/872 , H01L21/0495 , H01L29/2003 , H01L29/402 , H01L29/66143 , H01L29/66212

6. 发明公开

EP2302686A2 Guard ring for semiconductor devices 审中-公开
标题翻译：半导体器件的保护环
公开(公告)号：EP2302686A2
公开(公告)日：2011-03-30
申请号：EP11150140.9
申请日：2005-08-22
申请人： Velox Semiconductor Corporation
发明人： Ceruzzi, Alex D. , Pophristic, Milan , Shelton, Bryan S. , Liu, Linlin , Zhu, Ting Gang , Murphy, Michael
IPC分类号： H01L29/872 , H01L21/329 , H01L29/06 , H01L29/32 , H01L29/207 , H01L29/20
CPC分类号： H01L29/32 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/2003 , H01L29/207 , H01L29/452 , H01L29/475 , H01L29/66143 , H01L29/66212 , H01L29/872
摘要： A guard ring (122) is formed in a semiconductor region that is part of a Schottky junction or Schottky diode. The guard ring is formed by ion implantation into the semiconductor contact layer without completely annealing the semiconductor contact layer to form a high resistance region. The guard ring may be located at the edge of the layer or, alternatively, at a distance away from the edge of the layer. A Schottky metal contact (110) is formed atop the layer, and the edges of the Schottky contact are disposed atop the guard ring.
摘要翻译：保护环（122）形成在作为肖特基结或肖特基二极管的一部分的半导体区域中。通过离子注入到半导体接触层中形成保护环，而不完全退火半导体接触层以形成高电阻区。保护环可以位于层的边缘处，或者可选地，位于远离层的边缘的位置。肖特基金属触点（110）形成在层上，并且肖特基触点的边缘布置在防护环的顶上。

7. 发明公开

EP1633004A2 Guard ring for semiconductor devices 有权
标题翻译： Schutzring为Halbleiteranordnungen
公开(公告)号：EP1633004A2
公开(公告)日：2006-03-08
申请号：EP05018177.5
申请日：2005-08-22
申请人： Velox Semiconductor Corporation
发明人： Ceruzzi, Alex D. , Pophristic, Milan, c/o Velox Semiconductor Corp. , Shelton, Bryan S. , Liu, Linlin, c/o Velox Semiconductor Corp. , Murphy, Michael , Zhu, Ting Gang, c/o Velox Semiconductor Corp.
IPC分类号： H01L29/872 , H01L21/329 , H01L29/06
CPC分类号： H01L29/32 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/2003 , H01L29/207 , H01L29/452 , H01L29/475 , H01L29/66143 , H01L29/66212 , H01L29/872
摘要： A guard ring (122) is formed in a semiconductor region that is part of a Schottky junction or Schottky diode. The guard ring is formed by ion implantation into the semiconductor contact layer without completely annealing the semiconductor contact layer to form a high resistance region. The guard ring may be located at the edge of the layer or, alternatively, at a distance away from the edge of the layer. A Schottky metal contact (110) is formed atop the layer, and the edges of the Schottky contact are disposed atop the guard ring.
摘要翻译：保护环（122）形成在作为肖特基结或肖特基二极管的一部分的半导体区域中。保护环是通过离子注入形成半导体接触层而不完全退火半导体接触层形成高电阻区域。保护环可以位于层的边缘处，或者可以位于离层的边缘一定距离处。肖特基金属触点（110）形成在层的顶部，肖特基触点的边缘设置在保护环的顶部。

8. 发明授权

EP0762512B1 Schottky barrier diode 失效
标题翻译：肖特基势垒二极管
公开(公告)号：EP0762512B1
公开(公告)日：2000-07-12
申请号：EP96113586.0
申请日：1996-08-23
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Miyata, Tomoyasu , Sakamoto, Koichi
IPC分类号： H01L29/872 , H01L21/329
CPC分类号： H01L29/66212 , H01L29/872

9. 发明公开

EP0490236A2 Fabrication process for Schottky barrier diodes on a substrate 失效
标题翻译： HerstellungsverfahrenfürSchottky-Sperrschichtdioden auf einem Substrat。
公开(公告)号：EP0490236A2
公开(公告)日：1992-06-17
申请号：EP91120753.8
申请日：1991-12-03
申请人： NATIONAL SEMICONDUCTOR CORPORATION
发明人： McFarlane, Brian , Marazita, Frank , Readdie, John
IPC分类号： H01L21/329 , H01L27/07 , H01L21/321
CPC分类号： H01L29/66212 , H01L21/32137 , H01L27/0766 , Y10S148/14 , Y10S438/97
摘要： A method for fabricating a diode, for example, for use in a Schottky clamped transistor, which as a process step disposes a layer of oxide (12) between the substrate (2) and the overlying layer of polysilicon (16) which must ultimately be etched away. The oxide layer permits use of an end point dry etch process which in turn allows greater miniaturization of the circuit over wet etch processes. Use of the end point process made feasible by the oxide layer also prevents overetch of the silicon material. As a result, a more ideal metal silicide (36) anode-to-substrate Schottky barrier is formed with corresponding improvements in the diode ideality factor. In addition the oxide layer eliminates Schottky mask alignment problems and further improves diode performance characteristics by elimination of parasitic diodes. The process can be implemented with minimal deviation from other core processes used to fabricate similar circuits.
摘要翻译：一种用于制造例如用于肖特基钳位晶体管的二极管的方法，其作为工艺步骤，在衬底（2）和多晶硅（16）的上覆层之间配置一层氧化物（12），该层必须最终为蚀刻掉。氧化物层允许使用终点干蚀刻工艺，这又允许电路在湿蚀刻工艺上的更大的小型化。使用通过氧化物层可行的终点工艺也可以防止硅材料的过蚀刻。结果，形成了更理想的金属硅化物（36）阳极至衬底肖特基势垒，其二极管理想因素具有相应的改进。此外，氧化物层消除了肖特基掩模对准问题，并通过消除寄生二极管进一步改善二极管性能特性。该过程可以以与用于制造类似电路的其他核心过程的最小偏差来实现。

10. 发明公开

EP3378098A1 DIODE A HETEROJONCTION AYANT UN COURANT DE SURCHARGE TRANSITOIRE ACCRU 审中-公开
公开(公告)号：EP3378098A1
公开(公告)日：2018-09-26
申请号：EP16812998.9
申请日：2016-11-17
申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives
发明人： BAINES, Yannick , BUCKLEY, Julien
IPC分类号： H01L29/872 , H01L21/329 , H01L29/205 , H01L29/861 , H01L29/40
CPC分类号： H01L29/205 , H01L29/2003 , H01L29/402 , H01L29/66212 , H01L29/66219 , H01L29/861 , H01L29/872
摘要： The invention relates to a heterojunction diode (1) comprising: first and second semiconductor layers (15, 17) made of III-N material, said layers being superposed to form a two-dimensional electron gas (16); an anode (23) and a cathode (21) that are selectively electrically connected to each other by way of the two-dimensional electron gas; a third semiconductor layer (14) positioned under the two-dimensional electron gas (16); a p-doped first semiconductor element (19) making contact with the anode (23) and with said third layer (14) and forming a separation between the anode and said third layer; an n-doped second semiconductor element (31) making contact with the cathode (21) and with said third layer (14), and forming a separation between the cathode and said third layer, the third semiconductor layer and the first and second semiconductor elements (19, 31) forming a p-i-n diode.

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